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path: root/arch/arm/cpu/armv7/zynq/slcr.c
Commit message (Expand)AuthorAgeLines
* ARM: zynq: slcr: Dont modify the reserved bitsSiva Durga Prasad Paladugu2015-01-26-1/+1
* ARM: zynq: ehci: Added USB host driver supportMichal Simek2014-05-14-0/+24
* ARM: zynq: Add MIO detection codeMichal Simek2014-05-14-0/+50
* ARM: zynq: Setup correct slcr_lock valueMichal Simek2014-05-14-2/+6
* ARM: zynq: slcr: Fix incorrect commentaryMichal Simek2014-05-14-2/+2
* ARM: zynq: Fix sparse warnings in slcr.cMichal Simek2014-05-14-0/+1
* net: zynq_gem: Calculate clock dividers dynamicallySoren Brinkmann2014-02-19-5/+8
* net: zynq_gem: Move RCLK details out of driverSoren Brinkmann2014-02-19-3/+3
* zynq: Add support to find bootmodeJagannadha Sutradharudu Teki2014-01-10-0/+6
* zynq: slcr: Wait 100ms till clk is properly setupMichal Simek2013-08-12-1/+1
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
* fpga: zynq: Add support for loading bitstreamMichal Simek2013-05-06-0/+35
* net: gem: Fix gem driver on 1Gbps LANMichal Simek2013-04-30-0/+26
* arm: zynq: Add SLCR support with system resetMichal Simek2013-02-07-0/+63
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