Commit message (Expand) | Author | Age | Lines | |
---|---|---|---|---|
* | ARM: zynq: Added efuse status register base address | Siva Durga Prasad Paladugu | 2014-05-14 | -0/+13 |
* | zynq: Add support for U-BOOT SPL | Michal Simek | 2014-02-19 | -2/+2 |
* | zynq: Provide a framework to read clock frequencies | Soren Brinkmann | 2014-02-19 | -0/+2 |
* | zynq: Enable dcache support | Michal Simek | 2014-02-19 | -0/+8 |
* | arm: zynq : Revert TZ_DDR_RAM to secure. | Radhey Shyam Pandey | 2013-11-06 | -2/+0 |
* | arm: zynq: Do not remap OCM to high address | Michal Simek | 2013-11-06 | -2/+5 |
* | zynq: Use arch_cpu_init() instead of lowlevel_init() | Michal Simek | 2013-10-17 | -0/+6 |
* | Coding Style cleanup: remove trailing white space | Wolfgang Denk | 2013-10-14 | -1/+1 |
* | Add GPL-2.0+ SPDX-License-Identifier to source files | Wolfgang Denk | 2013-07-24 | -17/+1 |
* | arm: zynq: Add lowlevel initialization to C | Michal Simek | 2013-02-07 | -1/+25 |
* | arm: zynq: Add SLCR support with system reset | Michal Simek | 2013-02-07 | -0/+2 |
* | arm: Support new Xilinx Zynq platform | Michal Simek | 2012-10-04 | -0/+31 |