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path: root/arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c
Commit message (Expand)AuthorAgeLines
* Exynos5: ddr3: Choose between single or double channel configAkshay Saraswat2014-11-17-0/+10
* DMC: Exynos5: Enable update mode for DREX controllerAlim Akhtar2014-11-17-0/+19
* Exynos5420: DMC: Add software read levelingAkshay Saraswat2014-06-13-4/+246
* DMC: exynos5420: Gate CLKM to when reading PHY_CON13Doug Anderson2014-06-13-5/+38
* Exynos5420: Remove code for enabling read levelingAkshay Saraswat2014-06-13-71/+0
* Exynos5: DMC: Modify the definition of ddr3_mem_ctrl_initAkshay Saraswat2014-06-13-5/+2
* Exynos5420: Add DDR3 initialization for 5420Rajeshwari Birje2013-12-30-10/+429
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
* EXYNOS: Move files from board/samsung to arch/armRajeshwari Shinde2013-07-05-0/+233