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| * | sh: Renesas RSK+ 7203 board supportNobuhiro Iwamatsu2008-08-31-0/+612
| | | | | | | | | | | | | | | | | | | | | This adds initial support for the RTE RSK+ SH7203 board. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support Renesas SH7203 processorNobuhiro Iwamatsu2008-08-31-1/+43
| | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support SH2/SH2A which is CPU of Renesas TechnologyNobuhiro Iwamatsu2008-08-31-1/+593
| | | | | | | | | | | | | | | | | | | | | Add support SH2/SH2A basic function. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Renesas R0P7785LC0011RL board supportNobuhiro Iwamatsu2008-08-31-0/+1378
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has SH7785, 512MB DDR2-SDRAM, NOR Flash, Graphic, Ethernet, USB, SD, RTC, and I2C controller. This patch supports the following functions: - 128MB DDR2-SDRAM (29-bit address mode only) - NOR Flash - USB host - Ethernet Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: add support for SH7785Yoshihiro Shimoda2008-08-31-0/+158
| |/ | | | | | | | | | | | | | | Renesas SH7785 has DDR2-SDRAM controller, PCI, and other. This patch supports CPU register's header file. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxWolfgang Denk2008-08-31-9/+13
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| * | Move MPC512x_FEC driver to drivers/netBen Warren2008-08-29-2/+3
| | | | | | | | | | | | Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | Move MPC5xxx_FEC driver to drivers/netBen Warren2008-08-29-7/+4
| | | | | | | | | | | | Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | ADS5121: Fix NOR and CPLD ALE timing for rev 2 siliconJohn Rigby2008-08-28-0/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC5121 rev 2 silicon has a new register for controlling how long CS is asserted after deassertion of ALE in multiplexed mode. The default is to assert CS together with ALE. The alternative is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE. The default is wrong for the NOR flash and CPLD on the ADS5121. This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD) it does so conditionally based on silicon rev 2.0 or greater. Signed-off-by: Martha J Marx <mmarx@silicontkx.com> Signed-off-by: John Rigby <jrigby@freescale.com>
* | Add I2C frequency dividers for ColdFireTsiChung Liew2008-08-28-1/+33
| | | | | | | | | | | | | | | | | | | | The existing I2C freqency dividers for FDR does not apply to ColdFire platforms; thus, a seperate table is added based on MCF5xxx Reference Manual Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by: Tabi Timur <timur@freescale.com>
* | ColdFire: I2C fix for multiple platformsTsiChung Liew2008-08-28-14/+62
| | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Add CONFIG_MII_INIT for M5272C3TsiChung Liew2008-08-28-0/+1
| | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Multiple fixes for MCF5445x platformsTsiChung Liew2008-08-28-13/+12
| | | | | | | | | | | | | | | | | | | | Add FEC pin set and mii reset in __mii_init(). Change legacy flash vendor from 2 to AMD LEGACY (0xFFF0), change cfi_offset to 0, and change CFG_FLASH_CFI to CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and M54455EVB env settings in configuration file. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Change the SDRAM BRD2WT timing from 3 to 7TsiChung Liew2008-08-28-2/+2
| | | | | | | | | | | | | | The user manuals recommend 7. Signed-off-by: Kurt Mahan <kmahan@freescale.com> Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Raise uart baudrate to 115200 bpsTsiChung Liew2008-08-28-8/+8
| | | | | | | | | | | | | | M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms uart baudrate increase from 19200 to 115200 bps Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Fix board.c warning messageTsiChung Liew2008-08-28-0/+2
|/ | | | | | Implicit declaration of nand_init() warning message Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2008-08-28-2/+882
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| * Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxWolfgang Denk2008-08-28-2/+882
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| | * mpc52xx: added support for the MPC5200 based MUC.MC52 board from MAN.Heiko Schocher2008-08-27-2/+882
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | | FSL DDR: Remove duplicate setting of cs0_bnds register on 86xx.Kumar Gala2008-08-28-1/+0
|/ / | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-08-28-1640/+5625
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| * | mpc85xx: remove redudant code with lib_ppc/interrupts.cKumar Gala2008-08-27-97/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some reason we duplicated the majority of code in lib_ppc/interrupts.c not show how that happened, but there is no good reason for it. Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why they exist. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: Add support for the MPC8536DS reference boardKumar Gala2008-08-27-0/+1675
| | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: Add support for the MPC8536Kumar Gala2008-08-27-5/+218
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We also have SERDES init code for the 8536. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com>
| * | mpc85xx: Add support for the MPC8572DS reference boardKumar Gala2008-08-27-2/+1593
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Remove old SPD support from cpu/mpc85xxKumar Gala2008-08-27-1166/+4
| | | | | | | | | | | | | | | | | | | | | All 85xx boards have been converted to the new code so we can remove the old SPD DDR setup code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert STXSSA to new DDR code.Kumar Gala2008-08-27-18/+98
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert STXGP3 to new DDR code.Kumar Gala2008-08-27-19/+100
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert SBC8560 to new DDR code.Kumar Gala2008-08-27-14/+122
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert MPC8540EVAL to new DDR code.Kumar Gala2008-08-27-12/+102
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert PM856 to new DDR code.Kumar Gala2008-08-27-34/+109
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert PM854 to new DDR code.Kumar Gala2008-08-27-34/+109
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert sbc8548 to new DDR code.Kumar Gala2008-08-27-17/+108
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert atum8548 to new DDR code.Kumar Gala2008-08-27-37/+122
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert socrates to new DDR code.Kumar Gala2008-08-27-16/+111
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert MPC8544DS to new DDR code.Kumar Gala2008-08-27-25/+113
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert MPC8568MDS to new DDR code.Jon Loeliger2008-08-27-24/+117
| | | | | | | | | | | | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert MPC8548CDS to new DDR code.Jon Loeliger2008-08-27-18/+108
| | | | | | | | | | | | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert MPC8541CDS to new DDR code.Jon Loeliger2008-08-27-14/+102
| | | | | | | | | | | | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert MPC8555ADS to new DDR code.Jon Loeliger2008-08-27-18/+105
| | | | | | | | | | | | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert MPC8560ADS to new DDR code.Jon Loeliger2008-08-27-36/+110
| | | | | | | | | | | | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Convert MPC8540ADS to new DDR code.Kumar Gala2008-08-27-40/+110
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Add 85xx specific register settingKumar Gala2008-08-27-0/+318
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | FSL DDR: Add e500 TLB helper for DDR codeKumar Gala2008-08-27-0/+65
| |/ | | | | | | | | | | | | Provide a helper function that board code can call to map TLBs when setting up DDR. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | dm9000 remove dead external phy support, gpio fixAndrew Dyer2008-08-26-144/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dm9000 has code to detect and initialize external phy parts, but later on in the code the part is forced to use the internal phy unconditionally. Remove the unused/untested code. change the GPIO initialization so that only the GPIO used as an internal phy reset (hardwired in the chip) is set as an output. The remaining GPIO need to be handled by board specific code to prevent possible drive conflicts. Set as inputs for safety. replace a few magic numbers with defines Signed-off-by: Andrew Dyer <adyer@righthandtech.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Standardize bootp, tftpboot, rarpboot, dhcp, and nfs command descriptionsPeter Tyser2008-08-26-5/+5
| | | | | | | | | | | | | | | | | | cmd_net.c command descriptions were updated to describe the optional hostIPaddr argument. The dhcp command help message was also updated to more closely reflect the other commands in cmd_net.c Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Fix bogus error message in the DHCP handlerRemy Bohmer2008-08-26-0/+3
| | | | | | | | | | | | | | | | The DHCP handler has 1 state that is not listed in this case, causing a failure message when there is actually no failure. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Fix compile error when CONFIG_BOOTP_RANDOM_DELAY is set.Remy Bohmer2008-08-26-1/+1
| | | | | | | | | | | | | | | | The option CONFIG_BOOTP_RANDOM_DELAY does not compile, because of a missing extern inside the net/bootp.h header Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | ColdFire: Add FEC Buffer descriptors in SRAMTsiChung Liew2008-08-26-6/+36
| | | | | | | | | | | | | | | | Add FEC Buffer descriptors and data buffer in SRAM for faster execution and access. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Fix ColdFire FEC warning messagesTsiChung Liew2008-08-26-8/+13
| | | | | | | | | | | | | | | | Types mismatch and implicit declaration of icache_invalid() warning messages Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
generated by cgit v1.1 at 2024-10-05 01:34:04 +0000