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* MLK-12723 imx: Change the env offset on NAND to 60MYe Li2017-04-05-3/+3
| | | | | | | | | | | | | | | | Current environment offset on NAND is 37MB, this will cause a alignment issue when erasing if nand erase block is 2MB. The saveenv is failed. => saveenv Saving Environment to NAND... Erasing NAND... Attempt to erase non block-aligned data Since the max erase block we supported is 4MB, adjust the env offset to 60MB, where is the last 4MB in 64MB reserved area for boot. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 22f6c4b151fbdea1985403086715de841152c880)
* MLK-10186-1 imximage: add fixed IVT offset supportYe.Li2017-04-05-1/+8
| | | | | | | | | | | Since from mx7, we use fixed IVT offset for all boot devices. Introduce a new configuration CONFIG_IMX_FIXED_IVT_OFFSET for this. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 88e0a3552b08627b18d98380a32dbafacb18854b) (cherry picked from commit 3d52e221ed444dab96038a2417d1dcb2217ad593) (cherry picked from commit 13d39c51bbaabbcf3b72516d8ac3f1853f686ace)
* MLK-12416-9: mx6qp: define CONFIG_MX6QPPeng Fan2017-04-05-7/+14
| | | | | | | | Define CONFIG_MX6QP which will also set CONFIG_MX6Q, otherwise plugin code will use wrong ddr script. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 901d9eb01736ab54822678a197fe1aeb281a81b9)
* MLK-12442: imx: mx6qarm2: lpddr2 set dram 2 channel fixed modeAdrian Alonso2017-04-05-4/+26
| | | | | | | | | | | | | | Setup MMDC in two channel fixed mode Initialize dram banks for two channel fixed mode DRAM bank = 0x00000000 -> start = 0x10000000 -> size = 0x20000000 DRAM bank = 0x00000001 -> start = 0x80000000 -> size = 0x20000000 Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> (cherry picked from commit bf1d8faf1dab7c4245ba7b79ceef6279cff45625)
* MLK-12560 mx6: Enable eMMC boot support for all mx6Ye Li2017-04-05-1/+1
| | | | | | | | | Set the CONFIG_SUPPORT_EMMC_BOOT in mx6_common.h to enable the eMMC boot support for all mx6 platforms. Remove the duplicated definition in board's header file. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit dbe744de73c88f14e01f56a3258752ab5cd45b14)
* MLK-12559 mx6: Enable memory test commandYe Li2017-04-05-0/+53
| | | | | | | | Set the CONFIG_CMD_MEMTEST on all mx6 platforms for enabling the u-boot memory test. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 75b5a7d5931064386ae38ce74a34eb6e368666a5)
* MLK-12555-2 mx6ulevk: Enable the Watchdog WDOG_B signal outputYe Li2017-04-05-0/+2
| | | | | | | | | When using watchdog timeout in kernel, the reset does not output the WDOG_B signal, so the power supply won't be reset. To solve the problem, we enable it in u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 8a713e8cd1500ecc6daa02a14a63763a548095b4)
* MLK-12555 mx6sxsabreauto: Enable the Watchdog WDOG_B signal outputYe Li2017-04-05-0/+3
| | | | | | | | | When using watchdog timeout in kernel, the reset does not output the WDOG_B signal, so the power supply won't be reset. To solve the problem, we enable it in u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 7b53ee014c9f02f6ead0b60d5295d07205247a7c)
* MLK-11230 imx6: USB: Modify OTG ID pin pad setting to pull upYe.Li2017-04-05-6/+31
| | | | | | | | | | | Set the ID pin pad to pull up not the pull down at default, otherwise we can't enter the device mode, but always detect as host. After this change we have to use portA cable to play as host, and use portB cable for device. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit b315d6b36a913d75d25284320e69050ebdf7a7eb)
* MLK-12531 mx6sxsabresd: Add CM4 fast boot up demoYe Li2017-04-05-2/+65
| | | | | | | | | | | | | | | | | | This is a demo that CM4 will boot up by u-boot without typing any command. It boots up at u-boot early init, try to minimize the time from power up to the CM4 running. Since CM4 runs on QSPI NOR XIP, we have to disable the QSPI driver in u-boot to avoid conflict. RDC for shared GPIO1 is added, but not enabled, because the kernel is not ready for shared GPIO1. Users can uncomment the CONFIG_IMX_RDC to enable it. Some legacy codes in mx6sxsabreauto are removed. We only need this work on mx6sxsabresd as a demo. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit f66842f79d4e33ace45762466eed23a86d367642)
* MLK-12493-1 Add support for various boot deviceYe Li2017-04-05-169/+1328
| | | | | | | | | | Add support for various boot devices like NAND, QSPINOR, SPINOR, eMMC, EIMNOR, SATA. Modify board level files to support the feature and add corresponding defconfig files Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 72c35e80b86f7f75a52db45959793882bb730793)
* MLK-12500-2 HAB: Add commented secure boot configurationsYe Li2017-04-05-0/+62
| | | | | | | | | | | | CONFIG_SECURE_BOOT is used for signed image building, this configuration is not enabled at default. Comment it in mx6/mx7 common header file. Users can uncomment it to enable. Also add CONFIG_CSF_SIZE for defining the CSF reserved size and resize the CONFIG_CSF_SIZE to 0x4000 to align with v2016.03. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 01cc7d9bc205251c13712418d51f3a4d7b20861b)
* MLK-12500-1 HAB: Add kernel image authentication in image loadingYe Li2017-04-05-0/+33
| | | | | | | | | | To support the trust boot chain, we integrate the authentication into the kernel image loading process. The kernel image will be verified at its load address. So when signing the kernel image, we need to use this load address which may change on different platforms. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 3c118b8d6bbe1a25ca8c8bafeb528309f16fc73d)
* MLK-12495 mx6: Add LDO bypass supportYe Li2017-04-05-2/+574
| | | | | | | | | | | | | | | | Port LDO bypass support from v2015 to support the features: 1. Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz, enable LDO bypass and setup PMIC voltages. LDO bypass is dependent on the flatten device tree file. 2. We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to reboot whole board, so split these code to independent function so that board file can call it freely. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 5b87d04dba66fa45375d59648838ef89f559f75d)
* MLK-12436-17: imx: mx6sxsabreauto: update board and headerYe Li2017-04-05-26/+40
| | | | | | | | | | | | Align with imx_v2016.03 1. Update pmic settings to enable SD3 power and use PMIC common init codes. 2. Enable bmode. 3. Update MMC root parameters 4. Update AUXBOOT for M4 Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 0816a496fbe3f7d0e4f1a9322c76908a5c557c8c) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12436-16: imx: mx6sxsabresd: update board and headerPeng Fan2017-04-05-24/+169
| | | | | | | | | | | | | | Align with imx_v2016.03. Add emmc support which needs board rework. Add I2C2. Update pmic settings. Add bmode. Move partial code from board_early_init_f to board_init. Add PCI power and reset GPIO and disable PCI at default. Update QSPI settings. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 9613a2d07760f56b3c93779b14ad32ef69856da7)
* MLK-12436-13: mx6ulevk: Add usb ethernetPeng Fan2017-04-05-0/+2
| | | | | | | | Align with imx_v2016.03. Add usb ethernet support, since there is no FEC on this i.MX6UL Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 9811e3db89f535e54ae10a10caa660f8e6036270)
* MLK-12436-12: mx6slevk: update board codePeng Fan2017-04-05-6/+101
| | | | | | | | | | | | | | Add elan code, to handle epdc which has i2c devices. In imx_v2015.04, the two pathces are for elan. b6ba68516b681a38025252bd0ef6a6ed3e8adfa0 MLK-10215 Add elan init in i.MX6SL-EVK board 0c600f6a67f00fe0c674c08c355bea3789109679 MLK-10885 imx: mx6slevk ignore elan init when no epdc on board Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit cb249aa1d57788c52145d28f2e2c68cb320d8ae3) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12436-11: mx6sabresd: add 6qp and solo build targetPeng Fan2017-04-05-0/+122
| | | | | | | | Add default build target for mx6qp and mx6solo. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 1a2bbdea962ab4dde3838430a06be9140af5176d) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12436-10: mx6sabresd: update board code and header fileYe Li2017-04-05-32/+166
| | | | | | | | | | | Align board code and header file with imx_v2016.03. Update pmic settings for i.MX6QP. wrap spi code together using CONFIG_MXC_SPI macro. To i.MX6SOLO, need to define nosmp in bootargs. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit bb35d09d140efc7ff9b74bbcd77d7827c1dd503e) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12735 mx6qpsabresd: Update DDR script to version 1.14Ye Li2017-04-05-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DDR script file: arik_r2_sdb_ddr3_528_1.14.inc Compass link: http://compass.freescale.net/livelink/livelink?func=ll&objid=235302593&objAction=browse&sort=name&viewType=1 Update: setmem /32 0x020e0534 = 0x00018200 // IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR02 (SDQS0_B_TRIM=01, SDQS0_TRIM=10) setmem /32 0x020e0538 = 0x00008000 // IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR03 (SDQS1_B_TRIM=00, SDQS1_TRIM=00) setmem /32 0x020e053C = 0x00018200 // IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR04 (SDQS2_B_TRIM=01, SDQS2_TRIM=10) setmem /32 0x020e0540 = 0x00018200 // IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR05 (SDQS3_B_TRIM=01, SDQS3_TRIM=10) setmem /32 0x020e0544 = 0x00018200 // IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR06 (SDQS4_B_TRIM=01, SDQS4_TRIM=10) setmem /32 0x020e0548 = 0x00018200 // IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR07 (SDQS5_B_TRIM=01, SDQS5_TRIM=10) setmem /32 0x020e054C = 0x00018200 // IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR08 (SDQS6_B_TRIM=01, SDQS6_TRIM=10) setmem /32 0x020e0550 = 0x00018200 // IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR09 (SDQS7_B_TRIM=01, SDQS7_TRIM=10) setmem /32 0x021b08c0 = 0x24912489 // fine tune SDCLK duty cyc to low - seen to improve measured duty cycle of i.mx6 setmem /32 0x021b48c0 = 0x24914452 setmem /32 0x021b0018 = 0x00011740 // MMDC0_MDMISC, RALAT=0x5, WALAT=0x1 Test: Passed stress memtester on one board. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit b7f43f47a78c9d0c14fe104daf22efab13709ab1) (cherry picked from commit f521de2c5b79ab7f9b60b26cbe6a7ad50cfce9fa)
* MLK-12436-9: mx6sabresd: update ddr scriptPeng Fan2017-04-05-79/+313
| | | | | | | | | | | | | Align ddr script with imx_v2016.03 latest ddr script. mx6qp.cfg is 1.13 version http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/8111e4d0cd81226899be637013048281e3c097b4 http://compass.freescale.net/livelink/livelink?func=ll&objId=234753630&objAction=browse&viewType=1 arik_r2_sabre_ddr3_528_1.13.inc is for sabre-AI arik_r2_sdb_ddr3_528_1.13.inc is for sabresd Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 39c2989e6ba0de6b35b2d93acd9d67f889ab4b39)
* MLK-12436-8: imx: mx6qsabreauto: misc board updatePeng Fan2017-04-05-38/+214
| | | | | | | | | | | | | | | | To Align with imx_v2016.03. 1. Add USDHC1 support on mother board 2. Add SPINOR flash support. 3. Add enet ref clk pinmux setting and enet settings 4. Use CONFIG_SYS_USE_EIMNOR to wrap eimnor settings. 5. update mmc board settings 6. update board_init and move nand settings to board_init, but not in board_early_init_f 7. update pmic settings to align with datasheet. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit f05f2281548ab7b47f69b2c517eb6f85ad09a5d2) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12436-7: imx: mx6qsabreauto: add solo board supportPeng Fan2017-04-05-0/+163
| | | | | | | | Add solo version ddr script and build target. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 54af2f744c663ac2326c1488a26fac0c4ccdad09) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14261-2 mx6solo: Add nosmp kernel bootargsYe Li2017-04-05-2/+9
| | | | | | | For i.MX6 SOLO sabreauto and sabresd boards, add the "nosmp" kernel bootargs. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14261-1 mx6solo: Rename the CONFIG_MX6SOLO to CONFIG_MX6SYe Li2017-04-05-4/+8
| | | | | | | | | | | | | Since there is already CONFIG_MX6S used for i.MX6 SOLO in u-boot codes, we don't need to add new CONFIG_MX6SOLO. Rename the existing CONFIG_MX6SOLO to CONFIG_MX6S. Additional, for CONFIG_MX6S, we should select CONFIG_MX6DL. The major difference for these two chips are core number and DDR controller. So all duallite relevant definitions can apply to solo. User can combine the two configs if any code only apply to solo or duallite. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12436-6: imx: mx6dqpsabreauto: update ddr script to 1.13Peng Fan2017-04-05-5/+6
| | | | | | | | | | | | | | | | | | | | DDR script: http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/8111e4d0cd81226899be637013048281e3c097b4 http://compass.freescale.net/livelink/livelink?func=ll&objId=234753630&objAction=browse&viewType=1 arik_r2_sabre_ddr3_528_1.13.inc is for sabre-AI Patch in imx_v2015.04: " commit 5fb08a4dcc7b8478fc4236b90ad8dc2190cf94e7 Author: Peng Fan <Peng.Fan@freescale.com> Date: Wed Nov 4 16:30:47 2015 +0800 "MLK-11825 imx: mx6dqp: update ddr script to 1.13" " Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit d756891b9d303e456f59a18d5fa81969a7f37337) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12436-4: mx6qarm2: update board headerPeng Fan2017-04-05-2/+4
| | | | | | | | | Define CONFIG_MMCROOT, CONFIG_SYS_MMC_ENV_PART to align with imx_v2016.03. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit b06ddb7a09346bf21028a239e77d5bf92469a284) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12436-3: mx6qarm2: add new board revision supportPeng Fan2017-04-05-0/+320
| | | | | | | | | | | | | | | | Add mx6qarm2 new board revision support using mx6q pop SoC Enable DRAM support for imx6q PoP SoC with populated LPDDR2 MT42L128M64D2 DDR calibration script: http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/040ee38ba9ad238fcb6053b663746d51321abb69 Test result: Stress test passed. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> (cherry picked from commit b0ac10892cad46c22accf89c04ea59c46bd9eb01)
* MLK-12436-2: mx6qarm2: update ddr scriptsPeng Fan2017-04-05-1/+176
| | | | | | | | | | | | | | | | | | | | | | | | ALign with imx_v2015.04. Also to lpddr2 support: From commit: "620cf5f3d4cf37b065b5857a8ea91d61bf6c471d" " Current uboot supports for running LPDDR2 at 400MHz on MX6Q ARM2 board, but there is a problem in switching pre_periph_clk_sel to pll2_pfd2. We cannot directly change the parent of pre_periph_clk_sel as this mux is not a glitchless mux. We need to follow the correct procedure and wait for the busy bits to clear before switching. Change to follow the procedure: 1. Set periph_clk2 to OSC. 2. Switch the periph_clk to periph_clk2, checking the CCM_CDHIPR for periph_clk , ahb_podf and axi_podf busy bits. 3. Setting the pre_periph_clk to PLL2 PFD 396M. 4. Switch the periph_clk back to pre_periph_clk and checking CCM_CDHIPR busy bits. " Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye.Li <ye.li@nxp.com> (cherry picked from commit febf98c68853030ce5c1f9124e77d75456e71314)
* MLK-12436-1: mx6qarm2: support i.MX6DQ PoP lpddr2 boardPeng Fan2017-04-05-2/+36
| | | | | | | Add the support for i.MX6DQ PoP lpddr2 ARM2 board. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit e8777e91a239599ffd231ef56c60d49b68e5e3fc)
* MLK-14250-6 mx6dq/dl: Add plugin boot support for arm2 boardsYe Li2017-04-05-2/+1304
| | | | | | | | | | | | | Add plugin.S for plugin boot initialization on mx6dq/dl arm2 board. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. New build configurations are added for the plugin: mx6dlarm2_lpddr2_plugin_defconfig mx6dlarm2_plugin_defconfig mx6qarm2_lpddr2_plugin_defconfig configs/mx6qarm2_plugin_defconfig Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-5 mx6ulevk: Add plugin boot supportYe Li2017-04-05-0/+446
| | | | | | | | | | Add plugin.S for plugin boot initialization. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add build configurations for the plugin: mx6ul_14x14_evk_plugin_defconfig mx6ul_9x9_evk_plugin_defconfig Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-4 mx6dq/dl/dqp: Add plugin boot support for sabre boardsYe Li2017-04-05-5/+1640
| | | | | | | | Add plugin.S for plugin boot initialization on mx6dq/dl/dqp sabresd and sabreauto boards. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add the configurations for the plugin enabled buiding. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-3 mx6sxsabreauto: Add plugin boot supportYe Li2017-04-05-1/+199
| | | | | | | | Add plugin.S for plugin boot initialization. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add the build configuration "mx6sxsabreauto_plugin_defconfig" to use the plugin. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-2 mx6sxsabresd: Add plugin boot supportYe Li2017-04-05-1/+176
| | | | | | | | Add plugin.S for plugin boot initialization. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add the build configuration "mx6sxsabresd_plugin_defconfig" to use the plugin. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-1 mx6slevk: Add plugin boot supportYe Li2017-04-05-1/+232
| | | | | | | | Add plugin.S for plugin boot initialization. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add the build configuration "mx6slevk_plugin_defconfig" to use the plugin. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-10647 armv7: Fix Dcache disable issue on i.MX7Ye.Li2017-04-05-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The issue on the i.MX7D is that, there is one cache-able memory access between the L1 and L2 cache flush by calling the flush_dache_all-> v7_maint_dcache_all() [Flush L1 and L2 cache) which written in the C code. L1-cache-flush -> This will flush L1 cache to L2 cache in the end. Cache-able memory access -> This will have the chance cause the L1 line-fill with dirty data from L2 cache(L1 cache-line dirty, L2 clean) L2-cache-flush -> This will only flush L2 cache to L3, but still some dirty data on the L1 cacheline. After C & M bit clean, -> The dirty data on the L1 cache line lost, which will cause memory coherent issue if that dirty cache line has some useful data The only problem here is: there is one cache-cable memory access between L1 and L2 cache flush. This patch should works fine on the i.MX6 and i.MX7. The second cache flush have zero impact on the i.MX6, but this is really need for the i.MX7D platform due to the L1 line-fill during the first dcache_flush. And the second flush will not bring in the L1 dirty cache line due to the C bit is clear now, which means the dcache is disabled. Acked-by: Jason Liu<r64343@freescale.com> Reviewed-by: Jason Liu<r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit f5d5f07fba936c4bb05c887de9d72fb75b3dc0f2) (cherry picked from commit 86c784cf4c4b633d37a76de7d47155c08f75dc82) (cherry picked from commit d85cd484e6825631aa1ab572e5e0539f2191d795) (cherry picked from commit 2b29c1873c2293abe1c4b361392521223b9c9ecf)
* MLK-13782 net: fec_mxc: specify the registered eth index by dev_idAndy Duan2017-04-05-2/+9
| | | | | | | Specify the registered eth index by dev_id. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit df42b7b0c5e6847f32419075eb25f274ed039d6f)
* MLK-13777 net: fec_mxc: avoid transfer dev_id -1 to get mac address from fuseAndy Duan2017-04-05-2/+2
| | | | | | | | Avoid transfer parameter dev_id value with "-1" to .fec_get_hwaddr(), it should transfer fec->dev_id to get mac address from fuse. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit 7e4a55b068311d46d16e86e697d36f34a59bf47a)
* MLK-13486: imx: logos: use NXP logoPeng Fan2017-04-05-0/+0
| | | | | | | | | Use NXP logo. The vendor and board dir not changed, only replace the contents of freescale.bmp. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 0b381fdf1a45cb06a057724e708ce0bbeee67f4d)
* MLK-13410 Android: Change to set mfgtool only for none android u-bootYe Li2017-04-05-2/+2
| | | | | | | | | | | The mfgtool environments only can set in BSP u-boot image, not for android u-boot. Since android u-boot may go into fastboot in board_r phase which is earlier than mfgtool environment check. The USB status from android fastboot will cause u-boot to configure mfgtool environment. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 066f001a19bdc51b0fc0d65bcb87081b01f957c2) (cherry picked from commit 03f995630f92462081e98412a0fbc86bb5106f10)
* MLK-13307-12 imx: mx6: update ccm macro settings for i.MX6SLLPeng Fan2017-04-05-10/+52
| | | | | | | | Update CCM macros for i.MX6SLL. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye.Li <ye.li@nxp.com> (cherry picked from commit f735f8ac328aa49759f6db524f7c2ba32622f711)
* MLK-13307-7 imx: mx6sll: update soc settingsPeng Fan2017-04-05-2/+11
| | | | | | | Update soc settings for i.MX6SLL. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit afa2d78f2b799337eae3dc67c0ed702d5520eee6)
* MLK-12883 usb: limit USB_MAX_XFER_BLK to 256Peng Fan2017-04-05-1/+3
| | | | | | | | | | | | | | | | | | | | For Some USB mass storage devices, such as: " - Kingston DataTraveler 2.0 001D7D06CF09B04199C7B3EA - Class: (from Interface) Mass Storage - PacketSize: 64 Configurations: 1 - Vendor: 0x0930 Product 0x6545 Version 1.16 " When `usb read 0x80000000 0 0x2000`, we met "EHCI timed out on TD - token=0x80008d80". The devices does not support scsi VPD page, we are not able to get the maximum transfer length for READ(10)/WRITE(10). So we limit this to 256 blocks as READ(6). Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit df0052575b2bc9d66ae73584768e1a457ed5d914)
* MLK-12444-2 mx6: Modify kernel and fdt load address to align with mfgtoolYe Li2017-04-05-4/+5
| | | | | | | | | Change the CONFIG_LOADADDR to 0x80800000 and environment variable "fdt_addr" to 0x83000000 for i.MX6SX, i.MX6SL and i.MX6UL to align the address used in mfgtool. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 41a6f612f6ae638ac6db61c60e19dcfebf052820)
* MLK-12444-1 mfgtool: Add mfgtool supportYe Li2017-04-05-1/+137
| | | | | | | | | | | | | If boot from usb, reset environment to default value. Auto apply mfgtools setting and boot mfgtools kernel. Porting this from fsl uboot to uboot 2016. The 7dsabresd has already added the environment and usb boot related functions. No need to add them more. Only need to add NAND parts environment for mfgtools. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit a352ed3c5184b95c4c9f7468f5fbb5f43de5e412)
* MLK-14259-3 mx6ulevk: Add support for NANDYe Li2017-04-05-2/+77
| | | | | | | Add NAND pinmux settings, clock setting and related configurations. Default not enabled, need hardware rework. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14259-2 mx6ulevk: Add PHYS_SDRAM_SIZE and CMA macroYe Li2017-04-05-0/+10
| | | | | | | | Define PHYS_SDRAM_SIZE future usage. Define CMA for kernel usage, default is 320MB, but we do not have enough memory on 9x9 evk lpddr2 board, so swith to 96MB. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14259-1 mx6ulevk: Change i.MX6UL EVK to non-SPL at defaultYe Li2017-04-05-22/+362
| | | | | | | Current i.MX6UL EVK boards enable the SPL u-boot. Change it to non-SPL for default configurations. Add two other build configurations for SPL. Signed-off-by: Ye Li <ye.li@nxp.com>
generated by cgit v1.1 at 2024-11-01 11:34:21 +0000