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| * board/freescale: use generic board architecture for p1010rdbYing Zhang2014-12-05-0/+2
| | | | | | | | | | | | | | | | Use generic board architecture for p1010rdb, tested with NOR boot on p1010rdb-pb. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/P5040DS: enable SATA supportShaohui Xie2014-12-05-0/+1
| | | | | | | | | | | | | | | | The define CONFIG_FSL_SATA_V2 is missing, so SATA is not available in U-boot. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/freescale: use generic board architecture for p1025-twrYing Zhang2014-12-05-0/+2
| | | | | | | | | | | | | | | | Use generic board architecture for p1025-twr, tested with NOR boot and NAND boot on p1025-twr. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t208xqds: VID supportYing Zhang2014-12-05-0/+542
| | | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx: modify erratum A007186Zhao Qiang2014-12-05-2/+28
| | | | | | | | | | | | | | | | | | | | | | T2080 v1.0 has this errata while v1.1 has fixed this errata by hardware, add a new function has_errata_a007186 to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first, if the sil has errata a007186, then run the errata code, if not, doesn't run the code. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/t104xrdb: Conditional workaround of errata A-008044Prabhakar Kushwaha2014-12-05-9/+16
| | | | | | | | | | | | | | | | | | | | Workaround of Errata A-008044 was implemented without errata number and it is enabled by default. Errata A-008044 is only valid for T1040 Rev 1.0. So put errata number and make it conditional. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx:Put errata number for T104x NAND boot issuePrabhakar Kushwaha2014-12-05-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | When device is configured to load RCW from NAND flash IFC_A[16:31] are driven low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using IFC_A[16:31] lines are not accessible. Workaround is already in-place. Put the errata number to adhere errata handling framework. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t1040qds: Update DDR optionYork Sun2014-12-05-3/+2
| | | | | | | | | | | | | | | | | | Enable interactive debugging by default. Remove DDR controller interleaving because this SoC only has one controller. Use auto chip-select interleaving to detect number of ranks. Signed-off-by: York Sun <yorksun@freescale.com> CC: Poonam Aggrwal <poonam.aggrwal@freescale.com>
| * mpc85xx/t2080: Fix parsing DDR ratio for new revisionYork Sun2014-12-05-3/+20
| | | | | | | | | | | | | | | | T2080 rev 1.1 changes MEM_RAT in RCW, which requires new parsing for ratio, the same way as T4240 rev 2.0. Signed-off-by: York Sun <yorksun@freescale.com> CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * mpc85xx/t208xqds: Adjust DDR timing parametersYork Sun2014-12-05-9/+8
| | | | | | | | | | | | | | | | | | | | | | Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of 1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in case such DIMM comes available. Also update single-rank 1866 timing. Enable interactive debugging as well. Signed-off-by: York Sun <yorksun@freescale.com> CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * powerpc/t2080: add serdes2 protocol 0x2eShengzhou Liu2014-12-05-0/+1
| | | | | | | | | | | | | | Add serdes2 protocol 0x2e. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * Freescale t104x: Do not exclude SGMIIJoakim Tjernlund2014-12-05-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | fman_port_enet_if() tests if FM1_DTSEC2 or FM1_DTSEC4 uses RGMII or MII and if not returns PHY_INTERFACE_MODE_NONE. This excludes testing for SGMII further down. Remove the unconditional "else return PHY_INTERFACE_MODE_NONE" so SGMII can be tested too. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Reviewed-by: York Sun <yorksun@freescale.com>
| * common: spl: Add interactive DDR debugger support for SPL imageAlison Wang2014-12-05-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support interactive DDR debugger, cli_simple.o, cli.o, cli_readline.o, command.o, s_record.o, xyzModem.o and cmd_disk.o are all needed for drivers/ddr/fsl/interactive.c. In current common/Makefile, the above .o files are only produced when CONFIG_SPL_BUILD is disabled. For LS102xA, interactive DDR debugger is needed in SD/NAND boot too, and I enabled CONFIG_FSL_DDR_INTERACTIVE. But according to the current common/Makfile, all the above .o files are not produced in SPL part because CONFIG_SPL_BUILD is enabled in SPL part, the following error will be shown, drivers/ddr/fsl/built-in.o: In function `fsl_ddr_interactive': /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1871: undefined reference to `cli_readline_into_buffer' /home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1873: undefined reference to `cli_simple_parse_line' make[1]: *** [spl/u-boot-spl] Error 1 make: *** [spl/u-boot-spl] Error 2 So this patch fixed this issue and the above .o files will be produced no matter CONFIG_SPL_BUILD is enabled or disabled. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-12-08-101/+870
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| * | ns16550.c: Fix for ns16550 driver hanging on OMAP4Gregoire Gentil2014-12-04-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | The same problem that is seen on some OMAP3 is also seen on some OMAP4 so include them in the test in order to prevent some hangs during SPL. [trini: Re-word commit message, make apply cleanly] Signed-off-by: Tom Rini <trini@ti.com>
| * | arm, am335x: siemens boards add FIT supportHeiko Schocher2014-12-04-19/+83
| | | | | | | | | | | | | | | | | | | | | | | | add FIT support and set "boardid" from factoryset records "DEV/id" and "COMP/ver". "boardid" is used for selecting which fit configuration gets booted on the board. Signed-off-by: Heiko Schocher <hs@denx.de>
| * | arm, am335x, siemens: read COMP/ver from factorysetHeiko Schocher2014-12-04-0/+11
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| * | arm, am335x, siemens: fix factoryset interpretationHeiko Schocher2014-12-04-8/+18
| | | | | | | | | | | | | | | | | | | | | | | | a record could contain other records, so after an ">" (begin mark) there not always come an end mark "<", instead a ">" is possible. Take care of this. Signed-off-by: Heiko Schocher <hs@denx.de>
| * | mtd: nand: omap_gpmc: Always use ready/busy pinStefan Roese2014-12-04-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions to detect the state of the ready / busy signal is already available but only used in the SPL case. Lets use it always, also for the main U-Boot. As all boards should have this HW connection. Testing on Siemens Draco (am335x) showed a small perfomance gain by using this ready pin to detect the NAND chip state. Here the values tested on Draco with Hynix 4GBit NAND: Without NAND ready pin: U-Boot# time nand read 80400000 0 400000 NAND read: device 0 offset 0x0, size 0x400000 4194304 bytes read: OK time: 2.947 seconds, 2947 ticks With NAND ready pin: U-Boot# time nand read 80400000 0 400000 NAND read: device 0 offset 0x0, size 0x400000 4194304 bytes read: OK time: 2.795 seconds, 2795 ticks So an increase of approx. 5%. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Samuel Egli <samuel.egli@siemens.com>
| * | arm: am33xx: Handle NAND+I2C boot-device the same way as NANDStefan Roese2014-12-04-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-map NAND&I2C boot-device to the "normal" NAND boot-device. Otherwise the SPL boot IF can't handle this device correctly. Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens Draco leads to this boot-device passed to SPL from the BootROM. With this change, Draco boots just fine into main U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Samuel Egli <samuel.egli@siemens.com>
| * | ARM: OMAP5: DRA7xx: Fix misleading comments in mux_data.hLubomir Popov2014-12-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comments on the QSPI pad assignments erronously swapped the qspi1_d0 and qspi1_d1 functionality and could cause confusion. QSPI1_D[0] is in fact muxed on pad U1 (gpmc_a16), and QSPI1_D[1] - on pad P3 (gpmc_a17). Fixing comments. Signed-off-by: Lubomir Popov <l-popov@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | ARM: OMAP5: DRA7xx: Enable 8-bit eMMC access on the dra7xx_evmLubomir Popov2014-12-04-0/+1
| | | | | | | | | | | | | | | | | | | | | Tested on a Vayu EVM Rev.E2 with DRA752 ES1.1 Signed-off-by: Lubomir Popov <l-popov@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | omap_hsmmc: Board-specific TWL4030 MMC power initializationsPaul Kocialkowski2014-12-04-6/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boards using the TWL4030 regulator may not all use the LDOs the same way (e.g. MMC2 power can be controlled by another LDO than VMMC2). This delegates TWL4030 MMC power initializations to board-specific functions, that may still call twl4030_power_mmc_init for the default behavior. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@ti.com> [trini: Fix omap3_evm warning, add twl4030.h] Signed-off-by: Tom Rini <trini@ti.com>
| * | twl4030: device-index-specific MMC power initializations, common ramp-up delayPaul Kocialkowski2014-12-04-14/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Not every device has multiple MMC slots available, so it makes sense to enable only the required LDOs for the available slots. Generic code in omap_hsmmc will enable both VMMC1 and VMMC2, in doubt. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@ti.com>
| * | mmc: Board-specific MMC power initializationsPaul Kocialkowski2014-12-04-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices may use non-standard combinations of regulators to power MMC: this allows these devices to provide a board-specific MMC power init function to set everything up in their own way. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@ti.com>
| * | beagle_x15: add board support for Beagle x15Felipe Balbi2014-12-04-0/+569
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BeagleBoard-X15 is the next generation Open Source Hardware BeagleBoard based on TI's AM5728 SoC featuring dual core 1.5GHZ A15 processor. The platform features 2GB DDR3L (w/dual 32bit busses), eSATA, 3 USB3.0 ports, integrated HDMI (1920x108@60), separate LCD port, video In port, 4GB eMMC, uSD, Analog audio in/out, dual 1G Ethernet. For more information, refer to: http://www.elinux.org/Beagleboard:BeagleBoard-X15 Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | arm: omap: add support for am57xx devicesFelipe Balbi2014-12-04-11/+16
| | | | | | | | | | | | | | | | | | | | | | | | just add a few ifdefs around because this device is very similar to dra7xxx. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | arm: omap_common: expose tps659038 and dra7xx_dpllsFelipe Balbi2014-12-04-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | expose those two definitions so they can be used by another board which we're adding in upcoming patches. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | arm: omap5: sdram: mark emif_get_ext_phy_ctrl_const_regs __weakFelipe Balbi2014-12-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | this will allow for boards to overwrite those in case memory setup is different. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | arm: omap5: make hw_init_data weakFelipe Balbi2014-12-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | this way we can let boards overwrite based on what they need. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | configs: omap5_common : Boot rootfs from sd card by defaultFranklin S Cooper Jr2014-12-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Since the emmc isn't always programed trying to load the fs from the emmc causes boot failures/kernel panic. * The current bootcmd is set to: bootcmd=run findfdt; run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; \ setenv mmcroot /dev/mmcblk0p2 rw; run mmcboot; My guess is the env variables should be set so that sd card boot (dt,kernel,fs) is the default and then fallback to emmc if it fails (no sd card detected) The current bootcmd attempts to set mmcroot to the sd card rootfs but that code doesn't run due to mmcboot being ran early on. Signed-off-by: Franklin Cooper Jr. <fcooper@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | arm: omap-common: emif: allow to map memory without interleavingFelipe Balbi2014-12-04-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | If we want to have two sections, one on each EMIF, without interleaving, current code wouldn't enable emif2. Fix that problem. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | usb: phy: omap_usb_phy: fix build breakageFelipe Balbi2014-12-04-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | there's no such function usb3_phy_power(), it's likely that author meant to call, usb_phy_power() instead, but that's already called properly from xhci-omap.c. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | arm: dra7xx: prcm: add missing registersFelipe Balbi2014-12-04-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | some boards might want to use USB1 for host, without fiddling those registers it'll be impossible. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | arm: omap5: tps659038: rename regulator definesFelipe Balbi2014-12-04-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Those regulators don't have any coupling with what they supply, so remove the suffixes in order to not confuse anybody. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | arm: omap5: don't enable misc_init_r by defaultFelipe Balbi2014-12-04-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Out of all OMAP5-like boards, only one of them needs CONFIG_MISC_INIT_R, so it's best to enable that for that particular board only, instead of enabling for all boards unconditionally. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | Merge git://git.denx.de/u-boot-i2cTom Rini2014-12-08-4/+4
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| * | | i2c: Correct spelling errorMark Tomlinson2014-12-08-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | "diconnect" and "disconnet" should both be "disconnect". Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
| * | | i2c: Fix deselection of muxesMark Tomlinson2014-12-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to an uninitialised variable, when muxes were deselected, any value could be written to the mux control register. On the PCA9548, this could result in multiple channels being selected, thus enabling multiple pull-up resistors, and much bus capacitance. The fix is simply to initialise the written value to zero. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2014-12-08-301/+611
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| * | | | ARM: UniPhier: detect the number of flash banks at run-timeMasahiro Yamada2014-12-09-51/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some UniPhier boards are equipped with an expansion slot that some optional SRAM/NOR-flash cards can be attached to. So, run-time detection of the number of flash banks would be more user-friendly. Until this commit, UniPhier boards have achieved this by (ab)using board_flash_wp_on() because the boot failed if flash_size got zero. Fortunately, this problem was solved by commit 70879a92561a (flash: do not fail even if flash_size is zero). Now it is possible to throw away such a tricky workaround. This commit also enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT for further refactoring. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | ARM: UniPhier: extend register area of init page table for PH1-sLD3Masahiro Yamada2014-12-09-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0x20000000-0x2fffffff: assigned to ARM mpcore (sLD3 only) 0xf0000000-0xffffffff: assigned to Denali NAND controller (sLD3 only) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | ARM: UniPhier: add device tree sources for PH1-sLD3Masahiro Yamada2014-12-09-0/+186
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | ARM: UniPhier: add more device nodes to device treeMasahiro Yamada2014-12-09-15/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add I2C controller and NAND controller devices. Fix indentation too. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | ARM: UniPhier: merge UniPhier config headers into a single fileMasahiro Yamada2014-12-08-119/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some configurations have been moved to Kconfig and the difference among the config headers of UniPhier SoC variants is getting smaller and smaller. Now is a good time to merge them into a single file. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | ARM: UniPhier: move support card select to KconfigMasahiro Yamada2014-12-08-51/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two kinds of expansion boards which are often used for the UniPhier platform and they are only exclusively selectable. It can be better described by the "choice" menu of Kconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | ARM: UniPhier: move CONFIG_UNIPHIER_SMP to KconfigMasahiro Yamada2014-12-08-2/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | ARM: UniPhier: use boot_is_swapped() macro for readabilityMasahiro Yamada2014-12-08-10/+10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | ARM: UniPhier: disable autostart by defaultMasahiro Yamada2014-12-08-1/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | flash: do not fail even if flash_size is zeroMasahiro Yamada2014-12-08-15/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_MAX_FLASH_BANKS_DETECT allows to determine the number of flash banks at run-time, that is, there is a possibility that no flash bank is found. Even in such cases, it makes sense to continue the boot process without any flash device. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-11-06 23:36:54 +0000