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| * | | patman: Add a tools library for using temporary filesSimon Glass2016-09-18-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For tools which want to use input files and temporary output, it is useful to have the handling of these dealt with in one place. Add a new library which allows input files to be read, and output files to be written, all based on a common directory structure. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move a few more common functions into fdt.pySimon Glass2016-09-18-32/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some functions have the same code in the subclasses. Move these into the superclass to avoid duplication. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move Widen() and GetPhandle() into the base classSimon Glass2016-09-18-83/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are identical in both subclasses. Move them into the base class. Note: In fact there is a bug in one version, which was fixed by this patch: https://patchwork.ozlabs.org/patch/651697/ Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move BytesToValue() and GetEmpty() into PropBaseSimon Glass2016-09-18-79/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are currently in a separate fdt_util file. Since they are only used from PropBase and subclasses, it makes sense for them to be in the PropBase class. Move these functions into fdt.py along with the list of types. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Create a base class for FdtSimon Glass2016-09-18-48/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we have two separate implementations of the Fdt library, one which uses fdtget/fdtput and one which uses libfdt (via swig). Before adding more functionality it makes sense to create a base class for these. This will allow common functions to be shared, and make the Fdt API a little clearer. Create a new fdt.py file with the base class, and adjust fdt_normal.py and fdt_fallback.py to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Rename fdt.py to fdt_normal.pySimon Glass2016-09-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for creating an Fdt base class, rename this file to indicate it is the normal Fdt implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move the fdt library selection into fdt_selectSimon Glass2016-09-18-15/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than have dtc worry about which fdt library to use, move this into a helper file. Add a function which creates a new Fdt object and scans it, regardless of the implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dtoc: Move the struct import into the correct orderSimon Glass2016-09-18-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | This should be in with the other system includes. Move it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | patman: Adjust command.Output() to raise an error by defaultSimon Glass2016-09-18-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is more useful to have this method raise an error when something goes wrong. Make this the default and adjust the few callers that don't want to use it this way. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: Add "host size" hostfs command for fs testStefan Brüns2016-09-18-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This complements the size/fatsize/ext4size commands added in commit cf6598193aed5de8855eaf70c1994f2bc437255a load, save and ls are already implemented for hostfs, now tests can cover the same operations on hostfs and emulated block devices. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: document support of block device emulationStefan Brüns2016-09-18-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org> Changed 'Sandbox' to 'sandbox' in subject: Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | PowerPC: Update last users of CONFIG_ISO_STRING to KconfigTom Rini2016-09-20-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a few boards that use CONFIG_ISO_STRING as part of a sanity check during firmware update at run time. Move this string to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | PowerPC: Update MIP405/MIP405T to use Kconfig betterTom Rini2016-09-20-45/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config There are two boards, MIP405 and MIP405T that have a few differences. Start by checking for CONFIG_TARGET_MIP405. Then introduce CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T. Next, convert also convert the usage of CONFIG_ISO_STRING to be based on Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | Kconfig: Move config IDENT_STRING to KconfigSiva Durga Prasad Paladugu2016-09-20-239/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the config IDENT_STRING to Kconfig and migrate all boards [sivadur: Migrate zynq boards] Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [trini: Update configs, add some default to sunxi Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | configs: Re-syncTom Rini2016-09-20-92/+85
| |/ / |/| | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"Masahiro Yamada2016-09-19-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 90c08d9e08c7a108ab904f3bbdeb558081757892. I took a closer look at this after the commit was applied, and found CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is actually too big for some boards. Perhaps 0x800 is enough, but the situation varies board by board. Let's postpone our decision until we come up with a better idea. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | A20-OLinuXino-Lime2: Enable USB gadget supportTom Rini2016-09-19-0/+8
|/ / | | | | | | | | | | | | Based on A13-OLinuXino, enable DFU and UMS support. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-09-18-1179/+1472
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| * | ARM: uniphier: update DRAM init code for LD20 SoCMasahiro Yamada2016-09-19-62/+447
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import the latest version from the Diag software. - Support LD21 SoC (including DDR chips in the package) - Per-board granule adjustment for both reference and TV boards - Misc cleanups Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: add PLL init code for LD20 SoCMasahiro Yamada2016-09-19-5/+234
| | | | | | | | | | | | | | | | | | | | | | | | Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: collect clock/PLL init code into a single directoryMasahiro Yamada2016-09-19-24/+18
| | | | | | | | | | | | | | | | | | | | | | | | Now PLLs for DRAM controller are initialized in SPL, and the others in U-Boot proper. Setting up all of them in a single directory will be helpful when we want to share code between SPL and U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: move PLL init code to U-Boot proper where possibleMasahiro Yamada2016-09-19-495/+365
| | | | | | | | | | | | | | | | | | | | | | | | The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: rename CONFIG_DPLL_SSC_RATE_1PERMasahiro Yamada2016-09-18-1/+1
| | | | | | | | | | | | | | | | | | Basically, this should not be configured by users. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20Masahiro Yamada2016-09-18-31/+10
| | | | | | | | | | | | | | | | | | | | | This is the last code in the mach-uniphier/pinctrl/ directory. Push the remaining code out to delete the directory entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20Masahiro Yamada2016-09-18-44/+5
| | | | | | | | | | | | | | | | | | | | | Use the pin-mux data in the pinctrl drivers by directly calling pinctrl_generic_set_state(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: dts: uniphier: include System Bus pin group node in SPL DTMasahiro Yamada2016-09-18-0/+8
| | | | | | | | | | | | | | | | | | | | | This will be needed for setting up the System Bus pin-mux via the LD11/LD20 pinctrl driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: consolidate NAND pin-mux settingsMasahiro Yamada2016-09-18-274/+51
| | | | | | | | | | | | | | | | | | | | | | | | The NAND subsystem has not supported the Driver Model yet, but the NAND pin-mux data are already in the pinctrl drivers. Use them by calling pinctrl_generic_set_state() directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: remove ad-hoc pin-mux code for sLD3Masahiro Yamada2016-09-18-58/+0
| | | | | | | | | | | | | | | | | | These settings are nicely cared by the pinctrl driver now. Remove. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: remove redundant pin-muxing for EA24 pin of sLD3 SoCMasahiro Yamada2016-09-18-2/+0
| | | | | | | | | | | | | | | | | | This is enabled by default for all the supported boot modes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: select PINCTRL and SPL_PINCTRLMasahiro Yamada2016-09-18-10/+2
| | | | | | | | | | | | | | | | | | | | | Now all UniPhier SoCs support a pinctrl driver. Select (SPL_)PINCTRL since it is mandatory even for base use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: dts: uniphier: add pinctrl device node and pinctrl propertiesMasahiro Yamada2016-09-18-0/+43
| | | | | | | | | | | | | | | | | | DT-side updates to make pinctrl on sLD3 SoC really available. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | pinctrl: uniphier: add UniPhier sLD3 pinctrl driverMasahiro Yamada2016-09-18-0/+135
| | | | | | | | | | | | | | | | | | Add pin-mux support for UniPhier sLD3 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | pinctrl: uniphier: support 4bit-width pin-mux register capabilityMasahiro Yamada2016-09-18-14/+11
| | | | | | | | | | | | | | | | | | | | | On LD4 SoC or later, the pin-mux registers are 8bit wide, while 4bit wide on sLD3 SoC. Support it for the sLD3 pinctrl driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: introduce flags to adjust DRAM timing for LD20/LD21Masahiro Yamada2016-09-17-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately, this SoC needs per-board adjustment between clock and address/command lines. This flag will be passed to the DRAM init function and used for compensating the difference of DRAM timing parameters. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: fix DRAM size of LD21 SoC packageMasahiro Yamada2016-09-17-1/+1
| | | | | | | | | | | | | | | | | | The channel 0 DRAM size of LD21 is half of that of LD20. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: merge board init functions into board_init()Masahiro Yamada2016-09-14-42/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the UniPhier platform calls several init functions in the following order: [1] spl_board_init() [2] board_early_init_f() [3] board_init() [4] board_early_init_r() [5] board_late_init() The serial console is not ready at the point of [2], so we want to avoid using [2] from the view point of debuggability. Fortunately, all of the initialization in [2] can be delayed until [3]. I see no good reason to split into [3] and [4]. So, merge [2] through [4]. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: use checkboard() instead of misc_init_f()Masahiro Yamada2016-09-14-25/+7
| | | | | | | | | | | | | | | | | | | | | We can use checkboard() stub to show additional board information, so misc_init_f() should not be used for this purpose. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: remove IECTRL setup code of LD4 SoCMasahiro Yamada2016-09-14-6/+0
| | | | | | | | | | | | | | | | | | This should be handled by the pinctrl driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | pinctrl: uniphier: move register base macros from header to .c fileMasahiro Yamada2016-09-14-4/+4
| | | | | | | | | | | | | | | | | | | | | These macros are only referenced in pinctrl-uniphier-core.c, so they need not reside in a header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | pinctrl: uniphier: add System Bus pin-mux settingsMasahiro Yamada2016-09-14-0/+147
| | | | | | | | | | | | | | | | | | This is needed to get access to UniPhier System Bus (external bus). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | mmc: uniphier-sd: migrate to CONFIG_BLKMasahiro Yamada2016-09-14-26/+26
| | | | | | | | | | | | | | | | | | | | | This is the state-of-the-art MMC driver implementation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | ARM: uniphier: enable Generic EHCI driver for Pro4 SoCMasahiro Yamada2016-09-14-0/+2
| | | | | | | | | | | | | | | | | | | | | This SoC is equipped with two EHCI cores and two xHCI cores. Enable the generic EHCI driver for the former. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: delete unnecessary xHCI pin-mux settingsMasahiro Yamada2016-09-14-48/+0
| | | | | | | | | | | | | | | | | | | | | These ad-hoc pinmux settings were used for the legacy xHCI driver, which has gone now. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | usb: uniphier: remove UniPhier xHCI driver and select DM_USBMasahiro Yamada2016-09-14-97/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * | ARM: uniphier: sort select:s alphabeticallyMasahiro Yamada2016-09-14-7/+7
| |/ | | | | | | | | | | | | ARCH_UNIPHIER is having more and more select:s. Sort them in case a select is accidentally duplicated. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-sunxiTom Rini2016-09-18-34/+209
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| * | sunxi: Enable USB gadget support for Sinlinx SinA33Chen-Yu Tsai2016-09-18-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sinlinx SinA33 has a USB OTG port, but VBUS is controlled manually from a jumper pad. Enable OTG in gadget mode, as well as the download gadget and related functions. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Enable USB host support for Sinlinx SinA33Chen-Yu Tsai2016-09-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sinlinx SinA33 has 1 USB host port. Enable EHCI_HCD support for it. Also enable USB mass storage support so we can access USB sticks. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Add mmc0 card detect pin for Sinlinx SinA33Chen-Yu Tsai2016-09-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Sinlinx SinA33 uses PB4 for mmc0 card detect. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Add defconfig and dts for the NanoPi NEOJelle van der Waa2016-09-18-1/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | The NanoPi NEO is a simple h3 board with 512MB RAM, ethernet, one usb and one usb OTG connector. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
generated by cgit v1.1 at 2024-11-08 18:59:32 +0000