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| * | | sunxi: gpio: Build sunxi_name_to_gpio_bank for driver-model code tooHans de Goede2015-05-04-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When doing a driver-model enabled build we still need sunxi_name_to_gpio_bank (for now) for the mmc pinmux code in board/sunxi/board.c, so build it for driver-model enabled builds too. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: gpio: Add compatible strings for all supported SoCsHans de Goede2015-05-04-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We want to use driver-model/fdt with other model SoCs too, so add compatible strings for the other SoCs to the dm sunxi gpio code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: gpio: Add temporary implementation of name_to_gpio()Simon Glass2015-05-04-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until sunxi moves to device tree (e.g. for USB) we need to convert named GPIOs to numbers. Add a function to do this. This fixes the USB / EHCI support not working on the LinkSprite pcDuino3 (which uses devicemodel). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: gpio: Rename GPIOs to include a 'P' prefixSimon Glass2015-05-04-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By convention, sunxi GPIOs are named PA1, PA2 instead of A1, A2. Change the driver model GPIO driver for sunxi to use these names. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: soft-i2c: Fix gpio handling to work with the driver-modelHans de Goede2015-05-04-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i2c_init_board() gets called before the driver-model (gpio) code is initialized, so move the setup of the soft-i2c pins out of i2c_init_board() and into board_init(), at which time the driver-model setup has been done. Also add proper error checking and properly request the gpios as that is mandatory with the driver-model. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: display: Fix gpio handling to work with the driver-modelHans de Goede2015-05-04-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver-model gpio functions may return another value then -1 as error, make the sunxi display code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usbc: Fix vbus gpio handling to work with the driver-modelHans de Goede2015-05-04-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver-model gpio functions may return another value then -1 as error, make the sunxi usbc properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: mmc: Fix card-detect gpio handling to work with the driver-modelHans de Goede2015-05-04-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Do not build i2c support when we've no i2c controllersHans de Goede2015-05-04-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following errors being printed during boot: Error, wrong i2c adapter 0 max 0 possible Error, wrong i2c adapter 0 max 0 possible Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Add Ippo_q8h_v1_2_a33_1024x600 defconfigHans de Goede2015-05-04-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a defconfig for generic 7" tablets using the Ippo q8h v1.2 pcb, with an A33 SoC (the pcb can take an A23 or an A33), and a 1024x600 LCD. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Add softwinner astar mid756 A33 tablet board defconfigVishnu Patekar2015-05-04-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Astar MID756 is a 7" tablet using the A33 SoC with a 800x480 LCD screen, 512M RAM, 8G ROM and integrated sdio wifi. Also see: http://linux-sunxi.org/Softwinner_astar-rda Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Add basic A33 basic supportVishnu Patekar2015-05-04-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable full support for the A33 SoC including display, otg-usb, etc. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Add a33 dram init codeVishnu Patekar2015-05-04-0/+544
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Allwinner dram init code from the a33 bsp: https://github.com/allwinner-zh/bootloader/blob/master/basic_loader/bsp/bsp_for_a33/init_dram/mctl_hal.c Initial u-boot port by Vishnu Patekar, major cleanup / rewrite by Hans de Goede. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Add support for A33 PLL11 (second DRAM pll)Hans de Goede2015-05-04-3/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the new second DRAM PLL found on the A33 SoC. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: s/sun8i/sun8i_a23/Hans de Goede2015-05-04-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a preparation patch for adding A33 support, which will have a mach name of sun8i-a33. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig boolHans de Goede2015-05-04-21/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usbc: Remove unused irq fieldHans de Goede2015-05-04-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We do not use irqs in u-boot so remove the unused irq field, and all the #ifdef-ery around the irq initialization. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Also set Auxiliary Ctl SMP bit in SPLHans de Goede2015-05-04-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason not to and this make the #ifdef-ery easier to read. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun7i: Remove duplicate call to psci_arch_initJan Kiszka2015-05-02-1/+0
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is already invoked a few cycles later in monitor mode by _secure_monitor (_sunxi_cpu_entry calls _do_nonsec_entry which triggers _secure_monitor via smc #0). Drop it here, it serves no purpose. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | x86: Enable multi-core init for Minnowboard MAXSimon Glass2015-04-30-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | Enable the CPU uclass and Simple Firmware interface for Minnowbaord MAX. This enables multi-core support in Linux. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add a CPU driver for baytrailSimon Glass2015-04-30-6/+227
| | | | | | | | | | | | | | | | | | | | | | | | This driver supports multi-core init and sets up the CPU frequencies correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Allow CPUs to be set up after relocationSimon Glass2015-04-30-1/+55
| | | | | | | | | | | | | | | | | | | | | | | | This permits init of additional CPU cores after relocation and when driver model is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add functions to set and clear bits on MSRsSimon Glass2015-04-30-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | Since we do these sorts of operations a lot, it is useful to have a simpler API, similar to clrsetbits_le32(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add multi-processor initSimon Glass2015-04-30-7/+934
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most modern x86 CPUs include more than one CPU core. The OS normally requires that these 'Application Processors' (APs) be brought up by the boot loader. Add the required support to U-Boot to init additional APs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Provide access to the IDTSimon Glass2015-04-29-0/+7
| | | | | | | | | | | | | | | | | | | | | Add a function to return the address of the Interrupt Descriptor Table. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Store the GDT pointer in global_dataSimon Glass2015-04-29-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | When we start up additional CPUs we want them to use the same Global Descriptor Table. Store the address of this in global_data so we can reference it later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add an mfence macroSimon Glass2015-04-29-0/+5
| | | | | | | | | | | | | | | | | | | | | Provide access to this x86 instruction from C code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add defines for fixed MTRRsSimon Glass2015-04-29-0/+14
| | | | | | | | | | | | | | | | | | | | | Add MSR numbers for the fixed MTRRs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add atomic operationsSimon Glass2015-04-29-0/+115
| | | | | | | | | | | | | | | | | | | | | | | | Add a subset of this header file from Linux 4.0 to support atomic operations in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | Add a 'cpu' command to print CPU informationSimon Glass2015-04-29-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | Add a simple command which provides access to a list of available CPUs along with descriptions and basic information. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Add support for the Simple Firmware Interface (SFI)Simon Glass2015-04-29-0/+311
| | | | | | | | | | | | | | | | | | | | | | | | | | | This provides a way of passing information to Linux without requiring the full ACPI horror. Provide a rudimentary implementation sufficient to be recognised and parsed by Linux. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | dm: Implement a CPU uclassSimon Glass2015-04-29-0/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to keep track of the available CPUs in a multi-CPU system. This uclass is mostly intended for use with SMP systems. The uclass provides methods for getting basic information about each CPU. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | Add print_freq() to display frequencies nicelySimon Glass2015-04-29-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function similar to print_size() that works for frequencies. It can handle from Hz to GHz. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* | | Move display_options functions to their own headerSimon Glass2015-04-29-28/+49
| | | | | | | | | | | | | | | | | | | | | | | | Before adding one more function, create a separate header to help reduce the size of common.h. Add the missing function comments and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Disable -WerrorSimon Glass2015-04-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is annoying during development and serves no useful purpose since warnings are clearly displayed now that we are using Kbuild. Remove this option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Remove unwanted MMC debuggingSimon Glass2015-04-29-1/+0
| | | | | | | | | | | | | | | | | | | | | This printf() should not have made it into the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | dm: core: Add a function to bind a driver for a device tree nodeSimon Glass2015-04-29-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | Some device tree nodes do not have compatible strings but do require drivers. This is pretty rare, and somewhat unfortunate. Add a function to permit creation of a driver for any device tree node. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Fix comment nits in board_f.cSimon Glass2015-04-29-5/+4
| | | | | | | | | | | | | | | | | | | | | Try to make it a little clearer. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: fsp: Use reset_cpu()Simon Glass2015-04-29-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | Now that reset_cpu() functions correctly, use it instead of directly accessing the port on boards that use a Firmware Support Package (FSP). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: quark: Use reset_cpu()Simon Glass2015-04-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that reset_cpu() functions correctly, use it instead of directly accessing the port. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: ivybridge: Use reset_cpu()Simon Glass2015-04-29-15/+6
| | | | | | | | | | | | | | | | | | | | | | | | Now that reset_cpu() functions correctly, use it instead of directly accessing the port. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: Implement reset_cpu() correctly for modern CPUsSimon Glass2015-04-29-13/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing code is pretty ancient and is unreliable on modern hardware. Generally it will hang. We can use port 0xcf9 to initiate reset on more modern hardware (say in the last 10 years). Update the reset_cpu() function to do this, and add a new 'full reset' function to perform a full power cycle. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | x86: link: Add PCH driver to support SPI FlashSimon Glass2015-04-29-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | U-Boot on coreboot does not have a driver for the PCH so cannot see the SPI peripheral now that it has moved inside the PCH. Add a simple driver so that SPI flash works again. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | x86: Update chromebook_link instructions for binary blobSimon Glass2015-04-29-1/+1
| | | | | | | | | | | | | | | | | | | | | The MRC image is incorrect, or at least this one now does not seem to work. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | x86: minnowmax: use the correct NOR in the configurationGabriel Huau2015-04-29-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The SPI NOR on the minnowboard max is a MICRON N25Q064A Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Correct the typo in write_tables()Bin Meng2015-04-29-1/+1
| | | | | | | | | | | | | | | | | | | | | It should be #ifdef instead of #if. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Kconfig: Remove deprecated CONFIG_SYS_EXTRA_OPTIONSBin Meng2015-04-29-7/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently all x86 boards still use CONFIG_SYS_EXTRA_OPTIONS to define the text base address. Since it is deprecated, just remove it and use CONFIG_SYS_TEXT_BASE directly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/KconfigBin Meng2015-04-29-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since all x86 boards have been converted to use DM_SPI and DM_SPI_FLASH, move them to arch/Kconfig x86 section. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Kconfig: MARK_GRAPHICS_MEM_WRCOMB cosmeticsBin Meng2015-04-29-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Remove the ending period of the MARK_GRAPHICS_MEM_WRCOMB option. Also fix the indention of its help text. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Kconfig: Move platform options forwardBin Meng2015-04-29-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move platform-specific options under in arch/x86/Kconfig forward right after the board-specific options but before any architecture-specific options. When it comes to the same Kconfig option, board-specific one takes take the highest precedence, then platform-specific one, and finally architecture-specific one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-08 19:17:11 +0000