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* Merge branch 'master' of git://www.denx.de/git/u-boot-uniphierTom Rini2016-04-25-174/+1151
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| * ARM: uniphier: speed up loading kernel image from NOR deviceMasahiro Yamada2016-04-24-1/+2
| | | | | | | | | | | | Copy the kernel image double-word-wise rather than byte-wise. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * clk: uniphier: add Media I/O clock driver support for PH1-LD20Masahiro Yamada2016-04-24-0/+4
| | | | | | | | | | | | PH1-LD20 needs this for its SD card controller. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: add SD controller node for PH1-LD20Masahiro Yamada2016-04-24-0/+17
| | | | | | | | | | | | | | PH1-LD20 does not support 1.8V signaling for SD card; only Default Speed and High Speed (up to 50MHz) with 3.3V signaling is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: reserve the last 64 byte of SDRAMMasahiro Yamada2016-04-24-0/+2
| | | | | | | | | | | | | | The last 64 byte of each DDR channel of PH1-LD20 is periodically used as a scratch area for the DDR PHY training. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: add PH1-LD20 SoC supportMasahiro Yamada2016-04-24-10/+956
| | | | | | | | | | | | This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: rework uniphier_set_fdt_file()Masahiro Yamada2016-04-24-31/+31
| | | | | | | | | | | | | | | | | | | | | | | | The current table look-up for the DTB file name turned out bothersome in terms of maintainability; I ended up adding a new entry every time a new board is supported. There is a common pattern between the DT compatible string and the corresponding file name; drop the vendor prefix "socionext," and prefix it with "uniphier-" and suffix it with ".dtb". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: carry on booting for Unknown boot modeMasahiro Yamada2016-04-24-2/+2
| | | | | | | | | | | | | | | | No need to stop booting U-Boot even if boot mode is unknown. Setting the "bootmode" environment is only useful for booting Linux Kernel. Anyway, U-Boot has already booted by this point. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: add sg_set_iectrl_range()Masahiro Yamada2016-04-24-0/+8
| | | | | | | | | | | | | | | | For PH1-LD20 or later, per-pin input-enable control is supported, that is, we need to set-up IECTRL registers for a group of pins. This helper function will be useful for a bunch of register settings. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: move aliases node up to satisfy fdtgrepMasahiro Yamada2016-04-24-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, fdtgrep would not accept uniphier-ph1-ld20-ref.dtb and uniphier-ph1-ld11-ref.dtb unless the aliases node comes the first in the root node. $ make -s uniphier_pxs2_ld6b_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld20-ref [snip] LDS spl/u-boot-spl.lds LD spl/u-boot-spl OBJCOPY spl/u-boot-spl-nodtb.bin FDTGREP spl/u-boot-spl.dtb Error at 'fdt_find_regions': FDT_ERR_BADLAYOUT /aliases node must come before all other nodes Error: FDT_ERR_BADMAGIC make[1]: *** [spl/u-boot-spl.dtb] Error 1 make: *** [spl/u-boot-spl] Error 2 This commit moves the aliases node as the error message from the fdtgrep tool suggests, although this requirement does not sound reasonable to me. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: use Ref Daughter board on PH1-LD20 Ref boardMasahiro Yamada2016-04-24-0/+1
| | | | | | | | | | | | | | This makes the EEPROM device on the Reference Daughter board available. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: avoid unaligned access to DT on 64bit SoCMasahiro Yamada2016-04-24-6/+4
| | | | | | | | | | | | | | Because DT properties are 4-byte aligned, the pointer access *(fdt64_t *) in this code causes unaligned access. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * pinctrl: uniphier: fix NAND and SD pin-mux settings for PH1-LD11/LD20Masahiro Yamada2016-04-24-4/+4
| | | | | | | | | | | | | | I found many mistakes in the initial version. Fixes: 8a3328c209d0 ("pinctrl: uniphier: support UniPhier PH1-LD20 pinctrl driver") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * pinctrl: uniphier: rename function/array namesMasahiro Yamada2016-04-24-102/+102
| | | | | | | | | | | | Make function/array names match the file names for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-usbTom Rini2016-04-25-56/+119
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| * | dfu: ram: fix number base of RAM entity parametersStephen Warren2016-04-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot typically interprets unprefixed numbers as base 16, and DFU RAM entity parsing has historically done so. Reverse the change to default to base 10, so that values in previously working command-lines aren't mis-parsed, causing RAM corruption, crashes, hangs, etc. Fixes: 6aeb877afef0 ("drivers: dfu: ram: fix a crash with dfu ram with invalid dfu_alt_info env") Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> [Test HW: AM335x BBB]
| * | drivers: dfu: ram: fix a crash with dfu ram with invalid dfu_alt_info envMugunthan V N2016-04-25-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot crashes when an invalid dfu_alt_info is set and tried using dfu command. Fixing this as it is handled in dfu-mmc. => dfu 0 ram 0 data abort pc : [<9ff893d6>] lr : [<9ff6edb9>] reloc pc : [<808323d6>] lr : [<80817db9>] sp : 9ef36cf0 ip : 00000158 fp : 9ffbc0b8 r10: 9ffbc0b8 r9 : 9ef36ed8 r8 : 00000000 r7 : 00000000 r6 : 9ffbc0c8 r5 : 9ef36cfc r4 : 9ef392c8 r3 : 00000004 r2 : 00000000 r1 : 9ff9a985 r0 : ffffffff Flags: Nzcv IRQs off FIQs on Mode SVC_32 Resetting CPU ... resetting ... Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | usb: s3c-otg: Fix remaining bytes in debug messagesRoger Quadros2016-04-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remaining bytes means bytes that are not yet transferred and not the bytes that were transferred in the last transfer. Reported-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <srae@broadcom.com> [Test HW: bcm28155_ap board]
| * | usb: s3c-otg: Fix short packet for request size > ep.maxpacketRoger Quadros2016-04-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Request size can be greater than ep.packet and still end in a short packet. We need to tackle this case as end of transfer (if short_not_ok is not set) as indicated in USB 2.0 Specification [1], else we get stuck up on certain protocols like fastboot. [1] - USB2.0 Specification, Section 5.3.2 Pipes Reported-by: Steve Rae <steve.rae@broadcom.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <steve.rae@broadcom.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
| * | fastboot: Clean up bulk-out logicRoger Quadros2016-04-25-27/+23
| | | | | | | | | | | | | | | | | | | | | | | | Just use ep->maxpacket to get the maxpacket size and simplify the bulk-out maxpacket alignment. Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <srae@broadcom.com>
| * | fastboot: Enable the respective speed endpoints at runtimeRoger Quadros2016-04-25-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a dual speed configuration we need to check at runtime if we want to enable the Full-Speed or High-Speed endpoint. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Steve Rae <srae@broadcom.com> [Test HW: bcm235xx board]
| * | fastboot: Fix wMaxPacketSize for High-Speed IN endpointRoger Quadros2016-04-25-9/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | wMaxPacketSize for IN endpoing in High-Speed must be 512 and not 64. While fixing that we do some clean ups like - use cpu_to_le16(decimal_length) instead of hexadecimal length. - No need to initialize bInterval to 0. Static variables are 0 initialized. - Move descriptor setting from fastboot_add to to fastboot_bind. - check for dual speed configuration before setting the high speed descriptors. Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <srae@broadcom.com> Tested-by: Steve Rae <srae@broadcom.com> [Test HW: bcm235xx board]
| * | tests: py: dfu: Provide functionality to set test and dummy files alt settingsLukasz Majewski2016-04-25-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After concatenation of "dfu_alt_info" variable from "dfu_alt_boot" and "dfu_alt_system" it may happen that test and dummy files alt settings are different than default 0 and 1. This patch provides the ability to set different values for them. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Stephen Warren <swarren@nvidia.com> --- Changes for v3: - replace variables declarations with ones read from configuration file - remove not necessary str() conversion at DFU host command generation Changes for v2: - generate "alt_info" automatically - use file names as alt settings instead of numerical values - extend in-code documentation
| * | tests: py: dfu: Add functionality to set different u-boot's dfu env variableLukasz Majewski2016-04-25-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default (on almost all systems) the dfu env variable, which defines available alt settings, is named as "dfu_alt_info". However on some platforms (i.e. Odroid XU3), the 'dfu_alt_info' is concatenated from other variables - namely 'dfu_alt_boot' and 'dfu_alt_system' at run time (when one types 'dfu 0 mmc 0' for first time). 'dfu_alt_boot' describes alt settings which depend on boot medium - for example boot loader's LBA sectors which are different on eMMC and SD card because of e.g. MBR/GPT. 'dfu_alt_system' describes board agnostic alt settings - like rootfs, kernel. On such system we can only append/modify this env variable. Because of the above, we must have way to modify other than "dfu_ale_info" variable to perform tests. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Stephen Warren <swarren@nvidia.com> --- Changes for v3: - None Changes for v2: - Rewrite of "alt_info_env_name" variable description - Use of get() method on python's dictionary to easily obtain default value
| * | tests: py: dfu: Add variables to store dfu alt numbers for test and dummy filesLukasz Majewski2016-04-25-4/+8
| |/ | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces hardcoded (i.e. 0 and 1) values passed to dfu_{read|write} with variables. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Stephen Warren <swarren@nvidia.com> --- Changes for v3: - Replace per module global variables with ones defined inside a function Changes for v2: - None
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-04-25-46/+698
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| * | Add initial support for Technexion's PICO-IMX6UL-EMMC boardFabio Estevam2016-04-19-0/+395
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Technexion's PICO-IMX6UL-EMMC board. For information about this board, please visit: http://www.technexion.com/products/pico/pico-som/pico-imx6-emmc Signed-off-by: Richard Hu <richard.hu@technexion.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | MX6UL: Add definition for UART6 base addressFabio Estevam2016-04-19-0/+1
| | | | | | | | | | | | | | | | | | Define the UART6_BASE_ADDR for MX6UL. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | board: ge: bx50v3: Fix to meet LVDS display power on timingAkshay Bhat2016-04-19-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | On a reset/reboot, the display power needs to be off for atleast 500ms before turning it back on. So add a delay to the boot process to meet the display timing requirement. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * | board: ge: bx50v3: Use pwm for display backlightAkshay Bhat2016-04-19-0/+14
| | | | | | | | | | | | | | | | | | | | | Setup the LCD backlight brightness control pin to use PWM Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * | board: ge: bx50v3: Setup LDB_DI_CLK sourceAkshay Bhat2016-04-19-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | To generate accurate pixel clocks required by the displays we need to set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since PLL5 is disabled on reset, we need to enable PLL5. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * | board: ge: bx50v3: Split display setup functionAkshay Bhat2016-04-19-45/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | B450v3/B650v3 uses single channel LVDS and does not support HDMI. B850v3 uses dual channel LVDS and supports HDMI. Hence split the display setup into two different functions. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6: Fix procedure to switch the parent of LDB_DI_CLKAkshay Bhat2016-04-19-0/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is generated, and the LVDS display will hang when the ipu_di_clk is sourced from ldb_di_clk. To fix the problem, both the new and current parent of the ldb_di_clk should be disabled before the switch. This patch ensures that correct steps are followed when ldb_di_clk parent is switched in the beginning of boot. This patch was ported from the 3.10.17 NXP kernel http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.10.17_1.0.1_ga&id=eecbe9a52587cf9eec30132fb9b8a6761f3a1e6d NXP errata number: ERR009219, EB821 Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mx5: Fix NAND image generationMarek Vasut2016-04-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The echo -ne "\xNN" does not work in certain bourne-compatible shells, like dash. The recommended way of hex->char conversion is using printf(1), but there is a pitfall here. The GNU printf does support "\xNN" format, but according to the opengroup documentation, this is not part of POSIX. The POSIX printf only defines "\NNN" where N is octal. Thus, for the sake of compatibility, we use that. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | board: ge: bx50v3: Disable unused pinsJustin Waters2016-04-19-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain pins are not used on the i.MX6, and should have a neutral pad configuration in order to reduce electrical interference on the board. This commit defines these pins with a default value rather than relying on the system defaults. Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2016-04-25-160/+371
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| * | | i2c: designware_i2c: Add support for PCI(e) based I2C cores (x86)Stefan Roese2016-04-25-12/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the PCI(e) based I2C cores. Which can be found for example on the Intel Bay Trail SoC. It has 7 I2C controllers implemented as PCI devices. This patch also adds the fixed values for the timing registers for BayTrail which are taken from the Linux designware I2C driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | i2c: designware_i2c: Add DM supportStefan Roese2016-04-25-26/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DM support to the designware I2C driver. It currently supports DM and the legacy I2C support. The legacy support should be removed, once all platforms using it have DM enabled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| * | | i2c: designware_i2c: Prepare for DM driver conversionStefan Roese2016-04-25-83/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch prepares the designware I2C driver for the DM conversion. This is mainly done by removing struct i2c_adapter from the functions that shall be used by the DM driver version as well. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| * | | i2c: designware_i2c: Integrate set_speed() into dw_i2c_set_bus_speed()Stefan Roese2016-04-25-24/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integrating set_speed() into dw_i2c_set_bus_speed() will make the conversion to DM easier for this driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| * | | i2c: designware_i2c: Add dw_i2c_enable() helper functionStefan Roese2016-04-25-20/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dw_i2c_enable() is used to dis-/en-able the I2C controller. It makes sense to add such a function, as the controller is dis-/en-abled multiple times in the code. Additionally, this function now checks, if the controller is really dis-/en-abled. This code is copied from the Linux I2C driver version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | i2c: designware_i2c: Add ic_enable_status to ic_regs structStefan Roese2016-04-25-33/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the ic_enable_status register to the i2c_regs struct. Additionally the register offsets are added, to better check, if the offset matches the register description in the datasheet. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| * | | dm: core: Add dev_get_addr_ptr() to return a pointer to the reg addressStefan Roese2016-04-25-0/+15
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some platforms (e.g. x86), the return value of dev_get_addr() can't be assigned to a pointer type variable directly. As there might be a difference between the size of fdt_addr_t and the pointer type. On x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So assigning the register base directly in dev_get_addr() results in this compilation warning: warning: cast to pointer from integer of different size This patch introduces the new function dev_get_addr_ptr() that returns a pointer to the 'reg' address that can be used by drivers in this case. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-ubiTom Rini2016-04-25-3/+2
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| * | ubifs: fix memory corruption in super.cHeiko Schocher2016-04-22-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In list "super_blocks" ubifs collects allocated super_block structs. U-Boot frees on unmount the allocated struct, so the pointer stored in this list is free after the umount. On a new ubifs mount, the new allocated super_block struct get inserted into the super_blocks list ... which contains now a freed pointer, and the list_add_tail() corrupts the freed memory ... 2 solutions are possible: - remove the super_block from the super_blocks list on umount - as U-Boot does not use the super_blocks list ... remove it complete for U-Boot. Both solutions should not introduce problems for porting to newer linux version, so this patch removes the unused super_blocks list, as it saves code size and execution time. Signed-off-by: Heiko Schocher <hs@denx.de>
| * | mtd, ubi: set free_count to zero before walking through erase listHeiko Schocher2016-04-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set free_count to zero before walking through ai->erase list in wl_init(). As U-Boot has no workqueue/threads, it immediately calls erase_worker(), which increase for each erased block free_count. Without this patch, free_count gets after this initialized to zero in wl_init(), so the free_count variable always has the maybe wrong value 0. Detected this behaviour on the dxr2 board, where the UBI fastmap gets not written when attaching/dettaching on an empty NAND. It drops instead the error message: could not find any anchor PEB With this patch, fastmap gets written on dettach. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-04-22-891/+1
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| * | | x86: Correct typo of Miao Yan's email addressBin Meng2016-04-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Miao Yan's email address is wrong in fw_cfg.c. Fix it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | | x86: qemu: Drop our own ACPI implementationBin Meng2016-04-22-890/+0
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our own ACPI implementation (when CONFIG_QEMU_ACPI_TABLE is not set) does not build anymore after x86 has been fully converted to DM PCI. Instead of trying to fix the build errors, given we now have the ACPI support via QEMU's fw_cfg interface, which is a more reliable way to generate correct ACPI tables than by ourselves, hence drop our own ACPI implementation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | arc/cache: really do flush_dcache_all() even if IOC existsAlexey Brodkin2016-04-21-5/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | flush_dcache_all() is used in the very end of U-Boot self relocation to write back all copied and then patched code and data to their new location in the very end of available memory space. Since that has nothing to do with IO (i.e. no external DMA happens here) IOC won't help here and we need to write back data cache contents manually. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
generated by cgit v1.1 at 2024-11-17 22:00:46 +0000