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* imx_watchdog: Do not assert WDOG_B on watchdog initRoss Parker2016-10-04-1/+2
| | | | | | | | Currently the driver asserts WDOG_B by clearing WCR_WDA bit when enabling the watchdog. Do not clear WCR_WDA. Signed-off-by: Ross Parker <rossjparker@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: iomux-v3: fix pad setup on i.MX6DQP when CONFIG_MX6QDL is definedFilip Brozovic2016-10-04-1/+1
| | | | | | | | The CPU detection macro is_mx6dq returns 0 on an i.MX6DQP, so we need to check for it explicitly in order to correctly initialize the pads when CONFIG_MX6QDL is defined. Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
* board: tbs2910: Fix BOOTMAPSZSoeren Moch2016-10-04-1/+1
| | | | | | | | The linux kernel imx_v6_v7_defconfig sets the user/kernel memory split to 3G/1G now (was 2G/2G before). We have to adapt the BOOTMAPSZ so that the decompressor finds zImage and dtb in lowmem. Signed-off-by: Soeren Moch <smoch@web.de>
* mx6sabresd: Make SPL DDR configuration to match the DCD tableFabio Estevam2016-10-04-154/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | When using SPL on i.mx6 we frequently notice some DDR initialization mismatches between the SPL code and the non-SPL code. This causes stability issues like the ones reported at 7dbda25ecd6d7c ("mx6ul_14x14_evk: Pass refsel and refr fields to avoid hang") and also: http://lists.denx.de/pipermail/u-boot/2016-September/266355.html . As the non-SPL code have been tested for long time and proves to be reliable, let's configure the DDR in the exact same way as the non-SPL case. The idea is simple: just use the DCD table and write directly to the DDR registers. Retrieved the DCD tables from: board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg and board/freescale/mx6sabresd/mx6qp.cfg (NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga) This method makes it easier for people converting from non-SPL to SPL code. Other benefit is that the SPL binary size is reduced from 44 kB to 39.9 kB. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* wandboard: Remove videoargs scriptFabio Estevam2016-10-04-26/+0
| | | | | | | | | | | | The videoargs script is kernel version dependent and since wandboard uses distro config, there is no need to handle videoargs locally. In case such video related settings are needed, then the proper location would be the distro extlinux.conf or boot.scr files. So remove 'videoargs' script. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* wandboard: Fix hang when going into low frequencyFabio Estevam2016-10-04-3/+3
| | | | | | | | | | | | | | A kernel hang is observed when running wandboard 3.14 kernel and going to the lowest operational point of cpufreq: # ifconfig eth0 down # echo 1 > /sys/class/graphics/fb0/blank The problem is caused by incorrect setting of the REFR field of register MDREF. Setting it to 4 refresh commands per refresh cycle fixes the hang. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* Prepare v2016.11-rc1Tom Rini2016-10-03-2/+2
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2016-10-03-205/+421
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| * rockchip: add boot-mode support for rk3288, rk3036Jacob Chen2016-10-01-20/+111
| | | | | | | | | | | | | | | | | | | | | | | | rockchip platform have a protocol to pass the the kernel reboot mode to bootloader by some special registers when system reboot. In bootloader we should read it and take action. We can only setup boot_mode in board_late_init becasue "setenv" need env setuped. So add CONFIG_BOARD_LATE_INIT to common header and use a entry "rk_board_late_init" to replace "board_late_init" in board file. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: move common function from board-file to rk3036-board.cJacob Chen2016-10-01-132/+84
| | | | | | | | | | | | | | To keep it same with 3288 Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rename board.c to rk3288-board.cJacob Chen2016-10-01-1/+1
| | | | | | | | | | Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: move partitons define from 3036-kylin to 3036-commonJacob Chen2016-10-01-24/+10
| | | | | | | | | | | | | | To keep it same with 3288. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: miniarm: remove eMMC supportXu Ziyuan2016-10-01-21/+6
| | | | | | | | | | | | | | The latest rk3288-miniarm board doesn't have eMMC device, so remove it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * config: evb-rk3399: enable pwm regulatorKever Yang2016-10-01-0/+1
| | | | | | | | | | | | | | Enable the pwm regulator for evb-rk3399. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dts: evb-rk3399: add init voltage node for vdd-centerKever Yang2016-10-01-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add a regulator-init-microvolt for vdd_center regulator so that we can get a init value for driver probe. Not like pmic regulator, the PWM regulator do not have a known default output value, so we would like to init the regulator when driver probe. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Kconfig: rockchip: enable DM_PWM and DM_REGULATORKever Yang2016-10-01-0/+2
| | | | | | | | | | | | | | Enable DM_PWM and DM_REGULATOR on rockchip SoCs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: evb_rk3399: init vdd_center regulatorKever Yang2016-10-01-0/+6
| | | | | | | | | | | | | | | | Add vdd_center pwm regulator get_device to enable this regulator. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * power: regulator: add pwm regulatorKever Yang2016-10-01-0/+170
| | | | | | | | | | | | | | | | add driver support for pwm regulator. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rkpwm: fix the register sequenceKever Yang2016-10-01-1/+1
| | | | | | | | | | | | | | | | | | Reference to kernel source code, rockchip pwm has three type, we are using v2 for rk3288 and rk3399, so let's update the register to sync with pwm_data_v2 in kernel. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3399: update PPLL and pmu_pclk frequencyKever Yang2016-10-01-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update PPLL to 676MHz and PMU_PCLK to 48MHz, because: 1. 48MHz can make sure the pwm can get exact 50% duty ratio, but 99MHz can not, 2. We think 48MHz is fast enough for pmu pclk and it is lower power cost than 99MHz, 3. PPLL 676 MHz and PMU_PCLK 48MHz are the clock rate we are using internally for kernel,it suppose not to change the bus clock like pmu_pclk in kernel, so we want to change it in uboot. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add usb mass storage feature support for rk3036jacob2.chen2016-10-01-0/+4
| | | | | | | | | | | | | | | | Enable ums feature for rk3036 boards, so that we can mount the mmc device to PC. Signed-off-by: jacob2.chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Enable ROCKCHIP_SPL_BACK_TO_BROM for rock2 boardSandy Patterson2016-10-01-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | Rock2 has been tested with back to brom feature. The tricky part is that with this feature the default environment is inside u-boot, and it's defined for every rk3288 board independetly. So I just changed it for rock2 here if ROCKCHIP_SPL_BACK_TO_BROM. Solve by moving environment after u-boot before 1M boundary Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Disable SPL_MMC_SUPPORT if ROCKCHIP_SPL_BACK_TO_BROM is enabled.Sandy Patterson2016-10-01-0/+3
| | | | | | | | | | | | | | | | Default SPL_MMC_SUPPORT to false when ROCKCHIP_SPL_BACK_TO_BROM is enabled. Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: Fix SPL console output when ROCKCHIP_SPL_BACK_TO_BROM is enabledSandy Patterson2016-10-01-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move back_to_bootrom() call later in SPL init so that the console is initialized and printouts happen. Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console output from the SPL init stages. I wasn't sure exactly where this should happen, so if we are set to do run spl_board_init, then go back to bootrom there after preloader_console_init(). Otherwise fall back to old behavior of doing it in board_init_f. Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: sdram: fix DDR address rangeXu Ziyuan2016-10-01-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The all current Rockchip SoCs supporting 4GB of ram have problems accessing the memory region 0xfe000000~0xff000000. Actually, some IP controller can't address to, so let's limit the available range. This patch fixes a bug which found in miniarm-rk3288-4GB board. The U-Boot was relocated to 0xfef72000, and .bss variants was also relocated, such as do_fat_read_at_block. Once eMMC controller transfer data to do_fat_read_at_block via DMA, DMAC can't access more than 0xfe000000. So that DMAC didn't work sane. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | ti_armv7_common: Disable Falcon Mode on HS devicesAndrew F. Davis2016-10-02-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | Authentication of images in Falcon Mode is not supported. Do not enable SPL_OS_BOOT when TI_SECURE_DEVICE is enabled. This prevents attempting to directly load kernel images which will fail, for security reasons, on HS devices, the board is locked if a non-authenticatable image load is attempted, so we disable attempting Falcon Mode. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* | config: Remove usage of CONFIG_STORAGE_EMMCAndrew F. Davis2016-10-02-8/+0
| | | | | | | | | | | | | | | | | | This config option seems to be unused and is probably vestigial. Remove it. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ti: omap-common: Allow AM33xx devices to be built securelyAndrew F. Davis2016-10-02-1/+1
| | | | | | | | | | | | | | | | | | | | Like OMAP54xx and AM43xx family SoCs, AM33xx based SoCs have high security enabled models. Allow AM33xx devices to be built with HS Device Type Support. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: am33xx-hs: Allow post-processing of FIT image on AM33xxAndrew F. Davis2016-10-02-0/+8
| | | | | | | | | | | | | | | | | | | | | | When CONFIG_FIT_IMAGE_POST_PROCESS or CONFIG_SPL_FIT_IMAGE_POST_PROCESS is enabled board_fit_image_post_process will be called, add this function to am33xx boards when CONFIG_TI_SECURE_DEVICE is set to verify the loaded image. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* | am33xx: config.mk: Fix option used to enable SPI SPL image typeAndrew F. Davis2016-10-02-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The option SPL_SPI_SUPPORT is used to enable support in SPL for loading images from SPI flash, it should not be used to determine the build type of the SPL image itself. The ability to read images from SPI flash does not imply the SPL will be booted from SPI flash. Unconditionally build SPI flash compatible SPL images. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | doc: Update info on using AM33xx secure devices from TIAndrew F. Davis2016-10-02-0/+32
| | | | | | | | | | | | | | | | | | Add a section describing the additional boot types used on AM33xx secure devices. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* | am33xx: config.mk: Add support for additional secure boot image typesAndrew F. Davis2016-10-02-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on the boot media, different images are needed for secure devices. The build generates u-boot*_HS_* files as appropriate for the different boot modes. For AM33xx devices additional image types are needed for various SPL boot modes as the ROM checks for the name of the boot mode in the file it loads. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Kconfig: Separate AM33XX SOC config from target board configAndrew F. Davis2016-10-02-89/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The config option AM33XX is used in several boards and should be defined as a stand-alone option for this SOC. We break this out from target boards that use this SoC and common headers then enable AM33XX on in all the boards that used these targets to eliminate any functional change with this patch. This is similar to what has already been done in 9de852642cae ("arm: Kconfig: Add support for AM43xx SoC specific Kconfig") and is done for the same reasons. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: omap5: add fdt secure dram reservation fixupDaniel Allred2016-10-02-2/+62
| | | | | | | | | | | | | | | | | | | | Adds a secure dram reservation fixup for secure devices, when a region in the emif has been set aside for secure world use. The size is defined by the CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE config option. Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti_omap5_common: mark region of DRAM protected on HS partsDaniel Allred2016-10-02-0/+8
| | | | | | | | | | | | | | | | | | If the ending portion of the DRAM is reserved for secure world use, then u-boot cannot use this memory for its relocation purposes. To prevent issues, we mark this memory as PRAM and this prevents it from being used by u-boot at all. Signed-off-by: Daniel Allred <d-allred@ti.com>
* | ARM: DRA7: Add secure emif setup callsDaniel Allred2016-10-02-0/+15
| | | | | | | | | | | | | | | | | | | | | | After EMIF DRAM is configured, but before it is used, calls are made on secure devices to reserve any configured memory region needed by the secure world and then to lock the EMIF firewall configuration. If any other firewall configuration needs to be applied, it must happen before the lock call. Signed-off-by: Daniel Allred <d-allred@ti.com>
* | arm: omap5: secure API for EMIF memory reservationsDaniel Allred2016-10-02-0/+151
| | | | | | | | | | | | | | | | | | | | | | Create a few public APIs which rely on secure world ROM/HAL APIs for their implementation. These are intended to be used to reserve a portion of the EMIF memory and configure hardware firewalls around that region to prevent public code from manipulating or interfering with that memory. Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti: omap5: Add Kconfig options for secure EMIF reservationsDaniel Allred2016-10-02-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Adds start address and size config options for setting aside a portion of the EMIF memory space for usage by security software (like a secure OS/TEE). There are two sizes, a total size and a protected size. The region is divided into protected (secure) and unprotected (public) regions, that are contiguous and start at the start address given. If the start address is zero, the intention is that the region will be automatically placed at the end of the available external DRAM space. Signed-off-by: Daniel Allred <d-allred@ti.com>
* | net, macb: fix misaligned cache operation warningHeiko Schocher2016-10-01-9/+11
| | | | | | | | | | | | | | | | | | | | when using tftp on the smartweb board, it prints a lot of CACHE: Misaligned operation at range [23b2e000, 23b2e100] warnings ... fixed them. Signed-off-by: Heiko Schocher <hs@denx.de>
* | ti_armv7_keystone2: Update addr_mon variableLokesh Vutla2016-10-01-9/+5
| | | | | | | | | | | | | | | | | | | | As boot monitor contains a mkimage header, it can be loaded at any location. So, have a common addr_mon address across all keystone2 SoCs. And also making sure that boot monitor is installed early during default boot to avoid any overlapping with other images. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: keystone2: Add support for parsing monitor headerLokesh Vutla2016-10-01-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given that boot monitor image is being generated to a specific target location depending on the SoC and U-boot relies on addr_mon env variable to be aligned with boot monitor target location. When ever the target address gets updated in boot monitor, it is difficult to sync between u-boot and boot monitor and also there is no way to update user that boot monitor image is updated. To avoid this problem, boot monitor image is being generated with mkimage header. Adding support in mon_install command for parsing this header. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | keystone2: k2g: add env script to load firmware initramfs as part of boot flowMurali Karicheri2016-10-01-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On K2G, the PCIe SerDes h/w is a re-use from other K2 devices and SerDes driver requires a firmware image to initialize the SerDes h/w device. This is firmware is part of the initramfs file that is loaded to memory in u-boot and passed to kernel as in other K2 platforms. This patch customize the u-boot env to have this done automatically when the K2G EVM boots up. With this, a user may be able to boot the EVM with a standard PCIe card at the x1 PCIe slot and release image and test PCIe devices such as NIC, SATA etc. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: k2g: Enable ECC byte laneLokesh Vutla2016-10-01-2/+1
| | | | | | | | | | | | | | Enable ECC byte lane for k2g-evm Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: ks2: Enable ECC using detected DDR sizeLokesh Vutla2016-10-01-0/+3
| | | | | | | | | | | | | | | | | | EEC is being enabled based on the ddr size populated by SPD data. But not all keystone platforms have SPD data to detect ddr3 size. So, enable ECC using the detected DDR size. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | fastboot: move FASTBOOT_FLASH options into KconfigPetr Kulhavy2016-10-01-5/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | Move FASTBOOT_MBR_NAME and FASTBOOT_GPT_NAME into Kconfig. Add dependency on the FASTBOOT_FLASH setting (also for FASTBOOT_MBR_NAME). Remove the now redundant GPT_ENTRY_NAME. Signed-off-by: Petr Kulhavy <brain@jikos.cz> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Steve Rae <steve.rae@raedomain.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add FIXME about xxx_PARTITION needing to be in Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
* | disk: part: refactor generic name creation for DOS and ISOPetr Kulhavy2016-10-01-53/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | In both DOS and ISO partition tables the same code to create partition name like "hda1" was repeated. Code moved to into a new function part_set_generic_name() in part.c and optimized. Added recognition of MMC and SD types, name is like "mmcsda1". Signed-off-by: Petr Kulhavy <brain@jikos.cz> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Steve Rae <steve.rae@raedomain.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | fastboot: add support for writing MBRPetr Kulhavy2016-10-01-6/+121
| | | | | | | | | | | | | | | | | | | | | | | | Add special target "mbr" (otherwise configurable via CONFIG_FASTBOOT_MBR_NAME) to write MBR partition table. Partitions are now searched using the generic function which finds any partiiton by name. For MBR the partition names hda1, sda1, etc. are used. Signed-off-by: Petr Kulhavy <brain@jikos.cz> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Steve Rae <steve.rae@raedomain.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | disk: part: implement generic function part_get_info_by_name()Petr Kulhavy2016-10-01-33/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far partition search by name has been supported only on the EFI partition table. This patch extends the search to all partition tables. Rename part_get_info_efi_by_name() to part_get_info_by_name(), move it from part_efi.c into part.c and make it a generic function which traverses all part drivers and searches all partitions (in the order given by the linked list). For this a new variable struct part_driver.max_entries is added, which limits the number of partitions searched. For EFI this was GPT_ENTRY_NUMBERS. Similarly the limit is defined for DOS, ISO, MAC and AMIGA partition tables. Signed-off-by: Petr Kulhavy <brain@jikos.cz> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Steve Rae <steve.rae@raedomain.com>
* | bootm: fix passing argc to standalone appsZubair Lutfullah Kakakhel2016-10-01-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This bug appears in b6396403 which makes u-boot unable to pass arguments via bootm to a standalone application without this patch. Steps to reproduce. Compile a u-boot. Use mkimage to package the standalone hello_world.bin file. e.g. For the MIPS Boston platform mkimage -n "hello" -A mips -O u-boot -C none -T standalone \ -a 0xffffffff80200000 -d hello_world.bin \ -ep 0xffffffff80200000 hello_out Then tftp hello_out and run it using boston # dhcp 192.168.154.45:hello_out ... boston # bootm $loadaddr 123 321 Without the patch the following output is observed. boston # bootm $loadaddr 123 321 Image Name: hello Image Type: MIPS U-Boot Standalone Program (uncompressed) Data Size: 1240 Bytes = 1.2 KiB Load Address: 80200000 Entry Point: 80200000 Verifying Checksum ... OK Loading Standalone Program ... OK Example expects ABI version 8 Actual U-Boot ABI version 8 Hello World argc = 0 argv[0] = "0xffffffff88000000" With the patch, you see the following. boston # bootm $loadaddr 123 321 Image Name: hello Image Type: MIPS U-Boot Standalone Program (uncompressed) Data Size: 1240 Bytes = 1.2 KiB Load Address: 80200000 Entry Point: 80200000 Verifying Checksum ... OK Loading Standalone Program ... OK Example expects ABI version 8 Actual U-Boot ABI version 8 Hello World argc = 3 argv[0] = "0xffffffff88000000" argv[1] = "123" argv[2] = "321" argv[3] = "<NULL>" Without the patch, the go command at the entry point seems to work. boston # go 0xffffffff80200000 123 321 Example expects ABI version 8 Actual U-Boot ABI version 8 Hello World argc = 3 argv[0] = "0xffffffff80200000" argv[1] = "123" argv[2] = "321" argv[3] = "<NULL>" Hit any key to exit ... Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | input: specify the default of I8042_KEYB in more correct mannerMasahiro Yamada2016-10-01-3/+1
| | | | | | | | | | | | | | | | | | | | Creating multiple entries of "config FOO" often gives us bad experiences. In this case, we should specify "default X86" as platforms that want this keyboard by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-09 05:30:17 +0000