summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
...
| * | | ARM: Page align secure section only when it is executed in situChen-Yu Tsai2016-07-15-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Targets that define CONFIG_ARMV7_SECURE_BASE will copy the secure section to another address before execution. Since the secure section in the u-boot image is only storage, there's no reason to page align it and increase the binary image size. Page align the secure section only when CONFIG_ARMV7_SECURE_BASE is not defined. And instead of just aligning the __secure_start symbol, align the whole .__secure_start section. This also makes the section empty, so we need to add KEEP() to the input entry to prevent the section from being garbage collected. Also use ld constant "COMMONPAGESIZE" instead of hardcoded page size. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: Add missing CONFIG_ARMV7_PSCI_NR_CPUS for sun7iChen-Yu Tsai2016-07-15-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | sun7i has 2 CPUs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: Move remaining PSCI assembly code to CChen-Yu Tsai2016-07-15-54/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | ARM: PSCI: Split out common stack setup code from psci_arch_initChen-Yu Tsai2016-07-15-45/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every platform has the same stack setup code in assembly as part of psci_arch_init. Move this out into a common separate function, psci_stack_setup, for all platforms. This will allow us to move the remaining parts of psci_arch_init into C code, or drop it entirely. Also provide a stub no-op psci_arch_init for platforms that don't need their own specific setup code. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: Add defconfig and dts file for the Orange Pi Lite SBCHans de Goede2016-07-15-0/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Orange Pi Lite SBC is a small H3 based SBC, with 512MB RAM, micro-sd slot, HDMI out, 2 USB-A connectors, 1 micro-USB connector, sdio attached rtl8189ftv wifi and an ir receiver. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Sync sun8i-h3-orangepi-plus.dts with upstreamHans de Goede2016-07-15-100/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables extra USB controllers which enable use of the 3rd USB port on the new Orange Pi Plus 2E variant. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: orangepi_pc: Add support for eMMC found on the Orange Pi PC PlusHans de Goede2016-07-15-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Plus variant of the Orange Pi PC has an eMMC, add support for this. Note we are using the same u-boot defconfig / dts for both the regular Orange Pi PC as well as the Orange Pi PC Plus. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Use BROM stored boot_media value to determine our boot-sourceHans de Goede2016-07-15-43/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Remove some unnecessary #ifdefsHans de Goede2016-07-15-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always define CONFIG_MISC_INIT_R on sunxi and misc_init_r is never called in the spl, so the linker will optimize it and parse_spl_header(), of which it is the only caller, away. On the tests I've done (Orange Pi PC build) the SPL actually becomes 8 bytes smaller with this patch. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Add support for multiple ethadrr-essesHans de Goede2016-07-15-16/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we fill ethaddr with a fixed unique address based on the SoCs serial (from the sid) to make sure that boards which use the integrated emac / gmac get a fixed mac rather then a random one. On some boards the wifi does not come with a fixed mac either, so we need to also set eth1addr. This commit changes the ethaddr setting code to check for ethernet%d aliases (as fdt_fixup_ethernet does) and set an ethaddr variable for all present aliases. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | net: Add EMAC driver for H3/A83T/A64 SoCs.Amit Singh Tomar2016-07-15-2/+902
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add EMAC driver support for H3/A83T/A64 SoCs. Tested on Pine64(A64-External PHY) and Orangepipc(H3-Internal PHY). BIG Thanks to Andre for providing some of the DT code. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: mmc: increase status register polling rate for data transfersTobias Doerffel2016-07-15-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: FEL - Add the ability to recognize and auto-import uEnv-style dataBernhard Nortmann2016-07-15-9/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch converts one of the "reserved" fields in the sunxi SPL header to a fel_uEnv_length entry. When booting over USB ("FEL mode"), this enables the sunxi-fel utility to pass the string length of uEnv.txt compatible data; at the same time requesting that this data be imported into the U-Boot environment. If parse_spl_header() in the sunxi board.c encounters a non-zero value in this header field, it will therefore call himport_r() to merge the string (lines) passed via FEL into the default settings. Environment vars can be changed this way even before U-Boot will attempt to autoboot - specifically, this also allows overriding "bootcmd". With fel_script_addr set and a zero fel_uEnv_length, U-Boot is safe to assume that data in .scr format (a mkimage-type script) was passed at fel_script_addr, and will handle it using the existing mechanism ("bootcmd_fel"). Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: Support booting from SPI flashSiarhei Siamashka2016-07-15-2/+311
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2016-07-15-74/+95
|\ \ \
| * | | mmc: exynos_dw_mmc: support the Driver mode for ExynosJaehoon Chung2016-07-12-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch support the driver mode for exynos dwmmc controller. To support the legacy model, maintained the existing code. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | mmc: exynos_dw_mmc: use the 4bit bus-width by defaultJaehoon Chung2016-07-12-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If there is not "samsung,bus-width" property, use the 4bit buswidth by default. Almost all Exnyos SoCs support at least 4bit buswidth. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | mmc: exynos_dw_mmc: clean the unused and unnecessary codesJaehoon Chung2016-07-12-22/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean the unused and unnecessary codse. This patch is one of them for preparing to use DM. Because it's easy to maintain and combine DM after cleaning codes. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | mmc: exynos_dw_mmc: add the error control for checking indexJaehoon Chung2016-07-12-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PERIPH_ID_SDMMC4(131) is not continous value with PERIPH_ID_SDMMC0(75). If there is no 'index' property in fdt, then dev_index should be assigned to dev_id(Peripheral ID). At this time, dev_index should be "56". It means Exynos SoC has "56" numbers of DWMMC IP. To prevent this behavior, it needs to check the maximum device index. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | mmc: exynos_dw_mmc: remove #ifdef for OF_CONTROLJaehoon Chung2016-07-12-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed #ifdef for OF_CONTROL. It might use 'OF_CONTROL' by default. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | mmc: exynos_dw_mmc: remove the unused functionJaehoon Chung2016-07-12-37/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function have maintained for supporting Non-FDT. Now, Almost all SoC are changed to fdt style. So there are no that this function is called anywhere. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | ARM: exynos4: dts: add the prefix '/' for aliases nodesJaehoon Chung2016-07-12-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It's correct to use '/' as prefix for aliases nodes. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | Merge git://git.denx.de/u-boot-dmTom Rini2016-07-15-130/+2495
|\ \ \ \
| * | | | dm: Update the of-platdata README for the new featuresSimon Glass2016-07-14-34/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revise the content based on the v2 additions. This is kept as a separate patch to avoid confusing those who have already reviewed the v1 series. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Tom Rini <trini@konsulko.com>
| * | | | dm: Add a test for of-platdataSimon Glass2016-07-14-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple test which checks that the of-platdata system is working correctly. The sequence is as follows: - SPL starts up and probes all the UCLASS_MISC drivers - There are 3 of these in sandbox.dts - Therefore there should be 3 U_BOOT_DEVICE() declarations in dt-platdata.c - These should produce 3 sandbox_spl_test devices - Each device prints out its platform data when probed - This test checks for this output and compares it against expectations Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | test/py: Start sandbox SPL when enabledSimon Glass2016-07-14-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When sandbox SPL is enabled we want to start that rather than U-Boot proper, since some tests may rely on running it first. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | test/py: Provide a way to get early console outputSimon Glass2016-07-14-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some tests want to check the console output from SPL or U-Boot proper. Provide a means to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | test/py: Note which console produced unexpected outputSimon Glass2016-07-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the SPL and U-Boot consoles both present the same error message when the expected console output does not appear. Add "SPL" to the SPL error message to resolve this ambiguity. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | test/py: Handle testing with the sandbox_spl boardSimon Glass2016-07-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board can sometimes be used for tests. Handle it the same way as sandbox. Note: I plan to drop the sandbox_spl board at some point and merge its features into sandbox. So this commit may not be necessary. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: Use of-platdata for firefly-rk3288Simon Glass2016-07-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As an experiment, move this board over to use of-platdata. This means that its SPL configuration will come from C structures generated at build-time from the device tree, instead of coming from the device tree at run-time. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: sdram: Update the driver to support of-platdataSimon Glass2016-07-14-1/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for of-platdata with rk3288 SDRAM initr. This requires decoding the of-platdata struct and setting up the device from that. Also the driver needs to be renamed to match the string that of-platdata will search for. The platform data is copied from the of-platdata structure to the one used by the driver. This allows the same code to be used with device tree and of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: sdram: Move all DT decoding to ofdata_to_platdata()Simon Glass2016-07-14-38/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is more correct to avoid touching the device tree in the probe() method. Update the driver to work this way. Note that only SPL needs to fiddle with the SDRAM registers, so decoding the platform data fully is not necessary in U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: syscon: Update to work with of-platdataSimon Glass2016-07-14-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The syscon devices all end up having diffent driver names with of-platdata, since the driver name comes from the first string in the compatible list. Add separate device declarations for each one, and add a bind method to set up driver_data correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: Don't use spl_boot_device() with of-platdataSimon Glass2016-07-14-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function cannot look at the device tree when of-platdata is used. Update the code to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: Move the MMC setup check earlierSimon Glass2016-07-14-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the boot ROM sets up MMC we don't need to do it again. Remove the MMC setup code entirely. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: pinctrl: Update the rk3288 driver to support of-platdataSimon Glass2016-07-14-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for of-platdata with rk3288. This requires disabling access to the device tree and renaming the driver to match the string that of-platdata will search for. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: clk: Update the rk3288 driver to support of-platdataSimon Glass2016-07-14-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for of-platdata with rk3288. This requires decoding the of-platdata struct and setting up the devices from that. Also the driver needs to be renamed to match the string that of-platdata will search for. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: clk: Move all DT decoding to ofdata_to_platdata()Simon Glass2016-07-14-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is more correct to avoid touching the device tree in the probe() method. Update the driver to work this way. Also add an error check on grf since if that fails then we should not use it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: mmc: Update the driver to support of-platdataSimon Glass2016-07-14-3/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for of-platdata with rk3288. This requires decoding the of-platdata struct and setting up the device from that. Also the driver needs to be renamed to match the string that of-platdata will search for. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: mmc: Move all DT decoding to ofdata_to_platdata()Simon Glass2016-07-14-15/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is more correct to avoid touching the device tree in the probe() method. Update the driver to work this way. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: Update the sdram-channel property to support of-platdataSimon Glass2016-07-14-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an extra byte so that this data is not byteswapped. Add a comment to the code to explain the purpose. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | rockchip: serial: Add an of-platdata driver for rockchipSimon Glass2016-07-14-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver that works with of-platdata. It sets up the platform data and calls the standard ns16550 driver. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | dm: serial: ns16550: Update to support of-platdataSimon Glass2016-07-14-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With of-platdata this driver cannot know the format of the of-platdata struct, so we cannot use generic code for accessing the of-platdata. Each SoC that uses this driver will need to set up ns16550's platdata for it. So don't compile in the generic code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | dm: core: Add an implementation of regmap_init_mem_platdata()Simon Glass2016-07-14-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an implementation of this function which mirrors the functions of the automatic device-tree implementation. This can be used with of-platdata to create regmaps. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | dm: core: Move regmap allocation into a separate functionSimon Glass2016-07-14-12/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We plan to add a new way of creating a regmap for of-platdata. Move the allocation code into a separate function so that it can be shared. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | dm: sandbox: Enable of-platdata for sandbox_splSimon Glass2016-07-14-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable this feature so that we can use it for testing in sandbox_spl. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | sandbox: Don't bring in the eeprom emulator in SPLSimon Glass2016-07-14-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver should not be used in SPL since we do not have I2C support enabled in SPL on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | dm: core: Expand platdata for of-platdata devicesSimon Glass2016-07-14-11/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices which use of-platdata have their own platdata. However, in many cases the driver will have its own auto-alloced platdata, for use with the device tree. The ofdata_to_platdata() method converts the device tree settings to platdata. With of-platdata we would not normally allocate the platdata since it is provided by the U_BOOT_DEVICE() declaration. However this is inconvenient since the of-platdata struct is closely tied to the device tree properties. It is unlikely to exactly match the platdata needed by the driver. In fact a useful approach is to declare platdata in the driver like this: struct r3288_mmc_platdata { struct dtd_rockchip_rk3288_dw_mshc of_platdata; /* the 'normal' fields go here */ }; In this case we have dt_platadata available, but the normal fields are not present, since ofdata_to_platdata() is never called. In fact driver model doesn't allocate any space for the 'normal' fields, since it sees that there is already platform data attached to the device. To make this easier, adjust driver model to allocate the full size of the struct (i.e. platdata_auto_alloc_size from the driver) and copy in the of-platdata. This means that when the driver's bind() method is called, the of-platdata will be present, followed by zero bytes for the empty 'normal field' portion. A new DM_FLAG_OF_PLATDATA flag is available that indicates that the platdata came from of-platdata. When the allocation/copy happens, the DM_FLAG_ALLOC_PDATA flag will be set as well. The dtoc tool is updated to output the platdata_size field, since U-Boot has no other way of knowing the size of the of-platdata struct. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | dm: Don't attach the device tree to SPL with of-platdataSimon Glass2016-07-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When of-platdata is used in SPL we don't use the device tree. So there is no point in attaching it. Adjust the Makefile to skip attaching the device tree when of-platdata is enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | dtoc: Ignore the u-boot, dm-pre-reloc propertySimon Glass2016-07-14-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This property is not useful for of-platdata, so omit it. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-09-18 02:56:07 +0000