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| * x86: queensbay: Change CPU_ADDR_BITS to 32Bin Meng2015-07-14-0/+4
| * x86: Setup fixed range MTRRs for legacy regionsBin Meng2015-07-14-11/+38
| * video: Add 32-bit color depth support for VBEJian Luo2015-07-14-0/+1
| * x86: bios: Allow pci config read/write to host bridge in int1a_handlerJian Luo2015-07-14-9/+1
| * x86: bios: Synchronize stack between real and protected modeJian Luo2015-07-14-0/+23
| * video: vesa_fb: Look up VGA device by class instead of idBin Meng2015-07-14-14/+2
| * dm: pci: Correct bus number when scanning sub-busesSimon Glass2015-07-14-1/+1
| * dm: pci: Use the correct hose when configuring devicesSimon Glass2015-07-14-1/+21
| * x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-14-10/+23
| * x86: crownbay: Enable writing MP tableBin Meng2015-07-14-0/+1
| * x86: Update README.x86 for SMP supportBin Meng2015-07-14-0/+13
| * x86: Generate a valid MultiProcessor (MP) tableBin Meng2015-07-14-0/+181
| * x86: Add MultiProcessor (MP) table APIsBin Meng2015-07-14-0/+688
| * x86: Remove inline for lapic access routinesBin Meng2015-07-14-151/+153
| * x86: Add I/O APIC register access routinesBin Meng2015-07-14-1/+46
| * x86: Clean up ioapic header fileBin Meng2015-07-14-23/+3
| * x86: Reduce PIRQ routing table sizeBin Meng2015-07-14-9/+56
| * x86: Ignore function number when writing PIRQ routing tableBin Meng2015-07-14-4/+3
| * x86: Write correct bus number for the irq routerBin Meng2015-07-14-1/+1
| * x86: queensbay: Correct Topcliff device irqsBin Meng2015-07-14-12/+12
| * x86: crownbay: Enable DM RTC supportBin Meng2015-07-14-0/+8
| * cmd: date: Change to use CONFIG_DM_RTC instead of CONFIG_DM_I2CBin Meng2015-07-14-6/+6
| * dm: rtc: Support mc146818 driver in driver modelBin Meng2015-07-14-108/+204
| * x86: crownbay: Add MP initializationBin Meng2015-07-14-0/+24
| * x86: Clean up lapic codesBin Meng2015-07-14-183/+103
| * x86: Move lapic_setup() call into init_bsp()Bin Meng2015-07-14-3/+1
| * x86: Move MP initialization codes into a common placeBin Meng2015-07-14-73/+114
| * x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONSBin Meng2015-07-14-1/+0
| * dm: cpu: Add a new get_count method to cpu uclassBin Meng2015-07-14-0/+26
| * x86: kconfig: Fix minor nits in MAX_CPUSBin Meng2015-07-14-12/+12
| * x86: kconfig: Make MAX_CPUS and AP_STACK_SIZE depend on SMPBin Meng2015-07-14-0/+2
| * x86: dm: Clean up cpu driversBin Meng2015-07-14-55/+86
| * dm: cpu: Test against cpu_ops->get_info in cpu_get_info()Bin Meng2015-07-14-1/+1
| * dm: cpu: Fix undefined ENOSYS build errorBin Meng2015-07-14-0/+2
| * dm: spi: Correct minor nits in ICH driverSimon Glass2015-07-14-3/+2
| * spi: sf: Print the error code on failureSimon Glass2015-07-14-2/+6
| * x86: fsp: Move FspInitEntry call to board_init_f()Bin Meng2015-07-14-22/+24
| * x86: fsp: Load GDT before calling FspInitEntryBin Meng2015-07-14-2/+33
| * x86: Add Kconfig options to be used by arch/x86/cpu/config.mkBin Meng2015-07-14-3/+18
| * builderthread.py: Keep 'SPL'Tom Rini2015-07-14-1/+1
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-07-14-41/+151
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| * spi: cadence_qspi: add device tree binding docVikas Manocha2015-07-03-5/+28
| * spi: cadence_qspi: support FIFO width other than 4 bytesVikas Manocha2015-07-03-23/+23
| * spi: cadence_qspi: get sram size from device treeVikas Manocha2015-07-03-5/+5
| * spi: cadence_qspi: move the sram partition in initVikas Manocha2015-07-03-11/+5
| * stv0991: configure device tree for cadence qspi & flashVikas Manocha2015-07-03-0/+34
| * stv0991: enable cadence qspi controller & spi flashVikas Manocha2015-07-03-0/+18
| * stv0991: configure clock & pad muxing for qspiVikas Manocha2015-07-03-1/+42
| * stv0991: remove define CONFIG_OF_SEPARATE from board fileVikas Manocha2015-07-03-1/+0
| * stv0991: move OF_CONTROL config to defconfigVikas Manocha2015-07-03-1/+1
generated by cgit v1.1 at 2024-11-10 09:39:50 +0000