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| author | Jian Luo <jian.luo4@boschrexroth.de> | 2015-07-06 16:31:28 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-14 18:03:18 -0600 |
| commit | 1441d81a793507745603c4c3b9481930ebd53822 (patch) | |
| tree | 1db0c1e8a867f2745b723d0766ab31672a4c6369 | |
| parent | 7b5c3498901712dbd6503bf81c03bb6ea8e3b516 (diff) | |
| download | u-boot-imx-1441d81a793507745603c4c3b9481930ebd53822.zip u-boot-imx-1441d81a793507745603c4c3b9481930ebd53822.tar.gz u-boot-imx-1441d81a793507745603c4c3b9481930ebd53822.tar.bz2 | |
x86: bios: Allow pci config read/write to host bridge in int1a_handler
We should allow pci config read/write to host bridge (b.d.f = 0.0.0)
in the int1a_handler() which is a valid pci device.
Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/x86/lib/bios_interrupts.c | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c index 290990a..47d9f59 100644 --- a/arch/x86/lib/bios_interrupts.c +++ b/arch/x86/lib/bios_interrupts.c @@ -161,15 +161,7 @@ int int1a_handler(void) bus = M.x86.R_EBX >> 8; reg = M.x86.R_EDI; dev = PCI_BDF(bus, devfn >> 3, devfn & 7); - if (!dev) { - debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, - bus, devfn); - /* Or are we supposed to return PCIBIOS_NODEV? */ - M.x86.R_EAX &= 0xffff00ff; /* Clear AH */ - M.x86.R_EAX |= PCIBIOS_BADREG; - retval = 0; - return retval; - } + switch (func) { case 0xb108: /* Read Config Byte */ byte = x86_pci_read_config8(dev, reg); |