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| | * | | power:bat:trats: Break battery charging with ctrl+CŁukasz Majewski2013-07-05-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for disabling battery charging with ctrl+C keyboard combination pressed. Moreover the battery update is done more frequently. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | arm:trats: Increase malloc pool size (for DFU ext4 transfers)Łukasz Majewski2013-07-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit: dfu: make data buffer size configurable SHA1: 89a72b2e0e141042c9109185e02d39b2107ffc62 replaced statically allocated buffers with one allocated with memalign. Malloc pool size of 1MiB was too small, since we needed bigger buffer to transfer for example uImage. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | EXYNOS: Move files from board/samsung to arch/armRajeshwari Shinde2013-07-05-1990/+788
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch performs the following: 1) Convert the assembly code for memory and clock initialization to C code. 2) Move the memory and clock init codes from board/samsung to arch/arm 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted the common lowlevel_init from assembly to C-code 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5. 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already done in _main. 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250. TEST: Tested SD-MMC boot on SMDK5250 and Origen. Tested USB and SPI boot on SMDK5250 Compile tested for SMDKV310. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | EXYNOS4210: Configure GPIO for uartRajeshwari Shinde2013-07-05-0/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch configures the gpio values for UART on Origen and SMDKV310 using pinmux Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | EXYNOS: LDS file move to commonRajeshwari Shinde2013-07-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused. It is renamed to exynos-uboot-spl.lds Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | EXYNOS: Add API for power reset and exit wakeupRajeshwari Shinde2013-07-05-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds APIs to get power reset status and exit the wakeup condition for both exynos5 and exynos4 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | SMDK5250: Remove reduntant codeRajeshwari Shinde2013-06-28-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enum boot_mode is defined twice once in spl.h and also in spl_boot.c, hence removing the same from spl_boot.c and including the header file. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | gpio: s5p_gpio: Call s5p_gpio_set_value() instead of open-codeAxel Lin2013-06-25-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call s5p_gpio_set_value() to avoid code duplication. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | gpio: s3c2440_gpio: Fix wrong writel argumentsAxel Lin2013-06-25-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code had writel arguments the wrong way around, fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | CONFIG: EXYNOS5: Enable silent consoleRajeshwari Shinde2013-06-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables CONFIG_SILENT_CONSOLE for EXYNOS5. This patch also removes the hardcoding of UART port from exynos5250 config. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | S5P: Serial: Add fdt support to driverRajeshwari Shinde2013-06-24-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds FDT support to the serial s5p driver. At present disabling the serial console (from the device tree) crashes U-Boot. Add checks for this case, so that execution can continue without a serial console. It also enables the serial_s5p driver recognize the silent_console option. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | EXYNOS5: FDT: Add serial device node valuesRajeshwari Shinde2013-06-24-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the device node required for serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | EXYNOS5: FDT: Add compatible strings for SerialRajeshwari Shinde2013-06-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | exynos: Adjust the starting MIF voltage to 1.05vBernie Thompson2013-06-24-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Exynos5250 silicon may require 1.05v on the MIF to be stable, so to be safe we can default to 1.05v instead of 1.00v. This can be set optimally later in the boot process by the kernel. The 0x6 value for 1.05v comes from the MAX77686 datasheet. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | EXYNOS5: I2C: Add FDT and non-FDT support for I2CAmar2013-06-24-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the function board_i2c_init() to add support for both FDT and non-FDT for I2C, and initialise the I2C channels. Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | video: exynos_fb: Add the missing #else clauseAjay Kumar2013-06-21-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a bug introduced while adding DT support to Exynos FIMD driver: commit c23f3157d69bbb6c044256870f745f195b12431e Author: Ajay Kumar <ajaykumar.rs@samsung.com> Date: Thu Feb 21 23:53:01 2013 +0000 video: exynos_fb: add DT support for FIMD driver Even though this part of code was missing, things were working fine on Exynos5250 because, samsung_get_base_fimd() used to give the correct base address for Exynos5250 FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | exynos: Enable mmc for snowSimon Glass2013-06-21-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Snow has an internal eMMC and an external SD card. Enable these in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5Axel Lin2013-07-02-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs. These SoCs have different gpio count but currently omap_gpio driver uses hard coded 192 which is wrong. This patch fixes this issue by: 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h. 2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5. Thanks for Lubomir Popov to provide valuable comments to fix this issue. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | | | ARM: OMAP4+: Fix MA detection during SDRAM_AUTO_DETECTIONLokesh Vutla2013-07-02-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During SDRAM_AUTO_DETECTION MA is not configured. For Soc's > OMAP4460 MA is present. So populating MA for the same. Tested on OMAP4430 PANDA, OMAP4460 PANDA. Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | | | am33xx: fix the ddr_cmdtctrl structureIlya Ledvich2013-07-02-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the wrong mapping between the DDR I/O control registers on AM33XX SoCs and the software representation in the SPL code. The most recent public TRM defines the following DDR I/O control registers offsets: * ddr_cmd0_ioctrl : offset 0x44E11404 * ddr_cmd1_ioctrl : offset 0x44E11408 * ddr_cmd2_ioctrl : offset 0x44E1140C * ddr_data0_ioctrl: offset 0x44E11440 * ddr_data1_ioctrl: offset 0x44E11444 While the struct ddr_cmdtctrl has also some reserved bits in the beginning. The struct is mapped to the address 0x44E11404. As a result "cm0ioctl" points to the ddr_cmd1_ioctrl register, "cm1ioctl" to the ddr_cmd2_ioctrl and etc. Registers ddr_cmd0_ioctrl and ddr_data0_ioctrl are never configured because of this mapping mismatch. Signed-off-by: Ilya Ledvich <ilya@compulab.co.il> Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
| * | | | usb: omap: ulpi: fix ulpi transceiver accessMichael Trimarchi2013-07-02-33/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix the omap access to the transceiver configuration registers using the ulpi bus. As reported by the documentation the bit31 is used only to check if the transaction is done or still running and the reading and writing operation have different offset and have different values. What we need to do at the end of a transaction is leave the bus in done state. Anyway an error using the ulpi omap register is not recoverable so any error give out the usage of this interface. Tested on a custom OMAP5430 board with a TUSB1210 ULPI PHY on USBB1. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
| * | | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-28-106/+1776
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| | * | | vf610twr: Remove SoC name from U-Boot promptOtavio Salvador2013-06-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've been dropping SoC name from U-Boot prompt as it increase complexity for automatic testing and makes line longer for no good reason. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Andy Voltz <andy.voltz@timesys.com>
| | * | | vf610twr: Add default environment in line with other Freescale boardsOtavio Salvador2013-06-28-2/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a default environment which should be able to support both 3.0.15 from Timesys and upcoming 3.11. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Andy Voltz <andy.voltz@timesys.com>
| | * | | video: mxsfb: Break the line in videomode messageFabio Estevam2013-06-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we have the following on boot: CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SD/MMC #0, 3V3 DRAM: 128 MiB MMC: MXS MMC: 0 Video: MXSFB: 'videomode' variable not set!In: serial Break the line of the warning message in order to have a better reading format. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | MAINTAINERS: Add an entry to the mx6q wandboard variantFabio Estevam2013-06-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | | m28evk: Move README file inside board directoryFabio Estevam2013-06-26-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Board specific READMEs should be located inside the respective board directory. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | mx28evk: Move README file inside board directoryFabio Estevam2013-06-26-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Board specific READMEs should be located inside the respective board directory. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | README: mxs: Introduce README.mxsFabio Estevam2013-06-26-28/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create a README.mxs file that contains instructions on how to use U-boot for both MX23 and MX28. As boot from NAND has only been tested on mx28, make it clear that it only applies to MX28. While at it, do some small cleanups for the sake of consistency: - Use "MX28" instead of "i.MX28" - Use "section" instead of "chapter" when referring to specific parts of the reference manual chapters. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | README: mx28_common: Fix structure of sentenceFabio Estevam2013-06-26-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-structure the sentence a bit so that it can clearer. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | README: mx28_common: Do not hardcode the SSP portFabio Estevam2013-06-26-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MX28 can boot from SSP0 or SSP1, so it is better not to hardcode the SSP port in the instructions. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | README: mx28_common: Keep the text within 80 columnsFabio Estevam2013-06-26-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to improve readability keep the text within 80 columns. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | imx: nitrogen6x: Enable filesystem generic commandsRobert Winkler2013-06-26-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
| | * | | imx: nitrogen6x: Enable raw initrdRobert Winkler2013-06-26-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
| | * | | imx: nitrogen6x: Enable bootzRobert Winkler2013-06-26-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
| | * | | imx: nitrogen6x: Enabled data cacheRobert Winkler2013-06-26-2/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
| | * | | mx27: add i2c clocktrem2013-06-26-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org> Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
| | * | | mx27: add function enable_cachestrem2013-06-26-0/+8
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
| | * | | imx: Add support for the SabreSD shipped with i.MX6DLPierre Aubert2013-06-26-12/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SabreSD platform is available with i.MX6Q or i.MX6DL. This patch adds the support of the i.MX6DL. The config file and the board directory are renamed to remove the reference to the MX6Q. Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | imx: Complete the pin definitions for the i.MX6DL / i.MX6SoloPierre Aubert2013-06-26-22/+1569
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de>
| | * | | imx6: fix GPR2 wrong definitionPierre Aubert2013-06-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de> Acked-by: Dirk Behme <dirk.behme@gmail.com>
| | * | | dwc_ahsata: Allow use with dcache enabledEric Nelson2013-06-26-9/+25
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| | * | | spi: mxc_spi: Update pre and post divider algorithmDirk Behme2013-06-26-18/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
| | * | | spi: mxc_spi: Fix pre and post divider calculationDirk Behme2013-06-26-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
| | * | | Add support for Wandboard QuadTapani Utriainen2013-06-26-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Quad version of Wandboard; fix compile warning resulting from having 2G of memory. Signed-off-by: Tapani Utriainen <tapani@technexion.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | | pxa: fix memory coherency problem after relocationMike Dunn2013-06-22-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the xscale, the icache must be invalidated and the write buffers drained after writing code over the data bus, even if the caches are disabled. Tested on the pxa270. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | | pxa: use -mcpu=xscale compiler optionMike Dunn2013-06-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass '-mcpu=xscale' to the compiler instead of march and mtune. This will cause gcc to define the __XSCALE__ macro. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | | pxa: turn icache off in cpu_init_crit()Mike Dunn2013-06-22-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment in the low-level initialization function cpu_init_crit() says that the caches are being disabled, but (oddly) the icache is actually turned on. This is probably not a good idea prior to relocating code, so this patch turns it off. Tested on the pxa270. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | | pxa: palmtreo680 flash programming utilityMike Dunn2013-06-22-0/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a userspace linux utility that writes the u-boot image to an mtd partition on the docg4 nand flash. A special utility is required to do this because u-boot is partially loaded by an initial program loader (IPL) that is permanently programmed to the boot region of the flash. This IPL expects the image to be written in a unique format. The characteristics of this format can be summarized as follows: - Flash blocks to be loaded must have a magic number in the oob bytes of the first page of the block. - Each page must be written redundantly in the subsequent page. - The integrated flash controller's "reliable mode" is used, requiring that alternate 2k regions (4 pages) are skipped when writing. For these reasons, a u-boot image can not be written using nandwrite from mtd-utils. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | | pxa: add support for palmtreo680 boardMike Dunn2013-06-22-0/+1057
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Palm Treo 680 smartphone. A quick overview of u-boot implementation on the treo 680... The treo 680 has a Diskonchip G4 nand flash chip. This device has a 2k region that maps to the system bus at the reset vector in a NOR-like fashion so that it can be used as the boot device. The phone is shipped with this 2k region configured as write-protected (can't be modified) and programmed with an initial program loader (IPL). At power-up, this IPL loads the contents of two flash blocks to SDRAM and jumps to it. The capacity of the two blocks is not large enough to hold all of u-boot, so a u-boot SPL is used. To conserve flash space, these two blocks and the necessary number of subsequent blocks are programmed with a concatenated spl + u-boot image. That way, the IPL will also load a portion of u-boot proper, and when the spl runs, it relocates the portion of u-boot that the IPL has already loaded, and then resumes loading the remaining part of u-boot before jumping to it. The default_environment is used (CONFIG_ENV_IS_NOWHERE) because I didn't think that having a writable environment was worth the cost of a flash block, although adding it would be straightforward. I abuse the CONFIG_EXTRA_ENV_SETTINGS option to specify the usbtty for the console (CONFIG_SYS_CONSOLE_IS_IN_ENV). Support for the LCD is included, but currently it is only useful for displaying the u-boot splash screen. But if u-boot is built without the usbtty console, it does display the auto-boot progress nicely. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
generated by cgit v1.1 at 2024-11-05 12:36:48 +0000