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| * | MX6UL: Add definition for UART6 base addressFabio Estevam2016-04-19-0/+1
| | | | | | | | | | | | | | | | | | Define the UART6_BASE_ADDR for MX6UL. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | board: ge: bx50v3: Fix to meet LVDS display power on timingAkshay Bhat2016-04-19-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | On a reset/reboot, the display power needs to be off for atleast 500ms before turning it back on. So add a delay to the boot process to meet the display timing requirement. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * | board: ge: bx50v3: Use pwm for display backlightAkshay Bhat2016-04-19-0/+14
| | | | | | | | | | | | | | | | | | | | | Setup the LCD backlight brightness control pin to use PWM Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * | board: ge: bx50v3: Setup LDB_DI_CLK sourceAkshay Bhat2016-04-19-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | To generate accurate pixel clocks required by the displays we need to set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since PLL5 is disabled on reset, we need to enable PLL5. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * | board: ge: bx50v3: Split display setup functionAkshay Bhat2016-04-19-45/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | B450v3/B650v3 uses single channel LVDS and does not support HDMI. B850v3 uses dual channel LVDS and supports HDMI. Hence split the display setup into two different functions. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6: Fix procedure to switch the parent of LDB_DI_CLKAkshay Bhat2016-04-19-0/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is generated, and the LVDS display will hang when the ipu_di_clk is sourced from ldb_di_clk. To fix the problem, both the new and current parent of the ldb_di_clk should be disabled before the switch. This patch ensures that correct steps are followed when ldb_di_clk parent is switched in the beginning of boot. This patch was ported from the 3.10.17 NXP kernel http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.10.17_1.0.1_ga&id=eecbe9a52587cf9eec30132fb9b8a6761f3a1e6d NXP errata number: ERR009219, EB821 Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mx5: Fix NAND image generationMarek Vasut2016-04-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The echo -ne "\xNN" does not work in certain bourne-compatible shells, like dash. The recommended way of hex->char conversion is using printf(1), but there is a pitfall here. The GNU printf does support "\xNN" format, but according to the opengroup documentation, this is not part of POSIX. The POSIX printf only defines "\NNN" where N is octal. Thus, for the sake of compatibility, we use that. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | board: ge: bx50v3: Disable unused pinsJustin Waters2016-04-19-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain pins are not used on the i.MX6, and should have a neutral pad configuration in order to reduce electrical interference on the board. This commit defines these pins with a default value rather than relying on the system defaults. Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2016-04-25-160/+371
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| * | | i2c: designware_i2c: Add support for PCI(e) based I2C cores (x86)Stefan Roese2016-04-25-12/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the PCI(e) based I2C cores. Which can be found for example on the Intel Bay Trail SoC. It has 7 I2C controllers implemented as PCI devices. This patch also adds the fixed values for the timing registers for BayTrail which are taken from the Linux designware I2C driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | i2c: designware_i2c: Add DM supportStefan Roese2016-04-25-26/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DM support to the designware I2C driver. It currently supports DM and the legacy I2C support. The legacy support should be removed, once all platforms using it have DM enabled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| * | | i2c: designware_i2c: Prepare for DM driver conversionStefan Roese2016-04-25-83/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch prepares the designware I2C driver for the DM conversion. This is mainly done by removing struct i2c_adapter from the functions that shall be used by the DM driver version as well. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| * | | i2c: designware_i2c: Integrate set_speed() into dw_i2c_set_bus_speed()Stefan Roese2016-04-25-24/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integrating set_speed() into dw_i2c_set_bus_speed() will make the conversion to DM easier for this driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| * | | i2c: designware_i2c: Add dw_i2c_enable() helper functionStefan Roese2016-04-25-20/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dw_i2c_enable() is used to dis-/en-able the I2C controller. It makes sense to add such a function, as the controller is dis-/en-abled multiple times in the code. Additionally, this function now checks, if the controller is really dis-/en-abled. This code is copied from the Linux I2C driver version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | i2c: designware_i2c: Add ic_enable_status to ic_regs structStefan Roese2016-04-25-33/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the ic_enable_status register to the i2c_regs struct. Additionally the register offsets are added, to better check, if the offset matches the register description in the datasheet. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
| * | | dm: core: Add dev_get_addr_ptr() to return a pointer to the reg addressStefan Roese2016-04-25-0/+15
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some platforms (e.g. x86), the return value of dev_get_addr() can't be assigned to a pointer type variable directly. As there might be a difference between the size of fdt_addr_t and the pointer type. On x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So assigning the register base directly in dev_get_addr() results in this compilation warning: warning: cast to pointer from integer of different size This patch introduces the new function dev_get_addr_ptr() that returns a pointer to the 'reg' address that can be used by drivers in this case. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-ubiTom Rini2016-04-25-3/+2
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| * | ubifs: fix memory corruption in super.cHeiko Schocher2016-04-22-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In list "super_blocks" ubifs collects allocated super_block structs. U-Boot frees on unmount the allocated struct, so the pointer stored in this list is free after the umount. On a new ubifs mount, the new allocated super_block struct get inserted into the super_blocks list ... which contains now a freed pointer, and the list_add_tail() corrupts the freed memory ... 2 solutions are possible: - remove the super_block from the super_blocks list on umount - as U-Boot does not use the super_blocks list ... remove it complete for U-Boot. Both solutions should not introduce problems for porting to newer linux version, so this patch removes the unused super_blocks list, as it saves code size and execution time. Signed-off-by: Heiko Schocher <hs@denx.de>
| * | mtd, ubi: set free_count to zero before walking through erase listHeiko Schocher2016-04-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set free_count to zero before walking through ai->erase list in wl_init(). As U-Boot has no workqueue/threads, it immediately calls erase_worker(), which increase for each erased block free_count. Without this patch, free_count gets after this initialized to zero in wl_init(), so the free_count variable always has the maybe wrong value 0. Detected this behaviour on the dxr2 board, where the UBI fastmap gets not written when attaching/dettaching on an empty NAND. It drops instead the error message: could not find any anchor PEB With this patch, fastmap gets written on dettach. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-04-22-891/+1
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| * | | x86: Correct typo of Miao Yan's email addressBin Meng2016-04-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Miao Yan's email address is wrong in fw_cfg.c. Fix it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | | x86: qemu: Drop our own ACPI implementationBin Meng2016-04-22-890/+0
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our own ACPI implementation (when CONFIG_QEMU_ACPI_TABLE is not set) does not build anymore after x86 has been fully converted to DM PCI. Instead of trying to fix the build errors, given we now have the ACPI support via QEMU's fw_cfg interface, which is a more reliable way to generate correct ACPI tables than by ourselves, hence drop our own ACPI implementation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | arc/cache: really do flush_dcache_all() even if IOC existsAlexey Brodkin2016-04-21-5/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | flush_dcache_all() is used in the very end of U-Boot self relocation to write back all copied and then patched code and data to their new location in the very end of available memory space. Since that has nothing to do with IO (i.e. no external DMA happens here) IOC won't help here and we need to write back data cache contents manually. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | Prepare v2016.05-rc2Tom Rini2016-04-21-1/+1
| | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | configs: Update some Xilinx configsTom Rini2016-04-20-0/+29
| | | | | | | | | | | | As part of 3457bba these configs didn't get updated. Update them now. Signed-off-by: Tom Rini <trini@konsulko.com>
* | cmd/usb_mass_storage.c: Rework ums_init() ret logic slightlyTom Rini2016-04-20-13/+5
| | | | | | | | | | | | | | | | | | | | | | | | Previously, ret could be used uninitialized if blk_get_device_part_str() failed. Default to ret being set to -1 so that we always return an err up if we have a problem and then invert the logic on testing ums_count as when that is non-zero is the time we can return 0. Cc: John Tobias <john.tobias.ph@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-04-20-354/+711
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: configs/bcm28155_ap_defconfig configs/dra72_evm_defconfig configs/dra74_evm_defconfig configs/ma5d4evk_defconfig Signed-off-by: Tom Rini <trini@konsulko.com>
| * | usb: gadget Move: CONFIG_G_DNL_* to KconfigSam Protsenko2016-04-20-147/+298
| | | | | | | | | | | | | | | | | | And also reformat defconfigs using "make savedefconfig" rule. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * | usb: dwc3: Move CONFIG_USB_DWC3_PHY_* to KconfigSam Protsenko2016-04-20-9/+31
| | | | | | | | | | | | Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * | usb: dwc3: Move CONFIG_USB_DWC3_OMAP to KconfigSam Protsenko2016-04-20-3/+23
| | | | | | | | | | | | Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * | usb: dwc3: Move CONFIG_USB_DWC3_GADGET/HOST to KconfigSam Protsenko2016-04-20-6/+38
| | | | | | | | | | | | | | | | | | Description was borrowed from kernel dwc3 Kconfig. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * | usb: gadget: Move CONFIG_USB_GADGET_DOWNLOAD to KconfigSam Protsenko2016-04-20-45/+102
| | | | | | | | | | | | | | | | | | | | | While at it, remove obsolete CONFIG_USBDOWNLOAD_GADGET option from some config headers. This is also probably fixes am335x_baltos board. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * | usb: gadget: Move CONFIG_USB_GADGET_DUALSPEED to KconfigSam Protsenko2016-04-20-103/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_USB_GADGET_DUALSPEED option to Kconfig and make all UDC controllers select USB_GADGET_DUALSPEED: - add next options to Kconfig selecting USB_GADGET_DUALSPEED: - USB_GADGET_ATMEL_USBA - USB_GADGET_DWC2_OTG - USB_DWC3 - CI_UDC - make USB_MUSB_GADGET select USB_GADGET_DUALSPEED While at it, make some related fixes: - remove DUALSPEED from configs that don't enable gadget support: - kwb.h - tseries.h - add missing USB_GADGET option to next configs: - novena_defconfig - pcm051_rev*_defconfig - xfi3_defconfig Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * | usb: gadget: Move CONFIG_USB_GADGET_VBUS_DRAW to KconfigSam Protsenko2016-04-20-32/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The description was borrowed from kernel. Definitions were added to defconfig files in a way that "make savedefconfig" generates exactly the same file as used defconfig. Boards using 0 mA as CONFIG_USB_GADGET_VBUS_DRAW value were moved to use 2 mA (as minimal allowed by Kconfig). Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
| * | usb: ums - expose selected partition/sJohn Tobias2016-04-20-10/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By applying this patch, it will give us some flexibility to expose a selected partition/s. e.g: 1. To expose several partitions ums 0 mmc 0:1,0:6 2. To expose the all partitions ums 0 mmc 0:0 3. To expose multiple partititions on several devices ums 0 mmc 0:1,1:6 4. It support legacy format ums 0 mmc 0 Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
| * | USB: g_dnl: Change device classJohn Tobias2016-04-20-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USB Mass Storage (ums) works in Windows, Linux and OS X (EL Capitan). But, not in OS X (Yosemite). By applying the said patch, it extends the ums support. Signed-off-by: John Tobias <john.tobias.ph@gmail.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid XU3 (./test/py UMS + DFU tests) Tested-by: John Tobias <john.tobias.ph@gmail.com> Linux: - Run ums to expose all my eMMC partition - shows all correctly - Run ums to expose only 1 partition of my eMMC - show correctly Windows: - Run ums to expose all my eMMC partition - it detects but it prompts, if I want to format it (due to a non windows partition) - Run ums to expose only the FAT32 partition - it show the partition correctly.
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-04-20-90/+105
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| * | arm: socfpga: socrates: Add eth0 alias to enable ethernetStefan Roese2016-04-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables full ethernet usage, including U-Boot to write the board specific MAC address (ethaddr) into the DT blob before passing it to Linux. Without this, the ethaddr is not detected in U-Boot at all, resulting in this error upon bootup: ... Model: EBV SOCrates Net: Error: ethernet@ff702000 address not set. No ethernet found. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | arm: socfpga: Fix typos in DT files (environmnet -> environment)Stefan Roese2016-04-20-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a small typo in some of the SoCFPGA dts files that has spread via copy-and-paste. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Repair DQ window centering codeMarek Vasut2016-04-20-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code uses a lot of signed numbers, which ended up in variables of unsigned type, which resulted in all sorts of underflows. This in turn caused incorrect calibration on certain boards. Moreover, repair the readout of the DQ delay, which was being pulled from wrong register. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Staticize global variablesMarek Vasut2016-04-20-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Just staticize global variables in sequencer, since there is no point in having these symbols available outside of the DDR code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Make DLEVEL behavior inclusiveMarek Vasut2016-04-20-66/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Originally, the DLEVEL selects the debug level within the sequencer code, but only displays the messages on that particular debug level. Tweak the handling such that for particular debug level, debug messages on that level and lower are displayed. This allows better regulation of debug message verbosity. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Zero DM IN delay in scc_mgr_zero_group()Marek Vasut2016-04-20-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This one last set of delay configuration registers was not properly zeroed out originally, fix it and zero them out. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Remove unnecessary ODT mode configMarek Vasut2016-04-20-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no point in resetting the ODT setting if the write test failed, since the code will always retry the calibration and thus reconfigure the ODT anyway OR the code will fail calibration and halt. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Remove unnecessary update of the SCCMarek Vasut2016-04-20-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is followed by SCC manager update. Moreover, only this function triggers the SCC manager update internally. Thus, remove the internal invocation to avoid triggering the update twice. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Fix DRAM end value in protection ruleMarek Vasut2016-04-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hi address bitfield in the protection rule must be set to the last address in the region which the rule represents. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Fix scc_mgr_set() argument orderMarek Vasut2016-04-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Tweak DQS tracking enable handlingMarek Vasut2016-04-20-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the most unlikely case the DQS tracking was to be disabled, make sure we do not errornously re-enable it. Note that DQS tracking is enabled on all systems observed thus far. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | ddr: altera: Replace ad-hoc constant with macroMarek Vasut2016-04-20-2/+2
| |/ | | | | | | | | | | | | | | | | The bit 22 is in fact DQS tracking enable bit (dqstrken) and there is a macro for this bit already, so use it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-04-19-2/+3
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