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| * | | | ppc4xx: Add new weak functions to support boardspecific DDR2 configurationStefan Roese2007-07-16-14/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better support non default, boardspecific DDR(2) controller configuration. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Add remove_tlb() function to remove a mem area from TLB setupStefan Roese2007-07-16-1/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new function remove_tlb() can be used to remove the TLB's used to map a specific memory region. This is especially useful for the DDR(2) setup routines which configure the SDRAM area temporarily as a cached area (for speedup on auto-calibration and ECC generation) and later need this area uncached for normal usage. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Change receive buffer handling in the 4xx emac driverStefan Roese2007-07-12-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change fixes a bug in the receive buffer handling, that could lead to problems upon high network traffic (broadcasts...). Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-07-11-214/+1958
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| * | | | | ppc4xx: Update lwmon5 default environmentStefan Roese2007-07-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | ppc4xx: Update lwmon5 boardStefan Roese2007-07-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add unlock=yes environment variable to default variables to unlock the CFI flash by default. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | Coding style cleanup. Update CHANGELOG.Wolfgang Denk2007-08-14-105/+165
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-armWolfgang Denk2007-08-14-1383/+1474
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| * | | | | | Supply spi interface in at45.cPeter Pearse2007-08-14-0/+5
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| * | | | | | Replace lost end of at45.c.Peter Pearse2007-08-14-0/+14
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| * | | | | | Update Makefiles for merged and split at45.c.Peter Pearse2007-08-14-3/+3
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| * | | | | | Delete the merged files.Peter Pearse2007-08-14-1242/+0
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| * | | | | | Add the files.Peter Pearse2007-08-14-0/+937
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| * | | | | | Add MACH_TYPE records for several AT91 boards.Peter Pearse2007-08-14-139/+516
| | |_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge to two at45.c files into a common file, split to at45.c and spi.c Fix spelling error in DM9161 PHY Support. Initialize at91rm9200 board (and set LED). Add PIO control for at91rm9200dk LEDs and Mux. Change dataflash partition boundaries to be compatible with Linux 2.6. Signed-off-by: Peter Pearse <peter.pearse@arm.com> Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
* | | | | | Merge with /home/wd/git/u-boot/workWolfgang Denk2007-08-14-9/+14
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| * | | | | Fix initrd/dtb interactionAndy Fleming2007-08-14-9/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original code would wrongly relocate the blob to be right before the initrd if it existed. The blob *must* be within CFG_BOOTMAPSZ, if it is defined. So we make two changes: 1) flag the blob for relocation whenever its address is above BOOTMAPSZ 2) If the blob is being relocated, relocate it before kbd, not initrd Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | | Coding style cleanup, update CHANGELOGWolfgang Denk2007-08-14-1/+229
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xxWolfgang Denk2007-08-14-712/+2036
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| * | | | | | 85xxCDS: Add make targets for legacy systems.Randy Vinson2007-08-14-23/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson@mvista.com>
| * | | | | | 85xxCDS: Enable the VIA PCI-to-ISA bridge.Andy Fleming2007-08-14-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Author: Randy Vinson <rvinson@linuxbox.(none)> Enable the PCI-to-ISA bridge in the VIA Southbridge located on the Arcadia main board. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | | | Add support for UEC to 8568Andy Fleming2007-08-14-35/+313
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | Add PCI support for MPC8568MDS boardHaiying Wang2007-08-14-38/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is against u-boot-mpc85xx.git of www.denx.com Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
| * | | | | | Empirically set cpo and clk_adjust for mpc85xx DDR2 supportHaiying Wang2007-08-14-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is against u-boot-mpc85xx.git of www.denx.com Setting cpo to 0x9 for frequencies higher than 333MHz is verified on both MPC8548CDS board and MPC8568MDS board, especially for supporting 533MHz DDR2. Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for DDR2 on all current board versions especially ver 1.92 or later to bring up. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| * | | | | | Use an absolute address when jumping out of 4k boot pageKumar Gala2007-08-14-29/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On e500 when we leave the 4k boot page we should use an absolute address since we don't know where the board code may want us to be really running at. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | | MPC85xx BA bits not set for 3-bit bank address DIMMAndy Fleming2007-08-14-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation does not set the number of bank address bits (BA) in the processor. The default assumes 2 logical bank bits. This works fine for a DIMM that uses devices with 4 internal banks (SPD byte17 = 0x4) but needs to be set appropriately for a DIMM that uses devices with 8 internal banks (SPD byte17 = 0x8). Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
| * | | | | | Fix minor 85xx warningsAndy Fleming2007-08-14-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some patches had inserted warnings into the build: * mpc8560ads declared data without using it * cpu_init declared ecm and immap without using it in all CONFIGs * MPC8548CDS.h had its default filenames changed so that they contained "\m" in the paths. Made the defaults not Windows-specific (or anything-specific) Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | 8548cds PCIE support.Ed Swarthout2007-08-14-221/+522
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the early L1 cache stack region guarded to prevent speculative fetches outside the locked range. Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions. init.S whitespace cleanup. Allow TEXT_BASE value to be specified on command line. This allows it to be set to 0xfffc0000 which cuts the uboot binary in half. Clear and enable lbc and ecm errors. Update last_busno in device-tree for pci and pcie. Remove load of obsolete cpu/mpc85xx/pci.0 Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | | | | | 8544ds PCIE supportEd Swarthout2007-08-14-60/+468
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address. Enable LBC and ECM errors and clear error registers. Add tftpflash env var to get uboot from tftp server and flash it. Add pci/pcie convenience env vars to display register space: "run pcie3regs" to see all pcie3 ccsr registers "run pcie3cfg" to see all cfg registers Whitespace cleanup and MPC8544DS.h Enable CONFIG_INTERRUPTS. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | | | | | 85xx start.S cleanup and exception supportAndy Fleming2007-08-14-302/+326
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Ed Swarthout <Ed.Swarthout@freescale.com> Support external interrupts from platform to eliminate system hangs. Define CONFIG_INTERRUPTS board configure option to enable. Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC. Remove extra cpu initialization redundant with hardware initialization. Whitespace cleanup. Define and use _START_OFFSET consistent with other processors using ppc_asm.tmpl Move additional code from .text to boot page to make room for exception vectors at start of image. Handle Machine Check, External and Critical exceptions. Fix e500 machine check error determination in traps.c TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | | | | | Add MPC8544DS READMEAndy Fleming2007-08-14-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | 85xx allow debugger to configure ddr.Ed Swarthout2007-08-14-3/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only check for mpc8548 rev 1 when compiled for 8548. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | | | | | mpc85xx L2 cache reporting and SRAM relocation option.Ed Swarthout2007-08-14-18/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow debugger to override flash cs0/cs1 settings to enable alternate boot regions Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | | | | | e500 needs ppc_asm.tmp MCK_EXCEPTIONEd Swarthout2007-08-14-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Always define MCK_EXCEPTION macro - so e500 can use it too. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* | | | | | | Coding style cleanup; rebuild CHANGELOGWolfgang Denk2007-08-14-25/+180
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* | | | | | | multicast tftp: RFC2090David Updegraff2007-08-13-7/+360
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implemented IETF RFC2090, Multicast TFTP. Initial implementation on Realtek RTL8139 and Freescale TSEC. Signed-off-by: David Updegraff <dave@cray.com> Signed-off-by: Ben Warren <bwarren@qstreams.com>
* | | | | | | New CONFIG_BOOTP_SERVERIP optionWilson Callan2007-08-13-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added CONFIG_BOOTP_SERVERIP to allow the tftp server to be different from the bootp server Signed-off-by: Wilson Callan <wcallan@savantav.com> Signed-off-by: Ben Warren <bwarren@qstreams.com>
* | | | | | | Add ability to take MAC address from the environment to DM9000 driverMike Rapoport2007-08-13-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Ben Warren <bwarren@qstreams.com>
* | | | | | | Sync'd u-boot-net with mainlineBen Warren2007-08-13-123288/+64453
|\ \ \ \ \ \ \ | |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge git://www.denx.de/git/u-boot Conflicts: drivers/bcm570x.c drivers/tigon3.c
| * | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xxWolfgang Denk2007-08-13-137/+1538
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| | * \ \ \ \ \ Merge commit 'remotes/wd/master'Jon Loeliger2007-08-13-841/+7772
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: MAKEALL With any luck, this is the last MAKEALL merge conflict!
| | * | | | | | | Modify SBC8641D to use new Freescale PCI routinesJoe Hamman2007-08-13-40/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI-Express sockets 1 and 2 verified working with Intel Pro/1000 PT adapter. Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com> Signde-off-by: Jon Loeliger <jdl@freescale.com>
| | * | | | | | | Add support for SBC8641D. Config files.Joe Hamman2007-08-10-0/+634
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Wind River's SBC8641D reference board. Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Jon Loeliger <jdl@freescale.com>
| | * | | | | | | Add support for SBC8641D. Board files.Joe Hamman2007-08-10-0/+735
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Wind River's SBC8641D reference board. Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Jon Loeliger <jdl@freescale.com>
| | * | | | | | | fsl_pci_init cleanup.Ed Swarthout2007-08-10-32/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not enable normal errors created during probe (master abort, perr, and pcie Invalid Configuration access). Add CONFIG_PCI_NOSCAN board option to prevent bus scan. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| | * | | | | | | pciauto_setup_device bars_num fixEd Swarthout2007-08-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Passing bars_num=0 to pciauto_setup_device should assign no bars. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Acked-by: Andy Fleming <afleming@freescale.com>
| | * | | | | | | 8641hpcn: Do correct sized pointer math.Jon Loeliger2007-08-10-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When I rebased Ed's patch and cleaned up a few compilation problems, I apparently rebased my brain on crack first. Fix that by doing (char *) sized pointer math as needed. Signed-off-by: Jon Loeliger <jdl@freescale.com>
| | * | | | | | | cpu/86xx fixes.Jon Loeliger2007-08-10-102/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | | | | | | | Minor coding style cleanup. Update CHANGELOG.Wolfgang Denk2007-08-13-46/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | | | | | | | atmel_mci: Fix data timeout valueHaavard Skinnemoen2007-08-13-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calculate the data timeout based on values from the CSD instead of just using a hardcoded DTOR value. This is a backport of a similar fix in BSP 2.0, with one additional fix: the DTOCYC value is rounded up instead of down. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * | | | | | | | AVR32: Include <div64.h> instead of <asm/div64.h>Haavard Skinnemoen2007-08-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | include/asm-avr32/div64.h was recently moved to include/div64.h, but cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of the patch was merged perhaps?) This patch updates cpu/at32ap/interrupts.c so that the avr32 port compiles again. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
generated by cgit v1.1 at 2024-11-08 12:01:05 +0000