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* board: ge: bx50v3: Use pwm for display backlightAkshay Bhat2016-04-19-0/+14
| | | | | | | Setup the LCD backlight brightness control pin to use PWM Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
* board: ge: bx50v3: Setup LDB_DI_CLK sourceAkshay Bhat2016-04-19-0/+43
| | | | | | | | | To generate accurate pixel clocks required by the displays we need to set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since PLL5 is disabled on reset, we need to enable PLL5. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
* board: ge: bx50v3: Split display setup functionAkshay Bhat2016-04-19-45/+67
| | | | | | | | | B450v3/B650v3 uses single channel LVDS and does not support HDMI. B850v3 uses dual channel LVDS and supports HDMI. Hence split the display setup into two different functions. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: Fix procedure to switch the parent of LDB_DI_CLKAkshay Bhat2016-04-19-0/+160
| | | | | | | | | | | | | | | | | | | | | Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is generated, and the LVDS display will hang when the ipu_di_clk is sourced from ldb_di_clk. To fix the problem, both the new and current parent of the ldb_di_clk should be disabled before the switch. This patch ensures that correct steps are followed when ldb_di_clk parent is switched in the beginning of boot. This patch was ported from the 3.10.17 NXP kernel http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.10.17_1.0.1_ga&id=eecbe9a52587cf9eec30132fb9b8a6761f3a1e6d NXP errata number: ERR009219, EB821 Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
* arm: mx5: Fix NAND image generationMarek Vasut2016-04-19-1/+1
| | | | | | | | | | | | The echo -ne "\xNN" does not work in certain bourne-compatible shells, like dash. The recommended way of hex->char conversion is using printf(1), but there is a pitfall here. The GNU printf does support "\xNN" format, but according to the opengroup documentation, this is not part of POSIX. The POSIX printf only defines "\NNN" where N is octal. Thus, for the sake of compatibility, we use that. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* board: ge: bx50v3: Disable unused pinsJustin Waters2016-04-19-0/+10
| | | | | | | | | | | Certain pins are not used on the i.MX6, and should have a neutral pad configuration in order to reduce electrical interference on the board. This commit defines these pins with a default value rather than relying on the system defaults. Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Cc: Stefano Babic <sbabic@denx.de>
* ARM: rpi: fix 64-bit CONFIG_SYS_TEXT_BASEStephen Warren2016-04-16-0/+4
| | | | | | | | The Pi firmware has changed the default "kernel" load address for 64-bit mode. The authors have confirmed that this is a deliberate and long-term change. Adapt U-Boot to the new value. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* drivers/tpm/tpm_tis_sandbox.c: Fix uninitialized variable useTom Rini2016-04-15-1/+1
| | | | | | | | | | In rollback_space_kernel we were not initializing the reserved fields which should be for safety sake, and doing memset here means we don't need to set the version field specifically either. Reported-by: Coverity (CID: 143917) Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* fdt: implement dev_get_addr_name()Stephen Warren2016-04-15-0/+28
| | | | | | | | | This function parses the reg property based on an index found in the reg-names property. This is required for bindings that are written using reg-names rather than hard-coding indices in reg. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* sandbox: Enable many more commandsTom Rini2016-04-15-6/+59
| | | | | | | | | | | | - Set CONFIG_SYS_CACHELINE_SIZE to ARCH_DMA_MINALIGN as that should be good enough. - Make <asm/io.h> include <asm/types.h> like other arches do - Enable many many more drivers in sandbox_defconfig so that we can get more build-time testing on this platform. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* test/dm/core.c: Make pre-reloc test use pre-reloc structTom Rini2016-04-14-1/+1
| | | | | | | | | | | | | LLVM 3.5 noted: test/dm/core.c:41:35: warning: unused variable 'test_pdata_pre_reloc' [-Wunused-const-variable] static const struct dm_test_pdata test_pdata_pre_reloc = { And the correct fix here is that the driver_info_pre_reloc test should use the test_pdata_pre_reloc not test_pdata_manual variable Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: README.sandbox: Update dm test commandJagan Teki2016-04-14-1/+2
| | | | | | | | | Update dm test command with pytest instead of ./test/dm/test-dm.sh Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* doc: driver-model: Update dm tests run using test.pyJagan Teki2016-04-14-101/+128
| | | | | | | | | | Since all the tests are implemented in pytest infrastructure, So update the dm tests with the same instead of ./test/dm/test-dm.sh Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* dm: device.c: Minor coding-style fixStefan Roese2016-04-14-6/+6
| | | | | | | | Fix multi-line comment indentation in device_bind() Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: part: fix missing driver name in debug printNishanth Menon2016-04-14-1/+2
| | | | | | | | Fixes the following warning with PART_DEBUG enabled: disk/part.c: In function ‘get_partition_info’: disk/part.c:372:3: warning: format ‘%s’ expects a matching ‘char *’ argument [-Wformat] Signed-off-by: Nishanth Menon <nm@ti.com>
* dm: core: device: set pinctrl state for pinctrl devicePeng Fan2016-04-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We may have pinmux settings for pinctrl device, like the following example: " &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog_1>; imx6ul-evk { pinctrl_hog_1: hoggrp-1 { fsl,pins = < MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000 >; }; [......] }; " We should not only select pinctrl state for non pinctrl devices, we need also to handle pin mux settings such as pinctrl_log for pinctrl devices. So at the end of probing process of pinctrl device, select the default state of pinctrl device. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* xpress: Update <usb/ehci-fsl.h> includeTom Rini2016-04-13-1/+1
| | | | | | | This has been renamed to <usb/ehci-ci.h> some time ago but was missed here. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-13-292/+3058
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| * ARM64: zynqmp: Use i2c cadence DM driverMichal Simek2016-04-13-9/+12
| | | | | | | | | | | | | | | | Use i2c cadence DM driver for all zynqmp targets except ZCU102 because I2C muxes and PCA953x are not supported in the tree yet. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * dm: i2c: Add driver for Cadence I2C IPMoritz Fischer2016-04-13-0/+343
| | | | | | | | | | | | | | | | | | | | | | This is a possible drop in replacement for drivers/i2c/zynq-i2c.c Since this is cadence IP it has been renamed to cdns-i2c, to make sense with the compatible string. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * i2c: Describe Cadence I2C devicetree bindingsMoritz Fischer2016-04-13-0/+20
| | | | | | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Enable pca953x driver for zcu102Michal Simek2016-04-13-0/+4
| | | | | | | | | | | | | | zcu102 has two pca953x on i2c bus 0. Chips 0x20 and 0x21. Enable option to work with these two chips. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * GPIO: pca953x: Remove compilation warnings on arm64Michal Simek2016-04-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | Warnings: w+../drivers/gpio/pca953x.c: In function ‘do_pca953x’: w+../drivers/gpio/pca953x.c:220:5: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] w+../drivers/gpio/pca953x.c:233:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Enable CMD_GPIO and DM_GPIO for ep108Michal Simek2016-04-13-0/+2
| | | | | | | | | | | | Enable missing GPIO options. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Kconfig: Enable ZYNQ_GPIO for ZynqMPSiva Durga Prasad Paladugu2016-04-13-1/+1
| | | | | | | | | | | | | | | | Enable ZYNQ_GPIO for ZynqMP using Kconfig. It enables the GPIO driver support for ZynqMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynqmp: Add GPIO driver support for ZynqMPSiva Durga Prasad Paladugu2016-04-13-53/+147
| | | | | | | | | | | | | | Add GPIO driver support for ZynqMP platform Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Move the definitions to driver fileSiva Durga Prasad Paladugu2016-04-13-61/+61
| | | | | | | | | | | | | | | | Move all the gpio definitions to driver file as there is no use of them in other files. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Remove non driver model codeSiva Durga Prasad Paladugu2016-04-13-159/+1
| | | | | | | | | | | | | | | | | | Remove non driver model support as it moved to driver model. Dont need non driver model anymore. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: Kconfig: Enable Zynq GPIO driver using kconfigSiva Durga Prasad Paladugu2016-04-13-2/+8
| | | | | | | | | | | | | | | | Enable DM GPIO and ZYNQ GPIO using kconfig instead of the board config file. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: zynq: Convert Zynq GPIO to driver modelSiva Durga Prasad Paladugu2016-04-13-0/+151
| | | | | | | | | | | | | | Convert Zynq GPIO driver to driver model Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Clean header after moving stuff to KconfigMichal Simek2016-04-13-3/+0
| | | | | | | | | | | | | | Moving stuff to Kconfig by script is keep some empty lines or comment in the file. Remove them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add support for zc1751 with DC cardsMichal Simek2016-04-13-1/+748
| | | | | | | | | | | | Support ZynqMP zc1751 with DC cards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add defconfig for zcu102 revB boardMichal Simek2016-04-13-0/+34
| | | | | | | | | | | | | | | | Support natively revB board. Till now support for revB was done via zcu102 defconfig where device-tree was changed to revB. This patch is adding direct defconfig for RevB. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add support for ZCU102 platformMichal Simek2016-04-13-1/+968
| | | | | | | | | | | | Add new board support. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Remove netdev.h from board fileMichal Simek2016-04-13-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Including netdev.h is causing compilation warning: + int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); + ^ w+In file included from ../board/xilinx/zynqmp/zynqmp.c:9:0: w+../include/netdev.h:204:41: warning: ‘struct eth_device’ declared inside parameter list [enabled by default] w+../include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] This patch removes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Make DDR detection code work on 32bit systemMichal Simek2016-04-13-3/+3
| | | | | | | | | | | | | | Define u64 types to be usable on 32bit system because of 64bit address and size cells and 32bit shifts in the code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Extend early malloc space to be able to run DM driversMichal Simek2016-04-13-0/+1
| | | | | | | | | | | | | | DM drivers need more malloc space for early DM models allocation. Use 4k instead of 1k. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Do not setup DM_ETH/GPIO/MMC by default for all boardsMichal Simek2016-04-13-2/+2
| | | | | | | | | | | | | | There are mini configurations which need to be fit to OCM that's why these options shouldn't be enabled by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add missing nand node for ep108Punnaiah Choudary Kalluri2016-04-13-0/+35
| | | | | | | | | | | | | | Add missing nand node for ep108. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added OOB timing settings in zynqmp-ep108.dtsAnurag Kumar Vulisha2016-04-13-0/+9
| | | | | | | | | | | | | | | | This patch adds the sata port phy OOB timing values in the sata device-tree node. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Use 64bit size cell format for memory nodeMichal Simek2016-04-13-4/+4
| | | | | | | | | | | | Enable option to support more then 4GB memories in single size block. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Fix DWC3 binding with the kernelMichal Simek2016-04-13-10/+42
| | | | | | | | | | | | Use the same binding as is used in mainline Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add serdes address space dp driverMichal Simek2016-04-13-1/+2
| | | | | | | | | | | | For run time serdes adjustment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Align register descriptionMichal Simek2016-04-13-2/+5
| | | | | | | | | | | | Separate register space and put it on more lines. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: dp: Add default properties to zynqmp.dtsiHyun Kwon2016-04-13-0/+3
| | | | | | | | | | | | | | Add some default properties to zynqmp.dtsi. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Use correct addresses in node namesHyun Kwon2016-04-13-2/+2
| | | | | | | | | | | | | | Reflect actual silicon addresses in DT node names. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Align node address with parent node for dpdmaMichal Simek2016-04-13-6/+6
| | | | | | | | | | | | Use right addresses for channel names Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add backward compatible string for uartMichal Simek2016-04-13-2/+2
| | | | | | | | | | | | | | | | | | Mainline kernel has no r1p12 compatible string that's why console stops to work with the latest DTS files. Append generic compatible string. Keep in your mind that using this generic compatible string not all uart features will be available. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Fix coding style for pcieMichal Simek2016-04-13-4/+4
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Extend pcie node to support legacy interruptsBharat Kumar Gogada2016-04-13-0/+10
| | | | | | | | | | | | | | | | Modifying device tree node to support legacy interrupts. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.1 at 2024-10-13 11:18:01 +0000