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* mx7ulp: Add HAB boot supportPeng Fan2017-04-05-1/+21
| | | | | | | | | | | | Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF size for HAB support boot on mx7ulp. Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build secure uboot. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* serial: lpuart: add i.MX7ULP supportPeng Fan2017-04-05-9/+176
| | | | | | | | | | | | | | Add i.MX7ULP support. The buadrate calculation on i.MX7ULP is different,so add a new setbrg function for i.MX7ULP. Add a enum lpuart_devtype for runtime check for different platforms. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
* serial: lpuart: restructure lpuart driverPeng Fan2017-04-05-235/+148
| | | | | | | | | | | | | | | | Drop CONFIG_LPUART_32B_REG. Move the register structure to a common file include/fsl_lpuart.h Define lpuart_serial_platdata structure which includes the reg base and flags. For 32Bit register access, use lpuart_read32/lpuart_write32 which handles big/little endian. For 8Bit register access, still use the orignal code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
* i2c: lpi2c: add lpi2c driver for i.MX7ULPPeng Fan2017-04-05-0/+989
| | | | | | | | | | | Add lpi2c driver for i.MX7ULP. Need to enable the two options to use this driver: CONFIG_DM_I2C=y CONFIG_SYS_I2C_IMX_LPI2C=y Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* pinctrl: Add i.MX7ULP pinctrl driverPeng Fan2017-04-05-4/+65
| | | | | | | | | Add i.MX7ULP pinctrl driver. Select CONFIG_PINCTRL_IMX7ULP to use this driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by : Stefano Babic <sbabic@denx.de>
* wdog: Add the watchdog driver for MX7ULP.Ye Li2017-04-05-0/+107
| | | | | | | | | | | | | This driver implements the HW WATCHDOG functions. Which needs to set CONFIG_HW_WATCHDOG to use them. This is disabled by default for mx7ulp. Use watchdog for reset cpu. Implement this in the driver. Need to define CONFIG_ULP_WATCHDOG to build it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* mx7ulp: Add iomux pins header fileYe Li2017-04-05-0/+910
| | | | | | | | | | | | | Add the iomux pins header file from iomux tool team. Change the IOMUXC0 pins to add IOMUX_CONFIG_MPORTS flags. Note: The IOMUXC0 offset provided in this file is from 0xD000, this is not aligned with IOMUXC0 base address. We have adjusted the IOMUXC0 base address to aligin with it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULPPeng Fan2017-04-05-1/+53
| | | | | | | | | | | | | Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* gpio: Add Rapid GPIO2P driver for i.MX7ULPPeng Fan2017-04-05-0/+254
| | | | | | | | | | | | | | | | | Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP. Have added all ports on RGPIO2P_0 and RGPIO2P_1. The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set to y to enable the drivers. To use the GPIO function, the IBE and OBE needs to set in IOMUXC. We did not set the bits in driver, but leave them to IOMUXC settings of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number for gpio APIs access. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Implement the clock functions for i2c driverYe Li2017-04-05-0/+44
| | | | | | | | | Implement the i2c clock enable and get function for mx7ulp. These functions are required by imx_lpi2c driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Add soc level initialization codes and functionsPeng Fan2017-04-05-2/+268
| | | | | | | | | | | | | | | Implement soc level functions to get cpu rev, reset cause, enable cache, etc. We will disable the wdog and init clocks in s_init at very early u-boot phase. Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev is hard coded to a fixed value. This may change in future. Reuse some code in imx-common. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Add clock framework and functionsPeng Fan2017-04-05-1/+2441
| | | | | | | | | | | | | | | | | | Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set clock source, divider, clock rate and parent source. Users need to include pcc.h to use the APIs to for peripherals clock. Each peripheral clock is defined in enum pcc_clk type. SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD enablement and settings, and all SCG clock initialization. User need use enum scg_clk to access each clock source. In clock.c, we initialize necessary clocks at u-boot s_init and implement the clock functions used by driver modules to operate clocks dynamically. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: add iomux driver to support IOMUXC0 and IOMUXC1Peng Fan2017-04-05-0/+173
| | | | | | | | | | | | Add a new driver under ULP directory to support its IOMUXC controllers. The ULP has two IOMUXC, the IOMUXC0 is used for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as the default IOMUX in this driver. Any pins in IOMUXC0 needs to configure with IOMUX_CONFIG_MPORTS in its mux_mode field. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: add registers header filePeng Fan2017-04-05-0/+1120
| | | | | | | | | Add imx-regs.h for i.MX7ULP registers addresses definitions and some registers structures. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Add mx7ulp to KconfigPeng Fan2017-04-05-1/+15
| | | | | | | | | | i.MX7ULP is a new series SoC which has different architecture from previous i.MX platforms. Create a new cpu folder for it, and add it to Kconfig. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* MLK-14419-3 imx: mx7d_arm2: add 19x19 LPDDR2/LPDDR3/DDR3 ARM2 supportPeng Fan2017-04-05-1/+5032
| | | | | | | | | Add 19x19 LPDDR2/LPDDR3/DDR3 ARM2 board supports. Enable the OF_CONTROL and convert them to use DM driver. Since the DTB lacks the support for some modules. We have to use QSPI and FEC with non-DM driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14419-2 imx: mx7d_arm2: add 12x12 ddr3 arm2 board supportPeng Fan2017-04-05-0/+1374
| | | | | | | | Add 12x12 ddr3 arm2 board support and convert it to use OF_CONTROL and DM drivers. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14419-1 imx: mx7d_arm2: add 12x12 lpddr3 arm2 supportPeng Fan2017-04-05-1/+3371
| | | | | | | | Add mx7d 12x12 lpddr3 arm2 support, which has enabled the OF_CONTROL and DM drivers Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14418-13 imx: mx7dsabresd: Update Misc codesYe Li2017-04-05-9/+26
| | | | | | | | 1. Add BMODE support 2. Update environment variables to align with v2016.03 3. Remove the wdog WCR bit 4 clear. Since we have implemented reset_cpu for mx7d. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14418-12 imx: mx7dsabresd: Update LCD splash screen codesYe Li2017-04-05-10/+27
| | | | | | | Update LCD setup codes to use the parameters structure used for all i.mx platforms, discard to use videmode environment variable. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14418-11 imx: mx7dsabresd: add reva/revb config filePeng Fan2017-04-05-0/+144
| | | | | | Add reva/revb config file. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14418-10 imx: mx7dsabresd: update ddr script and add plugin supportPeng Fan2017-04-05-0/+433
| | | | | | Update ddr script and add plugin support. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14418-9 imx: mx7dsabresd: add nand/qspi boot supportPeng Fan2017-04-05-27/+282
| | | | | | | | | | Add nand/qspi build configurations for their boot support. Also Add gpmi-nand and qspi specified DTS files for enable them. For QSPI, this patch changes it to use DM driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14418-8 imx: mx7dsabresd: add epdc supportPeng Fan2017-04-05-0/+398
| | | | | | | | Add epdc support from v2016.03. Add a epdc specified DTS file for using epdc Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14418-7 imx: mx7dsabresd: add FEC DM supportPeng Fan2017-04-05-51/+104
| | | | | | | | Add FEC2 and convert to use FEC DM driver. Add board rev check. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14418-6 imx: mx7dsabresd: switch to DM USBPeng Fan2017-04-05-28/+3
| | | | | | Switch to use DM USB. Enable GPIO regulator to handle vbus supply. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14418-5 imx: mx7dsabresd: reset ENET_RST_BPeng Fan2017-04-05-0/+16
| | | | | | | | Reset ENET_RST_B to make ENET function stable. Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds to ENET_RST_B. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14418-4 imx: mx7dsabresd: enable dm driversPeng Fan2017-04-05-267/+32
| | | | | | | Enable GPIO/I2C/MMC/SPI/74X164 DM drivers. Discard mxc spi support. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14418-3 imx: mx7: Enable dtb support for mx7dsabresdPeng Fan2017-04-05-2/+5
| | | | | | Enable dtb support for mx7dsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14418-2 configs: mx7dsdb: rename board config filePeng Fan2017-04-05-5/+5
| | | | | | Let kernel default runs in secure mode. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14418-1 imx: mx7: introduce dts filesPeng Fan2017-04-05-54/+3279
| | | | | | | Introduce dts files for i.MX 7D SabreSD platform. From imx_4.1.y, based on "commit b423f954fb755" Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12425-6: mx7: add epdc qos settingsPeng Fan2017-04-05-1/+32
| | | | | | | | This EPDC/EPXP QoS setting is needed for EPDC stress test to pass. Signed-off-by: Robby Cai <r63905@freescale.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 1b32518d1c27f05eb84a4cb93594710354b2e343)
* MLK-13132: mx6qarm2: mt128x64mx32: adjust ahb/axi podf dividersAdrian Alonso2017-04-05-1/+1
| | | | | | | | | Adjust ahb/axi clock root podf dividers to be divided by 1 to allow ahb/axi clock root to be 24Mhz when sourced from osc_clk. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> (cherry picked from commit 9e80234c823d6a2a0d9e10ab4c4c605bf646bd22)
* MLK-14499 mx6qarm2: Convert to use OF_CONTROL and DM driverYe Li2017-04-05-64/+1164
| | | | | | | | | Modify the mx6qarm2 configurations to enable OF_CONTROL and DM drivers: USB, Ethernet, UART and MMC. Add two DTS files for imx6q/dl arm2 board and imx6q pop arm2 board. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14391-3 mx6sxarm2: Convert to enable OF_CONTROL and DM driversYe Li2017-04-05-143/+1256
| | | | | | | | | | | | | | | Update mx6sx 14x14/17x17/19x19 lpddr2/ddr3 arm2 board codes and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Enable USB DM driver 3. Update PMIC code for using DM PMIC 4. Add spinor/qspi/nand/eimnor boot support. 5. Add defconfig for using plugin. 6. Enable Ethernet DM driver 7. Update for using QSPI DM driver Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14391-2 mx6sxarm2: Add DTS files for ARM2 boardsYe Li2017-04-05-0/+4764
| | | | | | | Copy the DTS files from kernel for 14x14/17x17/19x19 ARM2 board for preparing enabling the OF_CONTROL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14391-1 mx6sxarm2: Add mx6sx 14x14/17x17/19x19 arm2 board codesYe Li2017-04-05-0/+3341
| | | | | | | | Copy the board codes and build configurations for i.MX6SX 14x14/17x17/19x19 ARM2 boards from v2016.03 as the base for converting to OF_CONTROL and DM driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14390-3 mx6sllarm2: Convert to enable OF_CONTROL and DM driversYe Li2017-04-05-51/+254
| | | | | | | | | | | | Update mx6sll lpddr2/3 arm2 board codes and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Enable USB DM driver 3. Update PMIC code for using DM PMIC 4. Add spinor boot support, pin conflict with LCD, will disable LCD. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14390-2 mx6sllarm2: Add DTS files for ARM2 boardYe Li2017-04-05-0/+862
| | | | | | | Copy the DTS files from kernel for LPDDR2/3 ARM2 board for preparing enabling the OF_CONTROL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14390-1 mx6sllarm2: Add mx6sll LPDDR2/3 ARM2 board codesYe Li2017-04-05-0/+1605
| | | | | | | Move the mx6sll lpddr2/3 arm2 board codes and defconfigs from v2016.03 as the base for converting to use DTB OF_CONTROL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14380-3 mx6ullarm2: Convert to enable OF_CONTROL and DM driversYe Li2017-04-05-65/+531
| | | | | | | | | | | | | | | Update mx6ull ddr3 arm2 board codes and build configurations to enable OF_CONTROL and DM drivers. 1. Update QSPI settings and codes for DM QSPI driver. 2. Update GPIO codes for adding gpio request 3. Enable FEC DM driver and update relevant configurations 4. Enable USB DM driver 5. Update PMIC and LDO by-pass codes for DM PMIC 6. Add various boot media support, QSPI/NAND/SPINOR 7. Add rework support for eMMC/QSPIB/TSC Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14380-2 mx6ullarm2: Add DTS files for ARM2 boardYe Li2017-04-05-0/+1159
| | | | | | | | | Copy the DTS files from kernel for DDR3 ARM2 board for preparing enabling the OF_CONTROL. Modify the QSPI n25q256a flash node's compatible to "spi-flash" for using DM SPI driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13602-3 mx6ullevk/arm2: Enable module fuse checking for mx6ull boardsYe Li2017-04-05-0/+17
| | | | | | | | | Enable the module disable fuse checking configurations, and ENET fuse checking during ENET setup. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit d2192a3909be8ab9433082e7c04c917489b28e25)
* MLK-13602-2 epdc: Add disable fuse checkingYe Li2017-04-05-0/+20
| | | | | | | | | Add fuse checking for EPDC module. Once the fused is programmed, the EPDC module is disabled, can't to access it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit ea7429b70c1eb2cf475028ee8df2ac9ed18b3c82)
* MLK-13602-1 mx6: Add i.MX6ULL fused modules checking supportYe Li2017-04-05-1/+44
| | | | | | | | Add the modules disable fuses mapping with FDT nodes and devices name. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit d033825f034467fa9c9aeff6fcf95a146c802cf1)
* MLK-12929 imx6ull: support splash screen for epdcRobby Cai2017-04-05-1/+322
| | | | | | | | add splash screen feature for epdc. it's tested on imx6ull arm2 board. Signed-off-by: Robby Cai <robby.cai@nxp.com> (cherry picked from commit bcdbe240bb2a97d38ba30dd244a51ece87662b06)
* MLK-14380-1 mx6ullarm2: Add mx6ull DDR3 ARM2 board codesYe Li2017-04-05-0/+1243
| | | | | | | Move the mx6ull ddr3 arm2 board codes and defconfigs from v2016.03 as the base for converting to use DTB OF_CONTROL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14382-3 mx6ularm2: Convert to enable OF_CONTROL and DM driversYe Li2017-04-05-140/+735
| | | | | | | | | | | | | | Update mx6ul ddr3 arm2 and lpddr2 arm2 boards codes and build configurations to enable OF_CONTROL and DM drivers. 1. Update QSPI settings and codes for DM QSPI driver. 2. Update GPIO codes for adding gpio request 3. Enable FEC DM driver and update relevant configurations 4. Enable USB DM driver 5. Update PMIC and LDO by-pass codes for DM PMIC 6. Add various boot media support, QSPI/NAND/SPINOR/EIMNOR Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14382-2 mx6ularm2: Add DTS files for ARM2 boardsYe Li2017-04-05-1/+1606
| | | | | | | | | Copy the DTS files from kernel for DDR3 ARM2 board and LPDDR2 ARM2 board preparing for enabling OF_CONTROL. Modify the QSPI n25q256a flash node's compatible to "spi-flash" for using DM SPI driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14382-1 mx6ularm2: Add DDR3 and LPDDR2 ARM2 board codesYe Li2017-04-05-0/+2906
| | | | | | | Move the mx6ul DDR3/LPDDR2 ARM2 boards codes from v2016.03 u-boot as the base for OF_CONTROL enabling. Signed-off-by: Ye Li <ye.li@nxp.com>
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