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* kwbimage: Add support for SDIO/MMC boot device selectionStefan Roese2015-07-24-0/+1
| | | | | | | | | | | | | This patch adds support to select the "sdio" as boot device in the kwbimage.cfg file. This line selects this SDIO device: BOOT_FROM sdio Tested on Marvell DB-88F6820-GP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
* arm: mvebu: Add SPL SDIO/MMC boot supportStefan Roese2015-07-24-1/+12
| | | | | | | | | | | | This patch adds basic SDIO/MMC booting support to MVEBU SoC's. Since I don't know of a way to test the boot-device upon runtime, this patch hardcodes the spl_boot_device instead. Tested on Marvell DB-88F6820-GP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
* Merge git://git.denx.de/u-boot-uniphierTom Rini2015-07-23-45/+603
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| * ARM: UniPhier: document reference support cardMasahiro Yamada2015-07-23-2/+44
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: UniPhier: add I2C ch4 device node for PH1-sLD3Masahiro Yamada2015-07-23-0/+9
| | | | | | | | | | | | This I2C device is used SoC-internally for controlling the DMD core. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: UniPhier: add PH1-sLD3 SoC supportMasahiro Yamada2015-07-23-16/+494
| | | | | | | | | | | | | | The init code for UMC (Unified Memory Controller) and PLL has not been mainlined yet, but U-boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: UniPhier: update CONFIG_BOOTARGSMasahiro Yamada2015-07-23-1/+1
| | | | | | | | | | | | | | Both "earlyprintk" and "loglevel=8" should be useful for the development. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: UniPhier: disable CONFIG_FITMasahiro Yamada2015-07-23-6/+0
| | | | | | | | | | | | | | To use FIT boot, we have to describe Image Tree Source in addition. So, it is not intended for beginners. Disable it by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: UniPhier: add environment variable for TFTP bootMasahiro Yamada2015-07-23-0/+10
| | | | | | | | | | | | | | The command "run tftpboot" downloads some files onto the RAM via TFTP and boots the kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: UniPhier: add environment sets for non-FIT Linux bootMasahiro Yamada2015-07-23-18/+43
| | | | | | | | | | | | | | | | | | | | | | Currently, the environment variables "norboot" and "nandboot" only work with CONFIG_FIT, but we do not want to depend on CONFIG_FIT to boot the kernel. This commit adds environments useful for booting Linux with separate uImage + ramdisk + DTB. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: UniPhier: add device-specific compatible string for EEPROMMasahiro Yamada2015-07-23-1/+1
| | | | | | | | | | | | | | | | | | | | For the record, describe exactly which device of which vendor is used on this board. I2C EEPROM is bound by the generic compatible string, "i2c-eeprom", so this commit has no impact on the functionality. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2015-07-23-10/+22783
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| * | arm: mvebu: db-88f6820: Add SPL support with DDR init codeStefan Roese2015-07-23-1/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPL support for the Marvell DB-88F6820-GP board. With this change, the bin_hdr from the original Marvell U-boot is not needed any more on this board. The sources from bin_hdr (SERDES/PHY and DDR setup) are now integrated in mainline U-Boot. And this patch enables them for this board. Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: a38x: Use correct PEX register access macrosStefan Roese2015-07-23-5/+4
| | | | | | | | | | | | | | | | | | | | | Remove the incorrect PEX macros from the DDR header. And insert the correct ones in ctrl_pex.h instead. Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdrStefan Roese2015-07-23-0/+17369
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DDR3 setup and training code taken from the Marvell U-Boot repository. This code used to be included as a binary (bin_hdr) into the Armada A38x boot image. Not linked with the main U-Boot. With this code addition and the serdes/PHY setup code, the Armada A38x support in mainline U-Boot is finally self-contained. So the complete image for booting can be built from mainline U-Boot. Without any additional external inclusion. Note: This code has undergone many hours (days!) of coding-style cleanup and refactoring. It still is not checkpatch clean though, I'm afraid. As the factoring of the code has so many levels of indentation that many lines are longer than 80 chars. Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directoryStefan Roese2015-07-23-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the upcoming addition of the Armada 38x DDR support, which is not compatible to the Armada XP DDR init code, we need to introduce a new directory infrastructure. To support multiple Marvell DDR controller. This will be the new structure: drivers/ddr/marvell/axp Supporting Armada XP (AXP) devices (and perhaps Armada 370) drivers/ddr/marvell/a38x Supporting Armada 38x devices (and perhaps Armada 39x) Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Add Armada 38x SERDES / PHY init code from Marvell bin_hdrStefan Roese2015-07-23-0/+5204
| | | | | | | | | | | | | | | | | | | | | | | | This code is ported from the Marvell bin_hdr code into mainline SPL U-Boot. It needs to be executed very early so that the devices connected to the serdes PHY are configured correctly. Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: serdes: Move Armada XP SERDES / PHY init code into new directoryStefan Roese2015-07-23-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | With the upcoming addition of the Armada 38x SPL support, which is not compatible to the Armada XP SERDES init code, we need to introduce a new directory infrastructure. So lets move the AXP serdes init code into a new directory. This way the A38x code can be added in a clean way. Signed-off-by: Stefan Roese <sr@denx.de>
| * | Makefile: Fix mvebu build target to use SPL load and exe-addressStefan Roese2015-07-23-1/+1
| | | | | | | | | | | | | | | | | | | | | The u-boot-spl.kwb build target needs the SPL text-base (CONFIG_SPL_TEXT_BASE) as load and execution address. Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Disable MMU before changing register base addressStefan Roese2015-07-23-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | Only with disabled MMU its possible to switch the base register address on Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also not accessible, as its still locked to cache. Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: spl.c: Add call to board_early_init_f()Stefan Roese2015-07-23-0/+7
| | | | | | | | | | | | | | | | | | | | | Pin muxing needs to be done before UART output, since on A38x the UART pins need some re-muxing for output to work. Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Use default reg base address for SPL on A38xStefan Roese2015-07-23-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | On A38x switching the regs base address without running from SDRAM doesn't seem to work. So let the SPL still use the default base address and switch to the new address in the mail u-boot later. Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Call timer_init early before PHY and DDR initStefan Roese2015-07-23-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without calling timer_init(), the xdelay() functions return immediately. We need to call timer_init() early, so that these functions work and the PHY and DDR init code works correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anton Schubert <anton.schubert@gmx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: mvebu: add Armada XP SATA supportAnton Schubert2015-07-23-0/+71
| |/ | | | | | | | | | | | | | | | | | | This patch initializes the SATA address windows on Armada XP and allows it to work with the existing mvsata_ide driver. It also adds the necessary configuration for the db-mv784mp-gp board. Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Tested-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | linux_compat: handle __GFP_ZERO in kmalloc()Masahiro Yamada2015-07-22-15/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, kzalloc() returns zero-filled memory, while kmalloc() simply ignores the second argument and never fills the memory area with zeros. I want kmalloc(size, __GFP_ZERO) to behave as kzalloc() does, which will make it easier to add more memory allocator variants. With the introduction of __GFP_ZERO flag, going forward, kzmalloc() variants can fall back to kmalloc() enabling the __GFP_ZERO flag. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | linux_compat: move vzalloc() to header file as an inline functionMasahiro Yamada2015-07-22-7/+4
| | | | | | | | | | | | | | | | | | | | The vzalloc(size) is equivalent to kzalloc(size, 0). Move it to include/linux/compat.h as an inline function in order to avoid the function call overhead. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Simon Glass <sjg@chromium.org>
* | linux_compat: remove cpu_relax() defineMasahiro Yamada2015-07-22-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The macro cpu_relax() is defined by several headers in different ways. arch/{arm,avr32,mips}/include/asm/processor.h defines it as follows: #define cpu_relax() barrier() On the other hand, include/linux/compat.h defines it as follows: #define cpu_relax() do {} while (0) If both headers are included from the same source file, the warning warning: "cpu_relax" redefined [enabled by default] is displayed. It effectively makes it impossible to include <linux/compat.h> from some sources. Drop the latter. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | x86: delete unneeded declarations of disable_irq() and enable_irq()Masahiro Yamada2015-07-22-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | These two declarations in arch/x86/include/asm/interrupt.h conflict with ones in include/linux/compat.h, so x86 boards cannot include <linux/compat.h>. The comment /* arch/x86/lib/interrupts.c */ is bogus now, and we do not see any definitions of disable_irq() and enable_irq() in there. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | net: Allow drivers to return -ENOSYS with the write_hwaddr() methodSimon Glass2015-07-21-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | Some drivers may want to implement this method for some of their devices but not for others. So it is not possible to just leave the operation out of the table. Drivers could get around this by masquerading as two separate drivers but that seems unpleasant. Allow the driver to return an error when it does not want to process the write_hwaddr() method. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: usb: eth: Add driver-model support to the asix driverSimon Glass2015-07-21-21/+216
| | | | | | | | | | | | | | | | This USB Ethernet driver is quite widely use. Allow it to work with CONFIG_DM_ETH enabled. Most of the code remains common but there is a new packet receive flow which is handled specially. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: usb: Add driver-model support to ehci-pciSimon Glass2015-07-21-20/+77
| | | | | | | | | | | | | | | | | | Support driver model in this driver. This uses the normal USB driver search mechanism. Any EHCI controllers will be set up as they are found during usb_init(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | x86: minnowmax: Drop the cache line size hackSimon Glass2015-07-21-3/+0
| | | | | | | | | | | | | | | | Now that the RTL8169 driver warning is fixed we can drop this. The incorrect value is causing problems with USB EHCI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: usb: Adjust the USB_DEVICE() macro namingSimon Glass2015-07-21-9/+25
| | | | | | | | | | | | | | | | | | In Linux USB_DEVICE() is used to declare a USB device by vendor/device ID. We should follow the same convention in U-Boot. Rename the existing USB_DEVICE() macro to U_BOOT_USB_DEVICE() and bring in the USB_DEVICE() macro from Linux for use in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: usb: eth: Support driver model with USB EthernetSimon Glass2015-07-21-12/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | At present USB Ethernet does not work with CONFIG_DM_ETH. Add driver model support to this feature, so that it can work alongside other Ethernet devices with driver model. It was found that quite a bit of code is common in most of the USB Ethernet drivers. Add this code to the common layer to reduce the amount of duplicate code needed in USB Ethernet drivers when CONFIG_DM_ETH is used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: eth: Avoid blocking on packet receptionSimon Glass2015-07-21-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices can take a long time to work out whether they have a new packet or now. For example the ASIX USB Ethernet dongle can take 5 seconds to do this, since it waits until it gets a new packet on the wire before allowing the USB bulk read packet to be submitted. At present with driver mode the Ethernet receive code reads 32 packets. This can take a very long time if we must wait for all 32 packets. The old code (before driver model) worked by reading a single set of packets from the USB device, then processing all the packets with in. It would be nice to use the same behaviour with driver model. Add a flag to the receive method which indicates that the driver should try to find a packet if available, by consulting the hardware. When the flag is not set, it should just return any packet data it has already received. If there is none, it should return -EAGAIN so that the loop will terminate. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: usb: Avoid using USB ethernet with CONFIG_DM_USB and no DM_ETHSimon Glass2015-07-21-2/+5
| | | | | | | | | | | | | | | | | | If driver model is used for Ethernet then USB Ethernet does not build. This can be made to work with driver model is used for USB also. Add #ifdef logic to make this clear when building. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: usb: Correct the struct usb_driver_entry commentSimon Glass2015-07-21-2/+2
| | | | | | | | | | | | | | The function documentation is incorrect. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* | dm: pci: Add a function to get the BDF for a deviceSimon Glass2015-07-21-12/+19
| | | | | | | | | | | | | | | | | | It is useful to be able to find the full PCI address (bus, device and function) for a PCI device. Add a function to provide this. Adjust the existing code to use this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: eth: Add driver-model support to the rtl8169 driverSimon Glass2015-07-21-49/+187
| | | | | | | | | | | | | | This driver is used by the Intel Minnowmax board. Convert it to driver model so it can use the new Ethernet implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: pci: Add support for PCI driver matchingSimon Glass2015-07-21-19/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present all PCI devices must be present in the device tree in order to be used. Many or most PCI devices don't require any configuration other than that which is done automatically by U-Boot. It is inefficent to add a node with nothing but a compatible string in order to get a device working. Add a mechanism whereby PCI drivers can be declared along with the device parameters they support (vendor/device/class). When no suitable driver is found in the device tree the list of such devices is consulted to determine the correct driver. If this also fails, then a generic driver is used as before. The mechanism used is very similar to that provided by Linux and the header file defintions are copied from Linux 4.1. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* | usb: Update some EHCI driver licenses to use SPDXSimon Glass2015-07-21-68/+5
| | | | | | | | | | | | | | A few drivers still write out the license in full. Fix these. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* | usb: ehci: Correct a missing hypen in an error messageSimon Glass2015-07-21-1/+1
| | | | | | | | | | | | Add a hyphen to correct the grammar. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: core: Add \n to two dm_warn() messagesSimon Glass2015-07-21-2/+2
| | | | | | | | | | | | These should finish with a newline like the others. Signed-off-by: Simon Glass <sjg@chromium.org>
* | musb: Add device-model support to the musb-host u-boot glueHans de Goede2015-07-21-1/+73
| | | | | | | | | | | | | | | | | | Add device-model support to the musb-host u-boot glue, note this only adds device-model support to the musb-core glue code, it does not add support for device-model to any of the SoC specific musb glue code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* | musb: Add musb_host_data struct to hold global dataHans de Goede2015-07-21-54/+77
| | | | | | | | | | | | | | | | Add a musb_host_data struct to hold all the global data host related musb data. This is a preparation patch for adding device-model support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* | musb: Rename and wrap public functionsHans de Goede2015-07-21-11/+59
| | | | | | | | | | | | | | | | Rename and wrap the usb host API public functions, this is a preparation patch for adding device-model support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* | musb: Update usb-compat to work with struct usb_device without a parent ptrHans de Goede2015-07-21-1/+75
| | | | | | | | | | | | | | | | When building with CONFIG_DM_USB=y struct usb_device does not have a parent pointer. This commit adds support to the musb code to deal with this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* | musb: Allow musb_platform_enable to return an error codeHans de Goede2015-07-21-3/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow musb_platform_enable to return an error code and propagate it up to usb_lowlevel_init(). This allows moving the checks for an external vbus being present to be moved from platform_init to platform_enable, so that the user can unplug a charger, plug in a host adapter with a usb-device, do a "usb reset" and have things working. This also allows adding a check for the id-pin to platform_enable, so that it can short circuit the 1s delay in usb_lowlevel_init() when no host cable is plugged in and thus waiting for a device to show up is useless. Note that all the changes to code shared with the kernel are wrapped in the kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: usb: Do not assume that first child is always a hubHans de Goede2015-07-21-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | On some single port (otg) controllers there is no emulated root hub, so the first child (if any) may be one of: UCLASS_MASS_STORAGE, UCLASS_USB_DEV_GENERIC or UCLASS_USB_HUB. All three of these (and in the future others) are suitable for our purposes, remove the check for the device being a hub, and add a check to deal with the fact that there may be no child-dev. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: usb: Allow usb host drivers to implement usb_reset_root_portHans de Goede2015-07-21-5/+16
| | | | | | | | | | | | | | | | | | Allow usb uclass host drivers to implement usb_reset_root_port, this is used by single port usb hosts which do not emulate a hub, such as otg controllers. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-09 10:21:48 +0000