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* nand_spl_simple: add support for software ECCIlya Yanok2011-12-06-2/+11
| | | | | | | | | | This patch adds support for software ECC to the nand_spl_simple driver. To enable this one have to define CONFIG_SPL_NAND_SOFTECC. Tested on OMAP3. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Scott Wood <scottwood@freescale.com>
* AM3517: move AM3517 specific mux defines to generic headerIlya Yanok2011-12-06-79/+41
| | | | | | | AM3517 specific CONTROL_PADCONF_* defines moved from board-specific files to <asm/arch-omap3/mux.h> Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* AM35xx: add EMAC supportIlya Yanok2011-12-06-0/+104
| | | | | | AM35xx has DaVinci-compatible EMAC. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: hardcode 100Mbps for AM35xx and RMIIIlya Yanok2011-12-06-1/+2
| | | | | | | For some reason code setting the speed based on the PHY feedback causes troubles on AM3517 so hardcode 100Mbps for now. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: fix for running with dcache enabledIlya Yanok2011-12-06-4/+42
| | | | | | | | | | | | DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache enabled by default. So we have to take care and flush/invalidate the cache before/after the DMA operations. Please note that the receive buffer alignment to 32 byte boundary comes from the old driver version I don't know if it is really needed or alignment to cache line size is enough. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* arm926ejs: add noop implementation for dcache opsIlya Yanok2011-12-06-1/+76
| | | | | | | | Added noop implementation for dcache operations that will buzz about missing real implementation and disable the dcache. This fixes compilation of DaVinci EMAC driver on arm926ejs. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: conditionally compile specific PHY supportIlya Yanok2011-12-06-0/+8
| | | | Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: use internal addresses in buffer descriptorsIlya Yanok2011-12-06-9/+30
| | | | | | | | On AM35xx CPPI RAM had different addresses when accessed from the CPU and from the EMAC. We need to account this to deal with the buffer descriptors correctly. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: move arch-independent defines to separate headerIlya Yanok2011-12-06-289/+319
| | | | | | | | | | | DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs also. This patch moves common defines from arch-davinci/emac_defs.h to drivers/net/davinci_emac.h DaVinci specific PHY drivers hacked to include the new header. We might want to switch to phylib in future. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* BeagleBoard: config: Really switch to ttyO2Koen Kooi2011-12-06-1/+1
| | | | | | | The previous commit changed it to "zero two" instead of the proper "Oh two". This was completely broken! Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Acked-by: Tom Rini <trini@ti.com>
* ARM: davinci_dm6467Tevm: Fix build breakageAnatolij Gustschin2011-12-06-0/+1
| | | | | | | | | | | | | | | Fix: arch/arm/cpu/arm926ejs/davinci/libdavinci.o: In function `timer_init': /work/agust/git/u-boot/arch/arm/cpu/arm926ejs/davinci/timer.c:62: undefined reference to `davinci_arm_clk_get' drivers/i2c/libi2c.o: In function `i2c_init': /work/agust/git/u-boot/drivers/i2c/davinci_i2c.c:102: undefined reference to `davinci_arm_clk_get' Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: OMAP: Remove STACKSIZE for IRQ and FIQ if unusedThomas Weber2011-12-06-53/+0
| | | | | | | | | | | This patch removes the definition of stack sizes for irq and fiq if the CONFIG_USE_IRQ is undefined before. Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Thomas Weber <weber@corscience.de> Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
* ARM: OMAP3: Remove unused define SDRC_R_C_BThomas Weber2011-12-06-45/+0
| | | | | | | | | | | This patch removes the unused definition of SDRC_R_C_B from the config files. Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Thomas Weber <weber@corscience.de> Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it> Acked-by: Tom Rini <trini@ti.com>
* ARM: OMAP3: Remove unused define CONFIG_OMAP3430Thomas Weber2011-12-06-13/+0
| | | | | | | | | | This patch removes the CONFIG_OMAP3430, because it is unused. Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Thomas Weber <weber@corscience.de> Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
* omap4: fix IO settingAneesh V2011-12-06-1/+6
| | | | | | | | | | | | The value from TRIM is not working for some 4430 silicons. So, override with hw team recommended value. However, for 4460 TRIM value shall be used as long as the part is trimmed This fixes boot problem on some OMAP4430 ES2.0 Panda boards out there. Cc: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addressesAneesh V2011-12-06-15/+21
| | | | | | | | | | | | | | | | | | | | | | | | Change the CONFIG_SYS_TEXT_BASE and the addresses of SDRAM buffers used by SPL(heap and BSS) keeping in mind the following requirements: 1. Make sure that SPL's heap and BSS doesn't come in the way of Linux kernel, which is typically loaded at 0x80008000. This will be important when SPL directly loads kernel. 2. Align the CONFIG_SYS_TEXT_BASE between TI internal U-Boot and mainline U-Boot. This avoids a lot of confusion and allows for the inter-operability of x-loader, SPL, internal U-Boot, mainline U-Boot etc. The internal U-Boot's address can not be changed to that of mainline U-Boot as internal U-Boot doesn't have relocation and 0x80100000 used by mainline U-Boot will clash with kernel 3. Assume only a minimum amount of memory that may be available on any practical OMAP4/5 board in future too. We are assuming a minimum of 128 MB of memory Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4460: add ES1.1 identificationAneesh V2011-12-06-1/+12
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4: emif: fix error in driverAneesh V2011-12-06-2/+2
| | | | | | | | | | There was a typo in the EMIF driver. It went un-noticed because it affected only when automatic detection is enabled and even then half the memory was configured and identified properly. Reported-by: Rockefeller <rockefeller.lin@innocomm.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: remove I2C from SPLAneesh V2011-12-06-1/+0
| | | | | | | Due to some recent changes I2C is no longer required in SPL. Remove the i2c_init() call to save some space Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4460: fix TPS initializationAneesh V2011-12-06-10/+13
| | | | | | | | | | | TPS power IC is controlled using a GPIO (gpio_wk7). This GPIO should be maintained at logic 1 always. As such an internal pull-up on this pin will do the job, driving the GPIO outuput is not needed. This will avoid the need of using GPIO library in SPL and also may save some power. Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: fix cache line size for omap3/omap4 boardsAneesh V2011-12-06-0/+17
| | | | | | Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* omap4: ttyO2 instead of ttyS2 in default bootargsAneesh V2011-12-06-1/+1
| | | | | | | Set console=ttyO2 instead of ttyS2 in default bootargs according to latest kernel config Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: Improve PLL parameter calculation toolAneesh V2011-12-06-91/+96
| | | | | | | | | | Improve the tool that finds multiplier and divider for PLLs: The previous algorithm could get stuck on local maxima and required the user to specify the tolerance. Improve the algorithm to go through the entire search space and find the optimal solution. Signed-off-by: Aneesh V <aneesh@ti.com>
* start.S: remove omap3 specific code from start.SAneesh V2011-12-06-23/+9
| | | | | | | Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com> Acked-by: Tom Rini <trini@ti.com>
* armv7: setup vectorAneesh V2011-12-06-0/+17
| | | | | | | | The vector is not correctly setup in armv7 except for OMAP3. Correcting this. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: include armv7/cpu.c in SPL buildAneesh V2011-12-06-2/+2
| | | | | | | | | This allows SPL to have default implementation of save_boot_params(), useful for SoCs that do not intend to override this default implementation Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: disable L2 cache in cleanup_before_linux()Aneesh V2011-12-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | We were not disabling external caches before jumping to kernel. We were flushing all caches including external caches and disabling caches globally in CP15 System Control register. Apparently this is not enough. The bootstrap loader in Linux kernel that does decompression enables data-caches again, flush them after use and disable them before jumping to kernel proper. However, it's not aware of the external caches. Since we have left external cache enabled, external cache will get used once caches are enabled globally, but it's not flushed because decompressor is not aware of external caches. When it jumps to kernel with caches disabled globally, we have stale data in the external cache and a coherency problem. This was breaking the boot for OMAP4 with latest mainline kernel. The solution is to disable external caches in cleanup_before_linux(). With this fix kernel is booting again. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* arm, arm926ejs: Fix clear bss loop for zero length bssChristian Riesch2011-12-06-3/+5
| | | | | | | | This patch fixes the clear bss loop for bss sections that have zero length, i.e., where __bss_start == __bss_end__. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* PXA: Move colibri_pxa270 to board/toradex/Marek Vasut2011-12-06-1/+1
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Flip colibri_pxa27x to pxa-common.hMarek Vasut2011-12-06-35/+1
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Introduce common configuration header for PXAMarek Vasut2011-12-06-0/+60
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Rename pxa_dram_init to pxa2xx_dram_initMarek Vasut2011-12-06-14/+14
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Squash extern pxa_dram_init()Marek Vasut2011-12-06-12/+11
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Export cpu_is_ and pxa_dram_init functionsMarek Vasut2011-12-06-0/+29
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Cleanup Colibri PXA270Marek Vasut2011-12-06-54/+51
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Replace timer driverMarek Vasut2011-12-06-52/+35
| | | | | | This new timer driver shall conform to new Timer API. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Add cpuinfo display for PXA2xxMarek Vasut2011-12-06-0/+134
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Separate PXA2xx CPU initMarek Vasut2011-12-06-73/+31
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]XMarek Vasut2011-12-06-76/+80
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Unify vpac270 environment sizeMarek Vasut2011-12-06-12/+2
| | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* PXA: Enable command line editing for vpac270Marek Vasut2011-12-06-0/+2
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Adapt Voipac PXA270 to OneNAND SPLMarek Vasut2011-12-06-5/+184
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> V2: Add missing u-boot-spl.lds, convert bitshifts to division, convert to spl_onenand_load_image()
* PXA: Drop Voipac PXA270 OneNAND IPLMarek Vasut2011-12-06-173/+0
| | | | | | | This OneNAND IPL will be replaced by OneNAND SPL. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* PXA: Fixup PXA25x boards after start.S updateMarek Vasut2011-12-06-4/+4
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Re-add the Dcache locking as RAM for pxa250Marek Vasut2011-12-06-2/+116
| | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* PXA: Rework start.S to be closer to other ARMsMarek Vasut2011-12-06-247/+153
| | | | | | | | | | The start.S on PXA was very obscure. This reworks it back to be close to arm1136 start.S and others. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> V2: Don't compile in relocation support if building SPL
* PXA: Drop XM250 boardMarek Vasut2011-12-06-1043/+1
| | | | | | | | The board is unmaintained and maintainer doesn't respond. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de>
* PXA: Drop PLEB2 boardMarek Vasut2011-12-06-1196/+1
| | | | | | | | The board is unmaintained and maintainer doesn't respond. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de>
* PXA: Drop CRADLE boardMarek Vasut2011-12-06-1000/+1
| | | | | | | | The board is unmaintained and maintainer doesn't respond. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de>
* PXA: Drop CERF250 boardMarek Vasut2011-12-06-791/+1
| | | | | | | | The board is unmaintained and maintainer doesn't respond. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de>
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