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| * | | ARM: dts: uniphier: sync clock/reset controller nodes with LinuxMasahiro Yamada2016-09-23-181/+301
| | | | | | | | | | | | | | | | | | | | | | | | Sync device trees with Linux for easier DT life. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | clk: uniphier: allow to have clock node under syscon nodeMasahiro Yamada2016-09-23-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To sync the DT binding with Linux, the register base must be taken from the parent syscon node. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | clk: uniphier: move U_BOOT_DRIVER entry to core codeMasahiro Yamada2016-09-23-75/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move U_BOOT_DRIVER() entry from the data file (clk-uniphier-mio.c) to the core support file (clk-uniphier-core.c) because I do not want to repeat the driver boilerplate when I add more clock data. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | clk: uniphier: constify clock data arrays/structuresMasahiro Yamada2016-09-23-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Clarify these clock data are constant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: add PLL init code for LD11 SoCMasahiro Yamada2016-09-23-7/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set the Cortex-A53 clock to the maximum frequency since it is running at 500MHz (SPLL/4) on startup Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: move CONFIG_SPL_* to defconfig or selectMasahiro Yamada2016-09-23-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As I repeated in the ML, I am unhappy with config entries with bare defaults. Kick them out of arch/arm/mach-uniphier/Kconfig. Currently, CONFIG_SPL_SERIAL_SUPPORT is not user-configurable (build fails without it), but it should be fixed later anyway, so I am moving CONFIG_SPL_SERIAL_SUPPORT to defconfigs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2016-09-22-208/+188
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| * | | | configs: fsl: Move SPI/SPI-FLASH configs to defconfigJagan Teki2016-09-22-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moved FSL_QSPI/SPI/SPI-FLASH configs from include/configs into respective used defconfigs. - CONFIG_FSL_QSPI - CONFIG_SPI_FLASH - CONFIG_SPI_FLASH_BAR - CONFIG_SPI_FLASH_STMICRO Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: Kconfig: Move FSL_QSPI entry to non-dm placeJagan Teki2016-09-22-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since FSL_QSPI driver still supporting non-dm code better to move the Kconfig from DM undefined place. Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Move flags macro's to spi_flash_params{} membersJagan Teki2016-09-22-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves flags macro's to respective member position on spi_flash_params{}, for better readabilty and finding the respective member macro's easily. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flashJagan Teki2016-09-22-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Remove SECT_32KJagan Teki2016-09-22-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SECT_32K never used anywhere in the code. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: Remove SPI_RX_FASTJagan Teki2016-09-22-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed SPI_RX_FAST since default read for spi slaves are always 1-wire fast read. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: Use mode for rx mode flagsJagan Teki2016-09-22-28/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make rx mode flags as generic to spi, earlier mode_rx is maintained separately because of some flash specific code. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Remove e_rd_cmd from param tableJagan Teki2016-09-22-117/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | e_rd_cmd is maintained separately for fastest read command code, since the read commands are computed normally this e_rd_cmd is not required in spi_flash_params table. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | sf: Simplify fastest read cmd codeJagan Teki2016-09-22-18/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fastest read command code look for fastest read command taking inputs from spi->mode_rx and flags from param table and controller mode_rx is always been a priority. Since mode_rx is always set from controller side this optimized code doesn't require much and this code required exctra overhead like 1) Maintain e_rx_cmd in param table 2) Maintain mode_rx in spi_slave {} Hence removed this code, and look for read command from normal spi->mode from spi_slave{} and params->flags Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: ti_qspi: Remove unnecessary udelay for AM437xVignesh R2016-09-22-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This udelay() was added as an HACK and is no longer required. All read/write/erase operations work fine even without this delay. Hence, remove the udelay() call. Tested read/write/erase operation on AM437x SK. Also tested QSPI Boot. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: ti_qspi: use 128 bit transfer mode when writing to flashVignesh R2016-09-22-6/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TI QSPI has four 32 bit data registers which can be used to transfer 16 bytes of data at once. The register group QSPI_SPI_DATA_REG_3, QSPI_SPI_DATA_REG_2, QSPI_SPI_DATA_REG_1 and QSPI_SPI_DATA_REG is treated as a single 128-bit word for shifting data in and out. The bit at QSPI_SPI_DATA_REG_3[31] position is the first bit to be shifted out in case of 128 bit transfer mode. Therefore the first byte to be written to flash should be at QSPI_SPI_DATA_REG_3[31-25] position. Instead of writing 1 byte at a time when interacting with SPI NOR flash, make use of all the four registers so that 16 bytes can be transferred in one go. With this patch, the flash write speed increases from ~250KBs/ to ~650KB/s on DRA74 EVM. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | | | spi: zynq_spi: Fix infinite looping while xferLad, Prabhakar2016-09-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During spi transfer, for example: sspi 1:1.0 8 ff the rx_len values will be: rx_len = 0 rx_len = 4294967295 This caused a busy looping during xfer, this patch fixes it by adding a check while reading the rx fifo Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-09-22-31/+563
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| * | | | | zynqmp: Remove unnnecessary board config file for dc4Siva Durga Prasad Paladugu2016-09-22-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unnecessary board specific config file for DC4 board. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Acked-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Use the same name for atf image everywhereMichal Simek2016-09-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use atf-uboot.ub image instead of atf.ub. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Enable CONFIG_AHCI via KconfigMichal Simek2016-09-22-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_AHCI to defconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Add support for chip ID detectionMichal Simek2016-09-22-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chip ID needs to be known for loading bitstream because U-Boot checks ID from bitstream header in BIT format. BIN format is completely unchecked. The chipid is get from ATF via SMC. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMPSiva Durga Prasad Paladugu2016-09-22-0/+301
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Fix USB ulpi phy sequenceMichal Simek2016-09-22-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It should be enough to call low(5us)->high pulse for all cases to provide proper reset. There is no need to call high->low->high. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Add support for USB ulpi phy reset via mode pinsMichal Simek2016-09-22-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mode pins can be used as output for reset. Xilinx boards are using this feature as additional way how to reset USB phys and also others chips on the boards. Mode1 is used on all these boards for this feature. Let SPL toggle reset on this pin by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Add support for DFU from SPLMichal Simek2016-09-22-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL needs to have bigger stack size because of USB. Simple malloc needs to be disabled because dfu code requires different allocation functions. There is no space in OCM that's why random place in DDR is used. BOOTD must be disabled because it is causing compilation error. All variables are disabled and used only variables valid for DFU because they are simple huge. Including automatic variables added by CONFIG_ENV_VARS_UBOOT_CONFIG. Hardcode addresses for u-boot, atf, kernel and dtb just for SPL DFU code. Enable SPL DFU for zcu100. Create new usb_dfu_spl variable just to run Linux kernel loaded in SPL. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM: Add new BOOT_DEVICE_DFU boot modeMichal Simek2016-09-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enum is needed when SPL_DFU is enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Add USB boot modeMichal Simek2016-09-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add USB boot mode. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Move BSS location to the beginning of ramMichal Simek2016-09-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With SPL_DFU support memory layout needs to be cleanup that's why move bss to the start of memory. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | spi: zynq: Use variable to remove u32 to u64 conversionsMichal Simek2016-09-22-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code generates warning when it is compiled for arm64: Warnings: In file included from drivers/spi/zynq_spi.c:14:0: drivers/spi/zynq_spi.c: In function ‘zynq_spi_init_hw’: drivers/spi/zynq_spi.c:95:9: warning: large integer implicitly truncated to unsigned type [-Woverflow] writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ drivers/spi/zynq_spi.c: In function ‘zynq_spi_release_bus’: drivers/spi/zynq_spi.c:177:9: warning: large integer implicitly truncated to unsigned type [-Woverflow] writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ This patch is using one variable to do conversion via u32 variable. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | | | | ARM64: zynqmp: Fix usb_gadget_handle_interrupt routineMichal Simek2016-09-22-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function is defined in g_dnl.h and have different parameter then it is used. This patch fixes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Force certain bootmode for SPLMichal Simek2016-09-22-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZynqMP provides an option to overwrite bootmode setting which can change SPL behavior. For example: boot SPL via JTAG and then SPL loads images from SD. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | ARM64: zynqmp: Wire up both USBs available on ZynqMPMichal Simek2016-09-22-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The second USB wasn't enabled. This patch fixes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | fpga: Add Kconfig to fpga subsystemMichal Simek2016-09-22-0/+5
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing Kconfig to fpga subsystem to be able to add new options. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | Makefile: rm u-boot.cfg dependencies are missingStephen Warren2016-09-22-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to the previous patch, a freshly created .u-boot.cfg.cmd may not correctly represent all dependencies for u-boot.cfg. The previous change only solved this issue for fresh builds; when performing an incremental build, the deficient .u-boot.cfg.cmd is already present, so u-boot.cfg is not rebuilt, and hence .u-boot.cfg.cmd is not rebuilt with the correct content. Solve this by explicitly detecting when the dependency file .u-boot.cfg.d has not been integrated into .u-boot.cfg.cmd, and force u-boot.cfg to be rebuilt in this case by deleting it first. This is possible since if_changed_dep will always delete .u-boot.cfg.d when it executes successfully, so its presence means either that the previous build was made by a source tree that contained a Makefile that didn't include the previous patch, or that the build failed part way through executing if_changed_dep for u-boot.cfg. Forcing a rebuild of u-boot.cfg is required in the former case, and will cause no additional work in the latter case, since the file would be rebuilt anyway for the same reason it was being rebuilt by the previous build. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | Makefile: use if_change_dep for u-boot.cfgStephen Warren2016-09-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cmd_cpp_cfg generates a dependency output, but because it's invoked using if_changed rather than if_changed_dep, that dependency file is ignored. This results in Kbuild not knowing about which files u-boot.cfg depends on, so it may not be rebuilt when required. A practical result of this is that u-boot.cfg may continue to reference CONFIG_ options that no longer exist in the source tree, and this can cause the adhoc config options check to fail. This change modifies Makefile to use if_changed_dep, which in turn causes all dependencies to be known to the next make invocation. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | test/py/tests/test_vboot.py: Add check that we boot the imageTom Rini2016-09-22-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure that when we're telling bootm to boot an image, and we expect the image to boot we get the output from sandbox that we attempted to run Linux and that U-Boot completed its job. Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
* | | | | image-fit: Fix fit_get_node_from_config semanticsPaul Burton2016-09-22-3/+3
| |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit bac17b78dace ("image-fit: switch ENOLINK to ENOENT") changed fit_get_node_from_config to return -ENOENT when a property doesn't exist, but didn't change any of its callers which check return values. Notably it didn't change boot_get_ramdisk, which leads to U-Boot failing to boot FIT images which don't include ramdisks with the following message: Ramdisk image is corrupt or invalid It also didn't take into account that by returning -ENOENT to denote the lack of a property we lost the ability to determine from the return value of fit_get_node_from_config whether it was the property or the configuration node that was missing, which may potentially lead callers to accept invalid FIT images. Fix this by having fit_get_node_from_config return -EINVAL when the configuration node isn't found and -ENOENT when the property isn't found, which seems to make semantic sense. Callers that previously checked for -ENOLINK are adjusted to check for -ENOENT, which fixes the breakage introduced by commit bac17b78dace ("image-fit: switch ENOLINK to ENOENT"). The only other user of the return fit_get_node_from_config return value, indirectly, is bootm_find_os which already checked for -ENOENT. From a read-through of the code I suspect it ought to have been checking for -ENOLINK prior to bac17b78dace ("image-fit: switch ENOLINK to ENOENT") anyway, which would make it right after this patch, but this would be good to get verified by someone who knows this x86 code or is able to test it. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jonathan Gray <jsg@jsg.id.au> Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefan Roese <sr@denx.de> Acked-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com>
* | | | omap4_panda: Disable ext2/3/4 support in SPLTom Rini2016-09-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pandaboard is growing again, disable EXT2/3/4 support in SPL save more space. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | clk.h: Add <asm/errno.h>Tom Rini2016-09-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we return -ENOSYS in some cases we must have <asm/errno.> available. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-09-21-180/+2115
|\ \ \ \
| * | | | MIPS: Hang if run on a secondary CPUPaul Burton2016-09-21-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some systems are configured such that multiple CPUs begin running from their reset vector following a system reset. If this occurs then U-Boot will be run on multiple CPUs simultaneously, which causes all sorts of issues as the multiple instances of U-Boot clobber each other. Prevent this from happening by simply hanging with an infinite loop if we run on a CPU whose ID, as determined by GlobalNumber or EBase.CPUNum as appropriate, is non-zero. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | MIPS: Fix cache maintenance in relocate_code & simplifyPaul Burton2016-09-21-26/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The relocate_code function was handling cache maintenance incorrectly. It copied U-Boot to its new location, flushed the caches & then proceeded to apply relocations & jump to the new code without flushing the caches again. This is problematic as the instruction cache could potentially have already fetched instructions that hadn't had relocs applied. Rework this to perform the flush_cache call using the code in the original copy of U-Boot, after having applied relocations to the new copy of U-Boot. The new U-Boot can then be jumped to safely once that cache flush has been performed. As part of this, since the old U-Boot is used up until after that cache flush, complexity around loading values from the GOT using a jump & link instruction & loads from a table is removed. Instead we can simply load the needed values with PTR_LA fromt the original GOT. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | boston: Introduce support for the MIPS Boston development boardPaul Burton2016-09-21-0/+740
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces support for building U-Boot to run on the MIPS Boston development board. This is a board built around an FPGA & an Intel EG20T Platform Controller Hub, used largely as part of the development of new CPUs and their software support. It is essentially the successor to the older MIPS Malta board. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | clk: boston: Providea simple driver for Boston board clocksPaul Burton2016-09-21-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple driver for the clocks provided by the MIPS Boston development board. The system provides information about 2 clocks whose rates are fixed by the bitfile flashed in the boards FPGA, and this driver simply reads the rates of these 2 clocks. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | dm: syscon: Provide a generic syscon driverPaul Burton2016-09-21-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a trivial syscon driver matching the generic "syscon" compatible string, allowing for simple system controllers to be used without a custom driver just as in Linux. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | dm: core: Match compatible strings in order of priorityPaul Burton2016-09-21-37/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device model drivers have previously been matched to FDT nodes by virtue of being the first driver in the driver list to be compatible with the node. This ignores the fact that compatible strings in the device tree are listed in order of priority - that is, if we have a node with 2 compatible strings & a driver that matches each then we should always probe the driver that matches the first compatible string. Fix this by looping through the compatible strings for a node when attempting to bind it in lists_bind_fdt and checking each driver for a match of the first string, then each driver for a match of the second string etc. Effectively this inverts the loops over compatible strings & drivers. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * | | | dm: regmap: Implement simple regmap_read & regmap_writePaul Burton2016-09-21-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The regmap_read & regmap_write functions were previously declared in regmap.h but not implemented anywhere. The regmap implementation & commit message of 6f98b7504f70 ("dm: Add support for register maps (regmap)") indicate that only memory mapped accesses are supported for now, so providing simple implementations of regmap_read & regmap_write is trivial. The access size is presumed to be 4 bytes & endianness is presumed native, which are the defaults for the regmap code in Linux. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-09 02:47:34 +0000