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* | | Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2015-03-26-2/+0
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| * | | dm: serial: remove bogus include <ns16550.h>Masahiro Yamada2015-03-25-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Serial-uclass should be generically implemented without depending a particular hardware. Fortunately, nothing in include/ns16550.h is referenced from drivers/serial/serial-uclass.c, so remove this bogus include. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2015-03-26-1076/+1852
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| * | | x86: Add ramboot and nfsboot commands in x86-common.hBin Meng2015-03-24-2/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is very common in the debug stage to test U-Boot loading a linux kernel. The commands to boot linux kernel with ramdisk and nfs as the root are common to all x86 targets, so it makes sense to add them as the U-Boot default environment in x86-common.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chroimum.org>
| * | | x86: galileo: Enable saving environment in SPI flashBin Meng2015-03-24-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Saving U-Boot's environment in SPI flash on Intel Galileo board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sg@chromium.org>
| * | | x86: crownbay: Enable saving environment in SPI flashBin Meng2015-03-24-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Saving U-Boot's environment in SPI flash on Intel CrownBay board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sg@chromium.org>
| * | | x86: crownbay: Enable Intel Topcliff GMAC supportBin Meng2015-03-24-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Crown Bay board has one ethernet port connected from Intel Topcliff PCH. Enable it in the board configuration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: Add Intel Topcliff GMAC driverBin Meng2015-03-24-0/+771
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new driver for the Gigabit Ethernet MAC found on Intel Topcliff Platform Controller Hub. Tested under 10/100 half/full duplex and 1000 full duplex modes using ping and tftpboot commands. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: Update README.drivers.eth to mention latest APIsBin Meng2015-03-24-16/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | README.drivers.eth still refers to the deprecated miiphy_register(). Update the doc to mention new APIs mdio_alloc() and mdio_register(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: Add ethernet FCS length macro in net.hBin Meng2015-03-24-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some ethernet drivers use their own version of ethernet FCS length macro which is really common. We define ETH_FCS_LEN in net.h and replace those custom versions in various places. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | x86: quark: Enable on-chip ethernet controllersBin Meng2015-03-24-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Quark SoC integrates two 10/100 ethernet controllers which can be connected to an external RMII PHY. The MAC IP is from Designware. Enable this support with the existing U-Boot Designware MAC driver so that the ethernet port on Intel Galileo board can be used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | x86: Add queensbay fsp patch information in README.x86Bin Meng2015-03-24-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FSP release version 001 for Intel Queensbay has a bug which could cause random endless loop during the FspInit call. This bug was published by Intel although Intel did not describe any details. Describe this information in the x86 doc so that U-Boot Queensbay support is invulnerable. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | fdtdec: Improve fdtdec_get_pci_bdf() documentationBin Meng2015-03-24-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | arch/x86/cpu/quark/mrc.c: Switch to U_BOOT_DATE / U_BOOT_TIMETom Rini2015-03-24-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using __DATE__ and __TIME__ results in an error due to -Werror=date-time with gcc-4.9 (__DATE__ / __TIME__ might prevent reproducible builds) so switch these over to U_BOOT_DATE / U_BOOT_TIME Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | x86: quark: MRC codes clean upBin Meng2015-03-24-1049/+955
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up the quark MRC codes coding style by: - Remove BIT0/1../31 defines from mrc_util.h - Create names for the documented BITs and use them - For undocumented single BITs, use (1 << n) directly - For undocumented ORed BITs, use the hex number directly - Remove redundancy parenthesis all over the codes - Replace to use lower case hex numbers Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | | config_distro_bootcmd.h: Prefer booting from bootable paritionsSjoerd Simons2015-03-25-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | List bootable partitions and only scan those for bootable files, falling back to partition 1 if there are no bootable partitions Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | | config_cmd_default.h: Add 'env exists' commandSjoerd Simons2015-03-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | env exists allows scripts to query whether an environment variable exists. Enable by default as it adds only a trivial amount of code and can be useful in scripts. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | | part: Add support for list filtering on bootable partitionsSjoerd Simons2015-03-25-12/+41
|/ / | | | | | | | | | | | | | | Add an optional -bootable parameter to the part list commands to only put the list of bootable partitions in the environment variable Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | bav335x: Update defconfigs and fix typo in EEPROM config formatGilles Gameiro2015-03-24-5/+11
| | | | | | | | | | | | | | | | | | After v2015.01 we need to have DM enabled in order to use UART. Also fix a typo in the EEPROM config format. Signed-off-by: Gilles Gameiro <gilles@gigadevices.com> [trini: Reword commit message, re-save defconfigs with 'savedefconfig'] Signed-off-by: Tom Rini <trini@konsulko.com>
* | ARM: rpi: fix RPi1 board rev detection for warranty bitStephen Warren2015-03-24-0/+7
| | | | | | | | | | | | | | | | | | Apparently the firmware's board rev response includes both the board revision and some other data even on the RPi1. In particular, the "warranty bit" is bit 24. We need to mask that out when looking up the board ID. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | remove unnecessary version.h includesRob Herring2015-03-24-73/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various files are needlessly rebuilt every time due to the version and build time changing. As version.h is not actually needed, remove the include. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Tom Warren <twarren@nvidia.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Cc: "David Müller" <d.mueller@elsoft.ch> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Torsten Koschorrek <koschorrek@synertronixx.de> Cc: Anatolij Gustschin <agust@denx.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Łukasz Majewski <l.majewski@samsung.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2015-03-24-190/+200
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| * | ARM: UniPhier: remove unnecessary ifdef conditionalMasahiro Yamada2015-03-24-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | The callee (arch/arm/lib/cache-cp15.c) has a #ifdef CONFIG_SYS_DCACHE_OFF conditional. The same conditional in the caller (arch/arm/mach-uniphier/cache_uniphier.c) is redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: disable L2 cache by lowlevel_init of U-Boot properMasahiro Yamada2015-03-24-17/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The L2 cache is used as a temporary SRAM on SPL. Now the secondary CPUs store the necessary code for jumping to Linux on their L1 I-caches. So, the L2 cache can be disabled much earlier, at the very entry of U-Boot proper (lowlevel_init). This makes the boot sequence clearer. Also, as the L1 cache has been disabled by the start.S, enable_caches() does not need to do it again. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: optimize kicking secondary CPUs codeMasahiro Yamada2015-03-24-72/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the secondary CPU(s) are kicked three times: Boot ROM ---(kick)--> SPL ---(kick)--> U-boot ---(kick)--> Linux. It makes the boot sequence very complicated. This commit merges the first and the second kicks, so the secondary CPU(s) can directly jump from SPL to Linux. arch/arm/mach-uniphier/smp.S is no longer necessary. Linux boot test passed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: fix typos in commentsMasahiro Yamada2015-03-24-12/+13
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: add empty lowlevel_init to U-boot properMasahiro Yamada2015-03-24-4/+13
| | | | | | | | | | | | | | | | | | | | | To remove the ifdef conditional of CONFIG_SKIP_LOWLEVEL_INIT, add late_lowlevel_init.S to U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: move init stack area just below TEXT_BASEMasahiro Yamada2015-03-24-1/+1
| | | | | | | | | | | | | | | | | | | | | There is no good reason to have the 0x1000 gap between CONFIG_SYS_INIT_SP_ADDR and CONFIG_SYS_TEXT_BASE. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: add CONFIG_SPL_MAX_FOOTPRINTMasahiro Yamada2015-03-24-0/+2
| | | | | | | | | | | | | | | | | | | | | The Boot ROM of UniPhier platform only loads 64KB image. We should always make sure that SPL memory footprint is less than that. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: use CONFIG_SPL_STACK to define SPL stack pointerMasahiro Yamada2015-03-24-8/+14
| | | | | | | | | | | | | | | | | | | | | Ifdef conditionals for CONFIG options are not Kconfig-friendly. Instead, define CONFIG_SPL_STACK to prepare for Kconfig moves. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: enable Driver Model and UART on SPLMasahiro Yamada2015-03-24-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SPL_DM and CONFIG_SPL_SERIAL_SUPPORT, which provide Driver Model UART support on SPL. CONFIG_SYS_SPL_MALLOC_{START,SIZE} should be dropped because simple malloc is preferred on SPL. Dlmalloc requires some static variables on .data section that is not available yet for NOR boot mode etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: enable CONFIG_PANIC_HANGMasahiro Yamada2015-03-24-1/+4
| | | | | | | | | | | | | | | | | | | | | Do not reset board on panic, which allows us to not link reset_cpu() into SPL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: move UART pin settings to SPLMasahiro Yamada2015-03-24-49/+96
| | | | | | | | | | | | | | | | | | | | | | | | The UniPhier platform is going to enable Driver Model and UART support on SPL. Move UART pin settings to early_pin_init(), which is called from SPL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: move platform devices to SPLMasahiro Yamada2015-03-24-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we do not have OF_CONTROL support for SPL, platform devices are necessary to enable Driver Model on SPL. To prepare for that, move platdevice.o to SPL and enable it by CONFIG_SPL_DM. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: include PH1-LD4 Makefile from PH1-sLD8Masahiro Yamada2015-03-24-16/+1
| | | | | | | | | | | | | | | | | | | | | | | | The two Makefiles arch/arm/mach-uniphier/{ph1-ld4,ph1-sld8}/Makefile are completely the same. We can improve the maintainability by having one to include the other. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: remove unnecessary CONFIG_SYS_SOCMasahiro Yamada2015-03-24-3/+0
| |/ | | | | | | | | | | | | | | Since commit a86ac9540e20 (ARM: UniPhier: include <mach/*.h> instead of <asm/arch/*.h>), UniPhier platform does not need the symbolic link arch/arm/include/asm. This option is not necessary either. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | sunxi: musb: Return early on VBUS GPIO error instead of on a positive valuePaul Kocialkowski2015-03-21-1/+1
|/ | | | | | | | | This allows printing the error message when VBUS is detected, as it would with AXP VBUS detect. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* at91sam9rlek_mmc_defconfig: Add CONFIG_ARCH_AT91=yTom Rini2015-03-20-0/+1
| | | | | | | This flag was missing and thus the board was totally being configured wrong. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-03-20-13/+89
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| * ARM: atmel: sama5d4: set non-secured for peripheralsBo Shen2015-03-18-0/+9
| | | | | | | | | | | | | | When access the programmable secure peripherals address space, it needs set them to non-secured. Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * Net: macb: reset GBE bit when fallback checkingBo Shen2015-03-18-1/+1
| | | | | | | | | | | | | | | | If the GBE bit is set, when do next time autonegotiation, if the result is not 1000Mbps, it will fallback to 100Mbps checking. So, we need to clear the GBE bit. Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * ARM: atmel: armv7: move spl lds to armv7 directoryBo Shen2015-03-18-4/+4
| | | | | | | | | | | | | | As the u-boot-spl.lds is used only for armv7 SoCs (includes sama5d3 and sama5d4), so move it to armv7 directory. Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * ARM: atmel: sama5d4 boards: fix spl lds locationBo Shen2015-03-18-2/+2
| | | | | | | | | | | | | | As the u-boot-spl.lds is moved to <arch/arm/mach-at91> directory. So, correct the path for sama5d4 related boards. Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * ARM: atmel: sama5d4 xplained: enable mmc powerBo Shen2015-03-18-0/+3
| | | | | | | | | | | | Enable the power for MMC/SD port. Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * ARM: at91: at91sam9rlek: add hush parser to defconfigWu, Josh2015-03-18-0/+3
| | | | | | | | | | | | | | | | HUSH parser will handle the variable easier. That will be helpful for write a complicated U-Boot commands or varaibles. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com>
| * ARM: at91: at91sam9rlek: add mmc environment configurationWu, Josh2015-03-18-1/+20
| | | | | | | | | | | | | | Add a mmc default config, which will save the environment in a FAT file (uboot.env) of MMC. Signed-off-by: Josh Wu <josh.wu@atmel.com>
| * ARM: at91: at91sam9rlek: add mci supportWu, Josh2015-03-18-0/+38
| | | | | | | | | | | | | | | | This patch enable the MCI support for at91sam9rlek board. Signed-off-by: Josh Wu <josh.wu@atmel.com> [rebase on ToT] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * ARM: at91: at91sam9rlek: update the default nand flash configsWu, Josh2015-03-18-7/+11
| | | | | | | | | | | | | | | | Update the nand flash offset mapping, default nand bootcmand and bootargs to align with linux4sam.org. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-03-18-44/+88
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| * | mx6sabre: Do not enable UMS with SPLFabio Estevam2015-03-13-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit ad8aae82b20ac6a ("mx6sabre: Enable User Mass Storage") SPL target does not boot anymore due to the increased spl image size. Only enable USB Mass Storage for the non-SPL target. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-11-18 07:34:01 +0000