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| * | | ARM: UniPhier: remove SSC_WAY_SIZE and SSC_NUM_ENTRIES macrosMasahiro Yamada2015-03-01-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each way of the system cache has 256 entries for PH1-Pro4 and older SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs. The line size is still 128 byte. Thus, the way size is 32KB/64KB for old/new SoCs. To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the constant value 32KB. It is large enough for temporary RAM and should work for all the SoCs of UniPhier family. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: remove stop_mpll() from PH1-Pro4 PLL initializationMasahiro Yamada2015-03-01-21/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function was intended for MN2WS0235 (what we call PH1-Pro4TV). On that SoC, MPLL is already running on the power-on reset and it makes sense to stop the PLL at early boot-up. On the other hand, PH1-Pro4(R) does not have SC_MPLLOSCCTL register, so this function has no point. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: consolidate MEMCONF setting codeMasahiro Yamada2015-03-01-141/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code is duplicated in ph1-ld4/sg_init.c and ph1-pro4/sg_init.c. Merge the same code into a new file, memconf.c. The helper functions no longer have to be placed in the header file. Also, move them into memconf.c. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: switch to 1CS support cardMasahiro Yamada2015-03-01-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 3CS support card (CONFIG_DCC_MICRO_SUPPORT_CARD) used to be used very often before, but it is recently getting a minority. Swith to the 1CS support card (CONFIG_PFC_MICRO_SUPPORT_CARD). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: support 1CS support card for all the UniPhier SoCsMasahiro Yamada2015-03-01-121/+189
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Two support card variants are used with UniPhier reference boards: - 1 chip select support card (original CPLD) - 3 chip selects support card (ARIMA-compatible CPLD) Currently, the former is only supported on PH1-Pro4, but it can be expanded to PH1-LD4, PH1-sLD8 with a little code change. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: switch to xHCI for PH1-Pro4Masahiro Yamada2015-03-01-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PH1-Pro4 includes both EHCI and xHCI IP cores. Unfortunately, U-Boot cannot enable EHCI and xHCI support simultaneously. Some users may wish Super-Speed connection. Disable CONFIG_USB_EHCI_HCD and enable CONFIG_USB_XHCI_HCD. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | usb: UniPhier: add UniPhier on-chip xHCI host driver supportMasahiro Yamada2015-03-01-1/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | ARM: UniPhier: add xHCI device nodes to PH1-Pro4 device treeMasahiro Yamada2015-03-01-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each USB port corresponds to the following IP core: port0: xHCI (0x65a00000) SS+HS port1: xHCI (0x65c00000) HS (SS PHY is not implemented) port2: EHCI (0x5a800100) HS port3: EHCI (0x5a810100) HS Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: enable xHCI and GIO cores for PH1-Pro4Masahiro Yamada2015-03-01-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | This is necessary to use the USB 3.0 host controllers on PH1-Pro4. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: add I/O pin settings for xHCI on PH1-Pro4Masahiro Yamada2015-03-01-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | This is necessary to use the xHCI cores for PH1-Pro4. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: replace "usb-ehci" with "generic-ehci"Masahiro Yamada2015-03-01-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | EHCI host controllers have a common register interface. We may wish to implement a generic EHCI driver someday. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: move uniphier_ehci_reset() functionMasahiro Yamada2015-03-01-28/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because uniphier_ehci_reset() is only called from ehci-uniphier.c, it can be a static function there. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | ARM: UniPhier: remove EHCI platform devicesMasahiro Yamada2015-03-01-59/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now UniPhier platform highly depends on Device Tree configuration (CONFIG_OF_CONTROL is select'ed by Kconfig). Since the EHCI is only used on main U-Boot, we can drop platform devices of the EHCI controllers. We still keep UART platform devices because they might be useful for SPL. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | ARM: UniPhier: enable STDMAC for EHCIMasahiro Yamada2015-03-01-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Deassert the reset signal and provide the clock for STDMAC core. This is necessary for the USB 2.0 host controllers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: reset NAND core in SPL for non-NAND boot modeMasahiro Yamada2015-03-01-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For all the UniPhier SoCs so far, the reset signal of the NAND core is automatically deasserted after the PLL gets stabled. (The bit 2 of SC_RSTCTRL is default to one.) This causes a fatal problem on the NAND controller of PH1-LD4. For that SoC, the NAND I/O pins are not set up yet at the power-on reset except the NAND boot mode. As a result, the NAND controller begins automatic device scanning with wrong I/O pins and finally hangs up. Actually, U-Boot dies after printing "NAND:" on the console unless the boot mode latch detected the NAND boot mode. To work around this problem, reset the NAND core in SPL for non-NAND boot modes. If CONFIG_NAND_DENALI is enabled, the reset signal is deasserted again in U-Boot proper. At this time, I/O pins have been correctly set up, the device scanning should succeed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: split clkrst_init() into two functionsMasahiro Yamada2015-03-01-49/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the current clkrst_init() into two functions: - early_clkrst_init(): called from SPL Deassert the reset signals of the memory controller and some other basic cores. - clkrst_init(): called from main U-boot Deassert the reset signals that are necessary for the access to peripherals etc. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: rename SC_CLKCTRL_CLK_* to SC_SCLKCTRL_CEN_*Masahiro Yamada2015-03-01-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | Follow the register macros in the LSI specification book. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: fix SBC init codeMasahiro Yamada2015-03-01-25/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now UniPhier SoCs only work with CONFIG_SPL and the function sbc_init() is called from SPL. The conditional #if !defined(CONFIG_SPL_BUILD) has no point any more. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: fix comments in PH1-Pro4 SBC codeMasahiro Yamada2015-03-01-3/+3
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | serial: UniPhier: move LCR register setting to probe functionMasahiro Yamada2015-03-01-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We do not have to set the LCR register every time we change the baud-rate. We just need to set it up once in the probe function. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | serial: UniPhier: use 32 bit register accessMasahiro Yamada2015-03-01-28/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11) is not working correctly. As a side effect, it also modifies MCR register (offset = 0x10) and results in unexpected behavior. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: update defconfigs using savedefconfigMasahiro Yamada2015-03-01-27/+27
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: include <mach/*.h> instead of <asm/arch/*.h>Masahiro Yamada2015-03-01-69/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 0e7368c6c426 (kbuild: prepare for moving headers into mach-*/include/mach), we can replace #include <asm/arch/*.h> with <mach/*.h> so we do not need to create the symbolic link during the build. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: move SoC headers to mach-uniphier/include/machMasahiro Yamada2015-03-01-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move arch/arm/include/asm/arch-uniphier/* -> arch/arm/mach-uniphier/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: move SoC sources to mach-uniphierMasahiro Yamada2015-03-01-3/+3
| |/ / | | | | | | | | | | | | | | | | | | Move arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2015-03-01-41/+3349
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| * | | arm: rmobile: silk: Add support SDHIVladimir Barinov2015-02-25-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds GPIO configuration and initialization function of SDHI on Silk board Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: silk: fix typo in device declarationVladimir Barinov2015-02-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix typo in device declaration Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: silk: Disable ethernet pins pull-upVladimir Barinov2015-02-25-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable pull-ups on ethrenet lines Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: silk: Fix GPIO4_31 initializationVladimir Barinov2015-02-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use gpio_direction_output instead of gpio_set_value since the latter does not set output GPIO direction. Signed-off-by: Valentine Barshak <valentine.barshak+renesas@cogentembedded.com> Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: Add Porter board supportVladimir Barinov2015-02-25-1/+1704
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Porter is an entry level development board based on R-Car M2 SoC (R8A7791) This commit supports the following peripherals: - SCIF, I2C, Ethernet, QSPI, SD, USB Host Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: lager: Add support SDHINobuhiro Iwamatsu2015-02-25-9/+1055
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lager board has two SDHI port as SDHI0 and SDHI2. This adds GPIO configuration and initialization function of SDHI, and enables MMC command. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: gose: Add support SDHINobuhiro Iwamatsu2015-02-25-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gose board has three SDHI port. This adds GPIO configuration and initialization function of SDHI, and enables MMC command. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: koelsch: Add support SDHINobuhiro Iwamatsu2015-02-25-1/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Koelsch board has three SDHI port. This adds GPIO configuration and initialization function of SDHI, and enables MMC command. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: alt: Add support SDHINobuhiro Iwamatsu2015-02-25-13/+308
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Alt board has two SDHI port. This adds GPIO configuration and initialization function of SDHI, and enables MMC command. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: silk: Migrate serial driver to drivers modelNobuhiro Iwamatsu2015-02-25-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds drivers model support of serial port to Silk board, and migrate serial port to drivers model. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: alt: Migrate serial driver to drivers modelNobuhiro Iwamatsu2015-02-25-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds drivers model support of serial port to Alt board, and migrate serial port to drivers model. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: lager: Migrate serial driver to drivers modelNobuhiro Iwamatsu2015-02-25-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds drivers model support of serial port to Lager board, and migrate serial port to drivers model. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: gose: Migrate serial driver to drivers modelNobuhiro Iwamatsu2015-02-25-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds drivers model support of serial port to Gose board, and migrate serial port to drivers model. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: koelsch: Migrate serial driver to drivers modelNobuhiro Iwamatsu2015-02-25-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds drivers model support of serial port to Koelsch board, and migrate serial port to drivers model. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2015-03-01-5/+943
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| * | | | sh: enable CONFIG_USE_PRIVATE_LIBGCC by defaultMasahiro Yamada2015-02-25-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now this feature works. Let's turn it on by default so we do not depend on specific tool-chains. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | | sh: import missing private libraries from Linux 3.19Masahiro Yamada2015-02-25-2/+936
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SuperH is supposed to support the Private Library feature, but it is actually not working. If CONFIG_USE_PRIVATE_LIBGCC is enabled, the build fails for the undefined references to '__sdivsi3_i4i' and '__udivsi3_i4i'. To fix this error, import missing libraries from Linux 3.19 and adjust them for U-Boot: - Remove "#include <linux/module.h>" and "EXPORT_SYMBOL(...)" - Use SPDX-License-Identifier - Remove white space Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | | sh: rename some private librariesMasahiro Yamada2015-02-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename two files to the corresponding file names in Linux. This helps us find missing libraries in the next commit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | | serial: sh: fix internal clock source on SCIFVladimir Barinov2015-02-25-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The formula to calculate SCIF BRR for R-Car H2/M2/E2 SoCs is as follows: BRR = pclk / (64 * 2^(2n-1) * baudrate) - 1, the prescaler is 0 due to SCSMR settings, hence n=0 Also SCSCR must be set to use internal or external clock source. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | | serial: sh: Remove invalid UTF-8 characterNobuhiro Iwamatsu2015-02-25-1/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | serial_sh.c contains invalid UTF-8 character. This deletes the character. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | MAINTAINERS: Add F: drivers/usb/gadget to DFU custodian responsibilityLukasz Majewski2015-02-26-0/+1
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | After discussion during the last u-boot mini summit with USB maintainer - Marek Vasut - it has been decided, that gadget development should be coordinated by DFU custodian. Such patch formalizes current development status. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-02-25-334/+2404
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| * | | crypto/fsl - Add progressive hashing support using hardware acceleration.gaurav rana2015-02-25-7/+302
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently only normal hashing is supported using hardware acceleration. Added support for progressive hashing using hardware. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | crypto/fsl: Make function names consistent for blob encapsulation/decapsulation.gaurav rana2015-02-25-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following: 1. The function names for encapsulation and decapsulation were inconsitent in freescale's implementation and cmd_blob file. This patch corrects the issues. 2. The function protopye is also modified to change the length parameter from u8 to u32 to allow encapsulation and decapsulation of larger images. 3. Modified the description of km paramter in the command usage for better readability. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-11-19 15:40:08 +0000