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authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>2014-12-09 16:20:04 +0900
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2015-02-25 13:13:01 +0900
commitcf839572a7e8cd77cececa0c32746ed7c5b65a5b (patch)
treea5896eb3e2cc9fe7853afde5ae152c5ecb9b6570
parent9d86e48e3f0e0b22bf056a2a6a79d4983541c75d (diff)
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arm: rmobile: lager: Migrate serial driver to drivers model
This adds drivers model support of serial port to Lager board, and migrate serial port to drivers model. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-rw-r--r--board/renesas/lager/lager.c14
-rw-r--r--configs/lager_defconfig2
-rw-r--r--include/configs/lager.h3
3 files changed, 16 insertions, 3 deletions
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index d1e29d2..d35d20f 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -11,6 +11,8 @@
#include <common.h>
#include <malloc.h>
#include <netdev.h>
+#include <dm.h>
+#include <dm/platform_data/serial_sh.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
@@ -189,3 +191,15 @@ void reset_cpu(ulong addr)
val |= 0x02;
i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
}
+
+static const struct sh_serial_platdata serial_platdata = {
+ .base = SCIF0_BASE,
+ .type = PORT_SCIF,
+ .clk = 14745600,
+ .clk_mode = EXT_CLK,
+};
+
+U_BOOT_DEVICE(lager_serials) = {
+ .name = "serial_sh",
+ .platdata = &serial_platdata,
+};
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index 8b4aeea..1602a9b 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARM=y
CONFIG_RMOBILE=y
CONFIG_TARGET_LAGER=y
+CONFIG_DM=y
+CONFIG_DM_SERIAL=y
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 291267f..1c96b8a 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -39,8 +39,6 @@
/* SCIF */
#define CONFIG_SCIF_CONSOLE
-#define CONFIG_CONS_SCIF0
-#define CONFIG_SCIF_USE_EXT_CLK
/* SPI */
#define CONFIG_SPI
@@ -83,7 +81,6 @@
#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
-#define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */
#define CONFIG_SYS_TMU_CLK_DIV 4