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| | | * | 85xx: Remove setting of *cache-line-size in device treesKumar Gala2008-10-07-3/+0
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | ePAPR says if the *cache-block-size is the same as *cache-line-size than we don't need the *cache-line-size property. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | Merge branch 'master' of git://git.denx.de/u-boot-cfi-flashWolfgang Denk2008-10-12-1/+2
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| | | * | cfi_flash: do not reset flash when probe failsMike Frysinger2008-10-02-1/+2
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CFI flash driver starts at flash_init() which calls down into flash_get_size(). This starts by calling flash_detect_cfi(). If said function fails, flash_get_size() finishes by attempting to reset the flash. Unfortunately, it does this with an info->portwidth set to 0x10 which filters down into flash_make_cmd() and that happily smashes the stack by sticking info->portwidth bytes into a cfiword_t variable that lives on the stack. On a 64bit system you probably won't notice, but killing the last 8 bytes on a 32bit system usually leads to a corrupt return address. Which is what happens on a Blackfin system. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | mpc83xx: don't disable autobootKim Phillips2008-09-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bootdelay set to -1 'permanently' disables autobooting, even if bootcmd is specified. Change to a positive value to allow autobooting when a bootcmd is set. Reported-by: Coray Tate <Coray.Tate@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | mpc83xx: Fix typo in include/mpc83xx.hNobuhiro Iwamatsu2008-09-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | mpc83xx: add h/w flash protection to board configsKim Phillips2008-09-24-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the operating system may leave flash in a h/w locked state after writing. This allows u-boot to continue to write flash by enabling h/w unlocking by default. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | mpc83xx: spd_sdram: fix ddr sdram base address assignment bugAnton Vorontsov2008-09-24-9/+9
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spd_dram code shifts the base address, then masks 20 bits, but forgets to shift the base address back. Fix this by just masking the base address correctly. Found this bug while trying to relocate a DDR memory at the base != 0. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | TQM5200: enable support for ATAPI devicesWolfgang Denk2008-10-01-0/+3
| |/ | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ppc4xx: Fix USB 2.0 phy reset sequenceMatthias Fuchs2008-10-10-3/+32
| | | | | | | | | | | | | | This patch fixes USB 2.0 communication issues on some DU440 boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add strapping mode for 667MHz CPU frequency on DU440 boardMatthias Fuchs2008-10-10-0/+6
| | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fix DU440 GPIO configurationMatthias Fuchs2008-10-10-5/+5
| | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Update DU440 configMatthias Fuchs2008-10-10-2/+4
| | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR changeAdam Graham2008-10-08-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | After changing SDRAM_CLKTR phase value rerun the memory preload initialization sequence (INITPLR) to reset and relock the memory DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing adjustment effects the phase relationship of the internal, to the PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-09-23-33/+26
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| * ppc4xx: Canyonlands: Remove unnecessary FDT warning upon DTB fixupStefan Roese2008-09-22-12/+4
| | | | | | | | | | | | | | | | | | Depending on the configuration jumper "SATA SELECT", U-Boot disabled either one PCIe node or the SATA node in the device tree blob. This patch removes the unnecessary and even confusing warning, when the node is not found at all. Signed-off-by: Stefan Roese <sr@denx.de>
| * Add missing device types to dev_print() in part.cRemy Bohmer2008-09-22-1/+9
| | | | | | | | Signed-off-by: Remy Bohmer <linux@bohmer.net>
| * Fix DPRAM memory leak when CFG_ALLOC_DPRAM is defined, whichWolfgang Denk2008-09-22-4/+6
| | | | | | | | | | | | | | | | eventually leads to a machine check. This change assures that DPRAM is allocated only once in that case. Signed-off-by: Gary Jennejohn <garyj@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Fix Spartan-3 definitions.Laurent Pinchart2008-09-22-3/+3
| | | | | | | | | | | | | | A few Spartan-3 definitions erroneously use Spartan-3E size constants. This patch fixes them. Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
| * Remove duplicate Spartan-3E definition.Laurent Pinchart2008-09-22-9/+0
| | | | | | | | | | Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
| * socrates: change default mtest address rangeAnatolij Gustschin2008-09-22-2/+2
| | | | | | | | | | | | | | | | Running mtest command on socrates without specifying an address range crashes the board. This patch changes default mtest address range to prevent this behavior. Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * socrates: fix crash after relocationAnatolij Gustschin2008-09-22-1/+1
| | | | | | | | | | | | | | | | | | | | Currently U-Boot crashes after relocation to RAM. Changing the CPO value of the DDR SDRAM TIMING_CFG_2 register to READ_LAT + 1 (to the value it was before conversion of socrates to new DDR code) fixes the problem. Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * socrates: fix SPD EEPROM addressAnatolij Gustschin2008-09-22-1/+1
| | | | | | | | | | | | | | | | | | Commit be0bd8234b9777ecd63c4c686f72af070d886517 changed SPD EEPROM address to 0x51 and DDR SDRAM detection stopped working. Change this address back to 0x50. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-09-22-1072/+450
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| * Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-09-21-3/+5
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| | * Support for multiple SGMII/TBI interfaces for TSEC ethernetPeter Tyser2008-09-16-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix TBI PHY accesses to use the proper offset in CPU register space. The previous code would incorrectly access the TBI PHY by reading/writing to CPU register space at the same location as would be used to access external PHYs. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | sh: Fix compile warningNobuhiro Iwamatsu2008-09-19-100/+133
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support watchdog for SH4A coreNobuhiro Iwamatsu2008-09-19-64/+104
| | | | | | | | | | | | | | | | | | | | | Add support watchdog for SH4A core (SH7763, SH7780 and SH7785). And fix some compile warning. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Fix typo in SH serial driverNobuhiro Iwamatsu2008-09-19-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support any page size and empty_zero_page to SH Linux uImageNobuhiro Iwamatsu2008-09-19-26/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Old U-Boot supported 4KB page size only. If this version, Linux kernel can not get command line from U-Boot. SH Linux kernel can change page size and empty_zero_page. This patch support this function and fix promlem. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: rsk7203: Add support pkt_data_pull and pkt_data_push functionNobuhiro Iwamatsu2008-09-19-0/+21
| | | | | | | | | | | | | | | | | | | | | Add function of smc911x, pkt_data_pull and pkt_data_push. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ADS5121: fix typo in "rootpath" default settingWolfgang Denk2008-09-18-1/+1
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | Coding style cleanup; update CHANEGLOGWolfgang Denk2008-09-17-35/+65
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | TQM8xx: Fix CFI flash driver support for all TQM8xx based boardsWolfgang Denk2008-09-16-876/+136
| |/ | | | | | | | | | | | | | | | | | | After switching to using the CFI flash driver, the correct remapping of the flash banks was forgotten. Also, some boards were not adapted, and the old legacy flash driver was not removed yet. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Revert "ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB)"Stefan Roese2008-09-22-37/+5
| | | | | | | | | | | | This reverts commit 3eec160a3a405b29ce9c06920f6427b9047dd8a8. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB)Victor Gallardo2008-09-16-5/+37
|/ | | | | | Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Prepare v2008.10-rc2v2008.10-rc2Wolfgang Denk2008-09-14-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding style cleanup, update CHANGELOGWolfgang Denk2008-09-13-217/+981
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Update mailing list email and archive addressesPeter Tyser2008-09-13-5/+5
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* 85xx: socrates: autoprobe Lime chipu-boot@bugs.denx.de2008-09-13-15/+43
| | | | | | | | | This patch is an attempt to implement autoprobing for the Lime presence on the bus. Configure GPCM for Lime CS2 and try to access chip ID registers. Second read atempt delivers register values if the chip is present. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* 85xx: socrates: Add support for new image format.u-boot@bugs.denx.de2008-09-13-0/+5
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* sh: Fix compile error for r2dplusNobuhiro Iwamatsu2008-09-13-0/+1
| | | | | | netdev.h was not include by r2dplus. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
* powerpc: Fix bootm to boot up again with a RamdiskHeiko Schocher2008-09-13-7/+9
| | | | | | | | | | | | | | | Commit 2a1a2cb6 didnt remove the dummy mem reservation in fdt_chosen, and this stopped Linux from booting with a Ramdisk. This patch fixes this, by deleting the useless dummy mem reservation. When booting with a Ramdisk, a fix offset FDT_RAMDISK_OVERHEAD is now added to of_size, so we dont need anymore a dummy mem reservation. I measured the value of FDT_RAMDISK_OVERHEAD on a MPC8270 based system (=0x44 bytes) and rounded it up to 0x80). Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* Add support for LZMA uncompression algorithm.Luigi 'Comio' Mantellini2008-09-13-0/+2539
| | | | | Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2008-09-13-19/+138
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| * fsl_elbc_nand: ecclayout cleanupsAnton Vorontsov2008-09-12-4/+0
| | | | | | | | | | | | | | | | | | | | This patch deletes oobavail assignments, they're calculated by the nand core code in nand_scan_tail, plus current oobavail values are wrong for the LP NANDs. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * fsl_elbc_nand: implement support for flash-based BBTAnton Vorontsov2008-09-12-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements support for flash-based BBT for chips working through ELBC NAND controller, so that NAND core will not have to re-scan for bad blocks on every boot. Because ELBC controller may provide HW-generated ECCs we should adjust bbt pattern and bbt version positions in the OOB free area. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * fsl_elbc_nand: fix OOB workability for large page NAND chipsAnton Vorontsov2008-09-12-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For large page chips, nand_bbt is looking into OOB area, and checking for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be reserved for bbt means. But ELBC driver is specifying ecclayout so that oobfree area starts at offset 1, so only one byte left for the bbt purposes. This causes problems with any OOB users, namely JFFS2: after first mount JFFS2 will fill all OOBs with "erased marker", so OOBs will contain: OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff And on the next boot, NAND core will rescan for bad blocks, then will see "0xff 0x19" pattern, and will mark all blocks as bad ones. To fix the issue we should implement our own bad block pattern: just one byte at OOB start. Though, this will work only for x8 chips. For x16 chips two bytes must be checked. Since ELBC driver does not support x16 NANDs (yet), we're safe for now. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * delta, zylonite: Update nand_oobinfo to nand_ecclayout.Scott Wood2008-09-10-8/+4
| | | | | | | | | | | | This is part of the switch to newer upstream MTD code. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * ARM DaVinci: Fix broken HW ECC for large page NAND.Hugo Villeneuve2008-09-10-5/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on original patch by Bernard Blackham <bernard@largestprime.net> U-boot's HW ECC support for large page NAND on Davinci is completely broken. Some kernels, such as the 2.6.10 one supported by MontaVista for DaVinci, rely upon this broken behaviour as they share the same code for ECCs. In the existing scheme, error detection *might* work on large page, but error correction definitely does not. Small page ECC correction works, but the format is not compatible with the mainline git kernel. This patch adds ECC code that matches what is currently in the Davinci git repository (since NAND support was added in 2.6.24). This makes the ECC and OOB layout written by u-boot compatible with Linux for both small page and large page devices and fixes ECC correction for large page devices. The old behaviour can be restored by defining the macro CFG_DAVINCI_BROKEN_ECC, which is undefined by default. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Acked-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2008-09-12-4050/+3978
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