diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-ppc/ppc4xx-sdram.h | 17 | ||||
| -rw-r--r-- | include/configs/CPCI4052.h | 6 | ||||
| -rw-r--r-- | include/configs/CPCI405AB.h | 6 | ||||
| -rw-r--r-- | include/configs/PIP405.h | 1 | ||||
| -rw-r--r-- | include/configs/kilauea.h | 19 | ||||
| -rw-r--r-- | include/configs/ml507.h | 91 | ||||
| -rw-r--r-- | include/configs/v5fx30teval.h | 49 | ||||
| -rw-r--r-- | include/configs/xilinx-ppc440-generic.h | 49 | ||||
| -rw-r--r-- | include/configs/xilinx-ppc440.h | 106 | ||||
| -rw-r--r-- | include/ppc440.h | 13 | ||||
| -rw-r--r-- | include/ppc4xx.h | 13 | ||||
| -rw-r--r-- | include/ppc4xx_enet.h | 3 |
12 files changed, 276 insertions, 97 deletions
diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h index 0174d62..8efa557 100644 --- a/include/asm-ppc/ppc4xx-sdram.h +++ b/include/asm-ppc/ppc4xx-sdram.h @@ -29,6 +29,7 @@ /* * SDRAM Controller */ + /* * XXX - ToDo: Revisit file to change all these lower case defines into * upper case. Also needs to be done in the controller setup code too @@ -256,6 +257,7 @@ #define SDRAM_DLYCAL_DLCV_ENCODE(x) (((x)<<2) & SDRAM_DLYCAL_DLCV_MASK) #define SDRAM_DLYCAL_DLCV_DECODE(x) (((x) & SDRAM_DLYCAL_DLCV_MASK)>>2) +#if !defined(CONFIG_405EX) /* * Memory queue defines */ @@ -293,7 +295,6 @@ #define SDRAM_PLBADDUHB (SDRAMQ_DCR_BASE+0x10) /* PLB base address upper 32 LL */ -#if !defined(CONFIG_405EX) /* * Memory Bank 0-7 configuration */ @@ -1401,4 +1402,18 @@ #endif /* CONFIG_SDRAM_PPC4xx_DENALI_DDR2 */ +#ifndef __ASSEMBLY__ +/* + * Prototypes + */ +void inline blank_string(int size); +inline void ppc4xx_ibm_ddr2_register_dump(void); +u32 mfdcr_any(u32); +void mtdcr_any(u32, u32); +u32 ddr_wrdtr(u32); +u32 ddr_clktr(u32); +void spd_ddr_init_hang(void); +u32 DQS_autocalibration(void); +#endif /* __ASSEMBLY__ */ + #endif /* _PPC4xx_SDRAM_H_ */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index fd49f56..9ec1721 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -146,6 +146,8 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ + #define CONFIG_LOOPW 1 /* enable loopw command */ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ @@ -219,6 +221,10 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP + /*----------------------------------------------------------------------- * FLASH organization */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 55dd629..7899598 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -144,6 +144,8 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ + #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ @@ -215,6 +217,10 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP + /*----------------------------------------------------------------------- * FLASH organization */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 2ceda00..86ea6c6 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -281,7 +281,6 @@ ***********************************************************/ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ -#define CONFIG_CS8952_PHY 1 /* its a CS8952 PHY */ /************************************************************ * RTC ***********************************************************/ diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index a475f97..f9eaa77 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -223,6 +223,22 @@ *----------------------------------------------------------------------*/ #define CFG_MBYTES_SDRAM (256) /* 256MB */ +/* + * CONFIG_PPC4xx_DDR_AUTOCALIBRATION + * + * Note: DDR Autocalibration Method_A scans the full range of possible PPC4xx + * SDRAM Controller DDR autocalibration values and takes a lot longer + * to run than Method_B. + * (See the Method_A and Method_B algorithm discription in the file: + * cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c) + * Define CONFIG_PPC4xx_DDR_METHOD_A to use DDR autocalibration Method_A + * + * DDR Autocalibration Method_B is the default. + */ +#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION /* IBM DDR autocalibration */ +#define DEBUG_PPC4xx_DDR_AUTOCALIBRATION /* dynamic DDR autocal debug */ +#undef CONFIG_PPC4xx_DDR_METHOD_A + #define CFG_SDRAM0_MB0CF_BASE (( 0 << 20) + CFG_SDRAM_BASE) /* DDR1/2 SDRAM Device Control Register Data Values */ @@ -386,6 +402,9 @@ #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ #define CONFIG_PHY1_ADDR 2 +/* Debug messages for the DDR autocalibration */ +#define CONFIG_AUTOCALIB "silent\0" /* default is non-verbose */ + /* * Default environment variables */ diff --git a/include/configs/ml507.h b/include/configs/ml507.h index f8cd499..37d93bb 100644 --- a/include/configs/ml507.h +++ b/include/configs/ml507.h @@ -17,106 +17,33 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* -#define DEBUG -#define ET_DEBUG -*/ - /*CPU*/ -#define CONFIG_XILINX_ML507 1 -#define CONFIG_XILINX_440 1 + +/*CPU*/ #define CONFIG_440 1 -#define CONFIG_4xx 1 +#define CONFIG_XILINX_ML507 1 #include "../board/xilinx/ml507/xparameters.h" /*Mem Map*/ -#define CFG_SDRAM_BASE 0x0 #define CFG_SDRAM_SIZE_MB 256 -#define CFG_MONITOR_BASE TEXT_BASE -#define CFG_MONITOR_LEN ( 192 * 1024 ) -#define CFG_MALLOC_LEN ( CFG_ENV_SIZE + 128 * 1024 ) - -/*Uart*/ -#define CONFIG_XILINX_UARTLITE -#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE -#define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE } -#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR - -/*Cmd*/ -#include <config_cmd_default.h> -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_ELF -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_JFFS2 -#define CONFIG_JFFS2_CMDLINE -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_PING -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_IMLS /*Env*/ -#define CFG_ENV_IS_IN_FLASH +#define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_SIZE 0x20000 #define CFG_ENV_SECT_SIZE 0x20000 -#define CFG_ENV_OFFSET 0x340000 -#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) +#define CFG_ENV_OFFSET 0x340000 +#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) /*Misc*/ -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "board:/# " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) -#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CFG_PBSIZE ( CFG_CBSIZE + sizeof( CFG_PROMPT ) + 16 ) -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x00400000 /* memtest works on */ -#define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ -#define CFG_LOAD_ADDR 0x00400000 /* default load address */ -#define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */ -#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ -#define CONFIG_LOOPW /* enable loopw command */ -#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_VERSION_VARIABLE /* include version env variable */ -#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */ -#define CFG_HUSH_PARSER /* Use the HUSH parser */ -#define CFG_PROMPT_HUSH_PS2 "> " -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */ -#define CFG_BOOTMAPSZ ( 8 << 20 ) /* Initial Memory map for Linux */ +#define CFG_PROMPT "ml507:/# " /* Monitor Command Prompt */ #define CONFIG_PREBOOT "echo U-Boot is up and runnining;" -/*Stack*/ -#define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */ -#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */ -#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ -#define CFG_GBL_DATA_OFFSET ( CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE ) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -/*Speed*/ -#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ - /*Flash*/ -#define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR #define CFG_FLASH_SIZE (32*1024*1024) -#define CFG_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CFG_FLASH_EMPTY_INFO 1 -#define CFG_MAX_FLASH_BANKS 1 #define CFG_MAX_FLASH_SECT 259 -#define CFG_FLASH_PROTECTION #define MTDIDS_DEFAULT "nor0=ml507-flash" #define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" +/*Generic Configs*/ +#include <configs/xilinx-ppc440.h> #endif /* __CONFIG_H */ diff --git a/include/configs/v5fx30teval.h b/include/configs/v5fx30teval.h new file mode 100644 index 0000000..67d8d7f --- /dev/null +++ b/include/configs/v5fx30teval.h @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*CPU*/ +#define CONFIG_440 1 +#define CONFIG_XILINX_ML507 1 +#include "../board/avnet/v5fx30teval/xparameters.h" + +/*Mem Map*/ +#define CFG_SDRAM_SIZE_MB 64 + +/*Env*/ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 0x20000 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_OFFSET 0x1A0000 +#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) + +/*Misc*/ +#define CFG_PROMPT "v5fx30t:/# " /* Monitor Command Prompt */ +#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" + +/*Flash*/ +#define CFG_FLASH_SIZE (16*1024*1024) +#define CFG_MAX_FLASH_SECT 131 +#define MTDIDS_DEFAULT "nor0=v5fx30t-flash" +#define MTDPARTS_DEFAULT "mtdparts=v5fx30t-flash:-(user)" + +/*Generic Configs*/ +#include <configs/xilinx-ppc440.h> + +#endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc440-generic.h b/include/configs/xilinx-ppc440-generic.h new file mode 100644 index 0000000..4e8080b --- /dev/null +++ b/include/configs/xilinx-ppc440-generic.h @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*CPU*/ +#define CONFIG_440 1 +#define CONFIG_XILINX_PPC440_GENERIC 1 +#include "../board/xilinx/ppc440-generic/xparameters.h" + +/*Mem Map*/ +#define CFG_SDRAM_SIZE_MB 256 + +/*Env*/ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 0x20000 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_OFFSET 0x340000 +#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) + +/*Misc*/ +#define CFG_PROMPT "board:/# " /* Monitor Command Prompt */ +#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" + +/*Flash*/ +#define CFG_FLASH_SIZE (32*1024*1024) +#define CFG_MAX_FLASH_SECT 259 +#define MTDIDS_DEFAULT "nor0=ml507-flash" +#define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" + +/*Generic Configs*/ +#include <configs/xilinx-ppc440.h> + +#endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc440.h b/include/configs/xilinx-ppc440.h new file mode 100644 index 0000000..40293cd --- /dev/null +++ b/include/configs/xilinx-ppc440.h @@ -0,0 +1,106 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef __CONFIG_GEN_H +#define __CONFIG_GEN_H +/* +#define DEBUG +#define ET_DEBUG +*/ + /*CPU*/ +#define CONFIG_XILINX_440 1 +#define CONFIG_440 1 +#define CONFIG_4xx 1 + +/*Mem Map*/ +#define CFG_SDRAM_BASE 0x0 +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MONITOR_LEN (192 * 1024) +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024) + +/*Uart*/ +#define CONFIG_XILINX_UARTLITE +#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE +#define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE } +#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR + +/*Cmd*/ +#include <config_cmd_default.h> +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ELF +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_JFFS2 +#define CONFIG_JFFS2_CMDLINE +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_DTT +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_IMLS + +/*Misc*/ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#define CFG_LONGHELP /* undef to save memory */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_MEMTEST_START 0x00400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ +#define CFG_LOAD_ADDR 0x00400000 /* default load address */ +#define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */ +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ +#define CONFIG_LOOPW /* enable loopw command */ +#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_VERSION_VARIABLE /* include version env variable */ +#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CFG_HUSH_PARSER /* Use the HUSH parser */ +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */ +#define CFG_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */ + +/*Stack*/ +#define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */ +#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */ +#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +/*Speed*/ +#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ + +/*Flash*/ +#define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR +#define CFG_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CFG_FLASH_EMPTY_INFO 1 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_FLASH_PROTECTION + +#endif /* __CONFIG_H */ diff --git a/include/ppc440.h b/include/ppc440.h index 3584fd2..be8d3ff 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -2064,19 +2064,6 @@ #ifndef __ASSEMBLY__ -static inline u32 get_mcsr(void) -{ - u32 val; - - asm volatile("mfspr %0, 0x23c" : "=r" (val) :); - return val; -} - -static inline void set_mcsr(u32 val) -{ - asm volatile("mtspr 0x23c, %0" : "=r" (val) :); -} - #endif /* _ASMLANGUAGE */ #endif /* __PPC440_H__ */ diff --git a/include/ppc4xx.h b/include/ppc4xx.h index 59a3b06..e216663 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -203,6 +203,19 @@ typedef struct unsigned long pllPlbDiv; } PPC4xx_SYS_INFO; +static inline u32 get_mcsr(void) +{ + u32 val; + + asm volatile("mfspr %0, 0x23c" : "=r" (val) :); + return val; +} + +static inline void set_mcsr(u32 val) +{ + asm volatile("mtspr 0x23c, %0" : "=r" (val) :); +} + #endif /* __ASSEMBLY__ */ #endif /* __PPC4XX_H__ */ diff --git a/include/ppc4xx_enet.h b/include/ppc4xx_enet.h index b74c6fc..00669a7 100644 --- a/include/ppc4xx_enet.h +++ b/include/ppc4xx_enet.h @@ -376,6 +376,7 @@ typedef struct emac_4xx_hw_st { #define EMAC_M1_APP (0x08000000) #define EMAC_M1_RSVD (0x06000000) #define EMAC_M1_IST (0x01000000) +#define EMAC_M1_MF_1000GPCS (0x00C00000) #define EMAC_M1_MF_1000MBPS (0x00800000) /* 0's for 10MBPS */ #define EMAC_M1_MF_100MBPS (0x00400000) #define EMAC_M1_RFS_MASK (0x00380000) @@ -394,6 +395,8 @@ typedef struct emac_4xx_hw_st { #define EMAC_M1_MWSW (0x00007000) #define EMAC_M1_JUMBO_ENABLE (0x00000800) #define EMAC_M1_IPPA (0x000007c0) +#define EMAC_M1_IPPA_SET(id) (((id) & 0x1f) << 6) +#define EMAC_M1_IPPA_GET(id) (((id) >> 6) & 0x1f) #define EMAC_M1_OBCI_GT100 (0x00000020) #define EMAC_M1_OBCI_100 (0x00000018) #define EMAC_M1_OBCI_83 (0x00000010) |