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-rw-r--r--include/configs/balloon3.h10
-rw-r--r--include/configs/colibri_pxa270.h77
-rw-r--r--include/configs/flea3.h2
-rw-r--r--include/configs/mx35pdk.h2
-rw-r--r--include/configs/palmld.h1
-rw-r--r--include/configs/palmtc.h1
-rw-r--r--include/configs/palmtreo680.h1
-rw-r--r--include/configs/snowball.h1
-rw-r--r--include/configs/ti816x_evm.h1
-rw-r--r--include/configs/u8500_href.h1
-rw-r--r--include/configs/vexpress_common.h1
-rw-r--r--include/configs/vpac270.h3
-rw-r--r--include/configs/woodburn_common.h2
-rw-r--r--include/configs/zipitz2.h1
14 files changed, 45 insertions, 59 deletions
diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h
index 2f5a660..848a158 100644
--- a/include/configs/balloon3.h
+++ b/include/configs/balloon3.h
@@ -13,7 +13,7 @@
* High Level Board Configuration Options
*/
#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
-#define CONFIG_BALLOON3 1 /* Balloon3 board */
+#define CONFIG_BALLOON3 1 /* Balloon3 board */
/*
* Environment settings
@@ -84,18 +84,17 @@
/*
* Clock Configuration
*/
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
/*
* DRAM Map
*/
-#define CONFIG_NR_DRAM_BANKS 3 /* 2 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 3 /* 3 banks of DRAM */
#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
#define PHYS_SDRAM_2 0xb0000000 /* SDRAM Bank #2 */
#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
-#define PHYS_SDRAM_3 0x80000000 /* SDRAM Bank #2 */
+#define PHYS_SDRAM_3 0x80000000 /* SDRAM Bank #3 */
#define PHYS_SDRAM_3_SIZE 0x08000000 /* 128 MB */
#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
@@ -135,7 +134,7 @@
#define CONFIG_ENV_IS_IN_FLASH
#else
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_NOWHERE
#endif
#define CONFIG_SYS_MONITOR_BASE 0x000000
@@ -191,7 +190,6 @@
#define CONFIG_SYS_MDMRS_VAL 0x00220022
#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
#define CONFIG_SYS_SXCNFG_VAL 0x00000000
-#define CONFIG_SYS_MEM_BUF_IMP 0x0f
/*
* PCMCIA and CF Interfaces
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 08bd276..7fc364e 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -2,18 +2,22 @@
* Toradex Colibri PXA270 configuration file
*
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2015 Marcel Ziswiler <marcel@ziswiler.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_H
+#define __CONFIG_H
/*
* High Level Board Configuration Options
*/
#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
+#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_TEXT_BASE 0x0
+/* Avoid overwriting factory configuration block */
+#define CONFIG_BOARD_SIZE_LIMIT 0x40000
/*
* Environment settings
@@ -22,13 +26,13 @@
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOTCOMMAND \
- "if mmc init && fatload mmc 0 0xa0000000 uImage; then " \
+ "if fatload mmc 0 0xa0000000 uImage; then " \
"bootm 0xa0000000; " \
"fi; " \
"if usb reset && fatload usb 0 0xa0000000 uImage; then " \
"bootm 0xa0000000; " \
"fi; " \
- "bootm 0x80000;"
+ "bootm 0xc0000;"
#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
#define CONFIG_TIMESTAMP
#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
@@ -50,6 +54,8 @@
*/
#include <config_cmd_default.h>
+#undef CONFIG_CMD_LOADB /* Both together */
+#undef CONFIG_CMD_LOADS /* saves 10 KB */
#define CONFIG_CMD_NET
#define CONFIG_CMD_ENV
#undef CONFIG_CMD_IMLS
@@ -59,7 +65,6 @@
/*
* Networking Configuration
- * chip on the Voipac PXA270 board
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PING
@@ -82,7 +87,7 @@
*/
#define CONFIG_SYS_HUSH_PARSER 1
-#define CONFIG_SYS_LONGHELP
+#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
#else
@@ -96,7 +101,6 @@
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_AUTO_COMPLETE 1
-
/*
* Clock Configuration
*/
@@ -142,25 +146,24 @@
#else /* No flash */
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_NOWHERE
#endif
#define CONFIG_SYS_MONITOR_BASE 0x0
-#define CONFIG_SYS_MONITOR_LEN 0x80000
+#define CONFIG_SYS_MONITOR_LEN 0x40000
+/* Skip factory configuration block */
#define CONFIG_ENV_ADDR \
- (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+ (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000)
#define CONFIG_ENV_SIZE 0x40000
#define CONFIG_ENV_SECT_SIZE 0x40000
-#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
/*
* GPIO settings
*/
#define CONFIG_SYS_GPSR0_VAL 0x00000000
#define CONFIG_SYS_GPSR1_VAL 0x00020000
-#define CONFIG_SYS_GPSR2_VAL 0x0002C000
+#define CONFIG_SYS_GPSR2_VAL 0x0002c000
#define CONFIG_SYS_GPSR3_VAL 0x00000000
#define CONFIG_SYS_GPCR0_VAL 0x00000000
@@ -168,19 +171,19 @@
#define CONFIG_SYS_GPCR2_VAL 0x00000000
#define CONFIG_SYS_GPCR3_VAL 0x00000000
-#define CONFIG_SYS_GPDR0_VAL 0x08000000
-#define CONFIG_SYS_GPDR1_VAL 0x0002A981
-#define CONFIG_SYS_GPDR2_VAL 0x0202FC00
-#define CONFIG_SYS_GPDR3_VAL 0x00000000
+#define CONFIG_SYS_GPDR0_VAL 0xc8008000
+#define CONFIG_SYS_GPDR1_VAL 0xfc02a981
+#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff
+#define CONFIG_SYS_GPDR3_VAL 0x0061e804
-#define CONFIG_SYS_GAFR0_L_VAL 0x00100000
-#define CONFIG_SYS_GAFR0_U_VAL 0x00C00010
-#define CONFIG_SYS_GAFR1_L_VAL 0x999A901A
-#define CONFIG_SYS_GAFR1_U_VAL 0xAAA00008
-#define CONFIG_SYS_GAFR2_L_VAL 0xAAAAAAAA
-#define CONFIG_SYS_GAFR2_U_VAL 0x0109A000
-#define CONFIG_SYS_GAFR3_L_VAL 0x54000300
-#define CONFIG_SYS_GAFR3_U_VAL 0x00024001
+#define CONFIG_SYS_GAFR0_L_VAL 0x80100000
+#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010
+#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
+#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008
+#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
+#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002
+#define CONFIG_SYS_GAFR3_L_VAL 0x54000310
+#define CONFIG_SYS_GAFR3_U_VAL 0x00005401
#define CONFIG_SYS_PSSR_VAL 0x30
@@ -193,26 +196,26 @@
/*
* Memory settings
*/
-#define CONFIG_SYS_MSC0_VAL 0x000095f2
-#define CONFIG_SYS_MSC1_VAL 0x00007ff4
-#define CONFIG_SYS_MSC2_VAL 0x00000000
-#define CONFIG_SYS_MDCNFG_VAL 0x08000ac9
-#define CONFIG_SYS_MDREFR_VAL 0x2013e01e
-#define CONFIG_SYS_MDMRS_VAL 0x00320032
-#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
+#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2
+#define CONFIG_SYS_MSC1_VAL 0x9ee1f994
+#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1
+#define CONFIG_SYS_MDCNFG_VAL 0x090009c9
+#define CONFIG_SYS_MDREFR_VAL 0x2003a031
+#define CONFIG_SYS_MDMRS_VAL 0x00220022
+#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
#define CONFIG_SYS_SXCNFG_VAL 0x40044004
/*
* PCMCIA and CF Interfaces
*/
-#define CONFIG_SYS_MECR_VAL 0x00000001
-#define CONFIG_SYS_MCMEM0_VAL 0x00014307
+#define CONFIG_SYS_MECR_VAL 0x00000000
+#define CONFIG_SYS_MCMEM0_VAL 0x00028307
#define CONFIG_SYS_MCMEM1_VAL 0x00014307
-#define CONFIG_SYS_MCATT0_VAL 0x0001c787
+#define CONFIG_SYS_MCATT0_VAL 0x00038787
#define CONFIG_SYS_MCATT1_VAL 0x0001c787
-#define CONFIG_SYS_MCIO0_VAL 0x0001430f
+#define CONFIG_SYS_MCIO0_VAL 0x0002830f
#define CONFIG_SYS_MCIO1_VAL 0x0001430f
#include "pxa-common.h"
-#endif /* __CONFIG_H */
+#endif /* __CONFIG_H */
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index bf02829..edff0f5 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -124,8 +124,6 @@
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/*
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index a145f08..603d17c 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -146,8 +146,6 @@
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/*
diff --git a/include/configs/palmld.h b/include/configs/palmld.h
index 9480d8d..7dbc9ae 100644
--- a/include/configs/palmld.h
+++ b/include/configs/palmld.h
@@ -114,7 +114,6 @@
/*
* Clock Configuration
*/
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */
/*
diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h
index 8abce1b..75506b2 100644
--- a/include/configs/palmtc.h
+++ b/include/configs/palmtc.h
@@ -116,7 +116,6 @@
/*
* Clock Configuration
*/
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_CPUSPEED 0x161 /* 400MHz;L=1 M=3 T=1 */
/*
diff --git a/include/configs/palmtreo680.h b/include/configs/palmtreo680.h
index 6490be5..bd0f44b 100644
--- a/include/configs/palmtreo680.h
+++ b/include/configs/palmtreo680.h
@@ -117,7 +117,6 @@
/*
* Clock Configuration
*/
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */
/*
diff --git a/include/configs/snowball.h b/include/configs/snowball.h
index dacb560..126201c 100644
--- a/include/configs/snowball.h
+++ b/include/configs/snowball.h
@@ -175,7 +175,6 @@
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index 87a4efc..f69a559 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -58,7 +58,6 @@
+ sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot arg buffer size */
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
#define CONFIG_CMD_ASKEN
diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h
index 8d7970a..5302b1f 100644
--- a/include/configs/u8500_href.h
+++ b/include/configs/u8500_href.h
@@ -131,7 +131,6 @@
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
#define CONFIG_SYS_LOADS_BAUD_CHANGE
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index 2dea921..989e755 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -188,7 +188,6 @@
#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
/* Miscellaneous configurable options */
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x8000)
#define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000)
#define CONFIG_BOOTDELAY 2
diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
index 2fb91a8..887433b 100644
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -221,7 +221,7 @@
#else /* No flash */
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_NOWHERE
#endif
/*
@@ -297,7 +297,6 @@
#define CONFIG_SYS_MDMRS_VAL 0x00000000
#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
#define CONFIG_SYS_SXCNFG_VAL 0x40044004
-#define CONFIG_SYS_MEM_BUF_IMP 0x0f
/*
* PCMCIA and CF Interfaces
diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
index c7a17f7..8e1c7a4 100644
--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -146,8 +146,6 @@
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/*
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
index fe331bc..1dbbc15 100644
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -136,7 +136,6 @@ unsigned char zipitz2_spi_read(void);
/*
* Clock Configuration
*/
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
/*
generated by cgit v1.1 at 2024-11-06 04:59:48 +0000