diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpio/mxc_gpio.c | 51 | ||||
-rw-r--r-- | drivers/gpio/s5p_gpio.c | 64 | ||||
-rw-r--r-- | drivers/mmc/Makefile | 1 | ||||
-rw-r--r-- | drivers/mmc/omap3_mmc.c | 570 | ||||
-rw-r--r-- | drivers/mmc/omap3_mmc.h | 233 | ||||
-rw-r--r-- | drivers/mmc/s5p_mmc.c | 15 | ||||
-rw-r--r-- | drivers/net/davinci_emac.c | 4 | ||||
-rw-r--r-- | drivers/spi/mxc_spi.c | 8 | ||||
-rw-r--r-- | drivers/usb/host/ehci-hcd.c | 1 | ||||
-rw-r--r-- | drivers/usb/host/ehci.h | 4 | ||||
-rw-r--r-- | drivers/video/Makefile | 2 | ||||
-rw-r--r-- | drivers/video/omap3_dss.c | 131 |
12 files changed, 253 insertions, 831 deletions
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 6efbb02..a7f36b2 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -2,6 +2,9 @@ * Copyright (C) 2009 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de> * + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, <sbabic@denx.de> + * * See file CREDITS for list of people who contributed to this * project. * @@ -22,10 +25,16 @@ */ #include <common.h> #include <asm/arch/imx-regs.h> +#include <asm/gpio.h> #include <asm/io.h> -#include <mxc_gpio.h> #include <errno.h> +enum mxc_gpio_direction { + MXC_GPIO_DIRECTION_IN, + MXC_GPIO_DIRECTION_OUT, +}; + + /* GPIO port description */ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, @@ -41,7 +50,8 @@ static unsigned long gpio_ports[] = { #endif }; -int mxc_gpio_direction(unsigned int gpio, enum mxc_gpio_direction direction) +static int mxc_gpio_direction(unsigned int gpio, + enum mxc_gpio_direction direction) { unsigned int port = gpio >> 5; struct gpio_regs *regs; @@ -68,7 +78,7 @@ int mxc_gpio_direction(unsigned int gpio, enum mxc_gpio_direction direction) return 0; } -void mxc_gpio_set(unsigned int gpio, unsigned int value) +void gpio_set_value(int gpio, int value) { unsigned int port = gpio >> 5; struct gpio_regs *regs; @@ -89,7 +99,7 @@ void mxc_gpio_set(unsigned int gpio, unsigned int value) writel(l, ®s->gpio_dr); } -int mxc_gpio_get(unsigned int gpio) +int gpio_get_value(int gpio) { unsigned int port = gpio >> 5; struct gpio_regs *regs; @@ -106,3 +116,36 @@ int mxc_gpio_get(unsigned int gpio) return l; } + +int gpio_request(int gp, const char *label) +{ + unsigned int port = gp >> 5; + if (port >= ARRAY_SIZE(gpio_ports)) + return -EINVAL; + return 0; +} + +void gpio_free(int gp) +{ +} + +void gpio_toggle_value(int gp) +{ + gpio_set_value(gp, !gpio_get_value(gp)); +} + +int gpio_direction_input(int gp) +{ + return mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_IN); +} + +int gpio_direction_output(int gp, int value) +{ + int ret = mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_OUT); + + if (ret < 0) + return ret; + + gpio_set_value(gp, value); + return 0; +} diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index a1bcddc..1edf9a2 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -36,7 +36,7 @@ #define RATE_MASK(x) (0x1 << (x + 16)) #define RATE_SET(x) (0x1 << (x + 16)) -void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg) +void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg) { unsigned int value; @@ -46,11 +46,11 @@ void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg) writel(value, &bank->con); } -void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en) +void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en) { unsigned int value; - gpio_cfg_pin(bank, gpio, GPIO_OUTPUT); + s5p_gpio_cfg_pin(bank, gpio, GPIO_OUTPUT); value = readl(&bank->dat); value &= ~DAT_MASK(gpio); @@ -59,12 +59,12 @@ void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en) writel(value, &bank->dat); } -void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio) +void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio) { - gpio_cfg_pin(bank, gpio, GPIO_INPUT); + s5p_gpio_cfg_pin(bank, gpio, GPIO_INPUT); } -void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en) +void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en) { unsigned int value; @@ -75,7 +75,7 @@ void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en) writel(value, &bank->dat); } -unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio) +unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio) { unsigned int value; @@ -83,7 +83,7 @@ unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio) return !!(value & DAT_MASK(gpio)); } -void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode) +void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode) { unsigned int value; @@ -102,7 +102,7 @@ void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode) writel(value, &bank->pull); } -void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode) +void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode) { unsigned int value; @@ -123,7 +123,7 @@ void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode) writel(value, &bank->drv); } -void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) +void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) { unsigned int value; @@ -141,3 +141,47 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) writel(value, &bank->drv); } + +struct s5p_gpio_bank *s5p_gpio_get_bank(int nr) +{ + int bank = nr / GPIO_PER_BANK; + bank *= sizeof(struct s5p_gpio_bank); + + return (struct s5p_gpio_bank *) (s5p_gpio_base(nr) + bank); +} + +int s5p_gpio_get_pin(int nr) +{ + return nr % GPIO_PER_BANK; +} + +int gpio_request(int gpio, const char *label) +{ + return 0; +} + +int gpio_direction_input(int nr) +{ + s5p_gpio_direction_input(s5p_gpio_get_bank(nr), + s5p_gpio_get_pin(nr)); + return 0; +} + +int gpio_direction_output(int nr, int value) +{ + s5p_gpio_direction_output(s5p_gpio_get_bank(nr), + s5p_gpio_get_pin(nr), value); + return 0; +} + +int gpio_get_value(int nr) +{ + return (int) s5p_gpio_get_value(s5p_gpio_get_bank(nr), + s5p_gpio_get_pin(nr)); +} + +void gpio_set_value(int nr, int value) +{ + s5p_gpio_set_value(s5p_gpio_get_bank(nr), + s5p_gpio_get_pin(nr), value); +} diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 3968c14..e5ca121 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -35,7 +35,6 @@ COBJS-$(CONFIG_MMC_SPI) += mmc_spi.o COBJS-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o COBJS-$(CONFIG_MV_SDHCI) += mv_sdhci.o COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o -COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c deleted file mode 100644 index 15d41e5..0000000 --- a/drivers/mmc/omap3_mmc.c +++ /dev/null @@ -1,570 +0,0 @@ -/* - * (C) Copyright 2008 - * Texas Instruments, <www.ti.com> - * Syed Mohammed Khasim <khasim@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation's version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <fat.h> -#include <mmc.h> -#include <part.h> -#include <i2c.h> -#include <twl4030.h> -#include <asm/io.h> - -#include "omap3_mmc.h" - -static const unsigned short mmc_transspeed_val[15][4] = { - {CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)}, - {CLKD(12, 1), CLKD(12, 10), CLKD(12, 100), CLKD(12, 1000)}, - {CLKD(13, 1), CLKD(13, 10), CLKD(13, 100), CLKD(13, 1000)}, - {CLKD(15, 1), CLKD(15, 10), CLKD(15, 100), CLKD(15, 1000)}, - {CLKD(20, 1), CLKD(20, 10), CLKD(20, 100), CLKD(20, 1000)}, - {CLKD(26, 1), CLKD(26, 10), CLKD(26, 100), CLKD(26, 1000)}, - {CLKD(30, 1), CLKD(30, 10), CLKD(30, 100), CLKD(30, 1000)}, - {CLKD(35, 1), CLKD(35, 10), CLKD(35, 100), CLKD(35, 1000)}, - {CLKD(40, 1), CLKD(40, 10), CLKD(40, 100), CLKD(40, 1000)}, - {CLKD(45, 1), CLKD(45, 10), CLKD(45, 100), CLKD(45, 1000)}, - {CLKD(52, 1), CLKD(52, 10), CLKD(52, 100), CLKD(52, 1000)}, - {CLKD(55, 1), CLKD(55, 10), CLKD(55, 100), CLKD(55, 1000)}, - {CLKD(60, 1), CLKD(60, 10), CLKD(60, 100), CLKD(60, 1000)}, - {CLKD(70, 1), CLKD(70, 10), CLKD(70, 100), CLKD(70, 1000)}, - {CLKD(80, 1), CLKD(80, 10), CLKD(80, 100), CLKD(80, 1000)} -}; - -static mmc_card_data cur_card_data; -static block_dev_desc_t mmc_blk_dev; -static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE; - -int mmc_set_dev(int dev_num) -{ - switch (dev_num) { - case 1: - mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE; - break; - case 2: - mmc_base = (hsmmc_t *)OMAP_HSMMC2_BASE; - break; - case 3: - mmc_base = (hsmmc_t *)OMAP_HSMMC3_BASE; - break; - default: - mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE; - return 1; - } - - return 0; -} - -block_dev_desc_t *mmc_get_dev(int dev) -{ - return (block_dev_desc_t *) &mmc_blk_dev; -} - -static unsigned char mmc_board_init(void) -{ -#if defined(CONFIG_TWL4030_POWER) - twl4030_power_mmc_init(); -#endif - -#if defined(CONFIG_OMAP34XX) - t2_t *t2_base = (t2_t *)T2_BASE; - struct prcm *prcm_base = (struct prcm *)PRCM_BASE; - - writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | - PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, - &t2_base->pbias_lite); - - writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, - &t2_base->devconf0); - - writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL, - &t2_base->devconf1); - - writel(readl(&prcm_base->fclken1_core) | - EN_MMC1 | EN_MMC2 | EN_MMC3, - &prcm_base->fclken1_core); - - writel(readl(&prcm_base->iclken1_core) | - EN_MMC1 | EN_MMC2 | EN_MMC3, - &prcm_base->iclken1_core); -#endif - -/* TODO add appropriate OMAP4 init */ - - return 1; -} - -static void mmc_init_stream(void) -{ - writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con); - - writel(MMC_CMD0, &mmc_base->cmd); - while (!(readl(&mmc_base->stat) & CC_MASK)); - - writel(CC_MASK, &mmc_base->stat); - - writel(MMC_CMD0, &mmc_base->cmd); - while (!(readl(&mmc_base->stat) & CC_MASK)); - - writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con); -} - -static unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div) -{ - unsigned int val; - - mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK), - (ICE_STOP | DTO_15THDTO | CEN_DISABLE)); - - switch (iclk) { - case CLK_INITSEQ: - val = MMC_INIT_SEQ_CLK / 2; - break; - case CLK_400KHZ: - val = MMC_400kHz_CLK; - break; - case CLK_MISC: - val = clk_div; - break; - default: - return 0; - } - mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK, - (val << CLKD_OFFSET) | ICE_OSCILLATE); - - while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY); - - writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); - return 1; -} - -static unsigned char mmc_init_setup(void) -{ - unsigned int reg_val; - - mmc_board_init(); - - writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, - &mmc_base->sysconfig); - while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0); - - writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl); - while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0); - - writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl); - writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP, - &mmc_base->capa); - - reg_val = readl(&mmc_base->con) & RESERVED_MASK; - - writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH | - MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK | - HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con); - - mmc_clock_config(CLK_INITSEQ, 0); - writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl); - - writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE | - IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC, - &mmc_base->ie); - - mmc_init_stream(); - return 1; -} - -static unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg, - unsigned int *response) -{ - unsigned int mmc_stat; - - while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS); - - writel(BLEN_512BYTESLEN | NBLK_STPCNT, &mmc_base->blk); - writel(0xFFFFFFFF, &mmc_base->stat); - writel(arg, &mmc_base->arg); - writel(cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK | - MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE, - &mmc_base->cmd); - - while (1) { - do { - mmc_stat = readl(&mmc_base->stat); - } while (mmc_stat == 0); - - if ((mmc_stat & ERRI_MASK) != 0) - return (unsigned char) mmc_stat; - - if (mmc_stat & CC_MASK) { - writel(CC_MASK, &mmc_base->stat); - response[0] = readl(&mmc_base->rsp10); - if ((cmd & RSP_TYPE_MASK) == RSP_TYPE_LGHT136) { - response[1] = readl(&mmc_base->rsp32); - response[2] = readl(&mmc_base->rsp54); - response[3] = readl(&mmc_base->rsp76); - } - break; - } - } - return 1; -} - -static unsigned char mmc_read_data(unsigned int *output_buf) -{ - unsigned int mmc_stat; - unsigned int read_count = 0; - - /* - * Start Polled Read - */ - while (1) { - do { - mmc_stat = readl(&mmc_base->stat); - } while (mmc_stat == 0); - - if ((mmc_stat & ERRI_MASK) != 0) - return (unsigned char) mmc_stat; - - if (mmc_stat & BRR_MASK) { - unsigned int k; - - writel(readl(&mmc_base->stat) | BRR_MASK, - &mmc_base->stat); - for (k = 0; k < MMCSD_SECTOR_SIZE / 4; k++) { - *output_buf = readl(&mmc_base->data); - output_buf++; - read_count += 4; - } - } - - if (mmc_stat & BWR_MASK) - writel(readl(&mmc_base->stat) | BWR_MASK, - &mmc_base->stat); - - if (mmc_stat & TC_MASK) { - writel(readl(&mmc_base->stat) | TC_MASK, - &mmc_base->stat); - break; - } - } - return 1; -} - -static unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur) -{ - unsigned char err; - unsigned int argument = 0; - unsigned int ocr_value, ocr_recvd, ret_cmd41, hcs_val; - unsigned short retry_cnt = 2000; - mmc_resp_t mmc_resp; - - /* Set to Initialization Clock */ - err = mmc_clock_config(CLK_400KHZ, 0); - if (err != 1) - return err; - - mmc_card_cur->RCA = MMC_RELATIVE_CARD_ADDRESS; - argument = 0x00000000; - - ocr_value = (0x1FF << 15); - err = mmc_send_cmd(MMC_CMD0, argument, mmc_resp.resp); - if (err != 1) - return err; - - argument = SD_CMD8_CHECK_PATTERN | SD_CMD8_2_7_3_6_V_RANGE; - err = mmc_send_cmd(MMC_SDCMD8, argument, mmc_resp.resp); - hcs_val = (err == 1) ? - MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR : - MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE; - - argument = 0x0000 << 16; - err = mmc_send_cmd(MMC_CMD55, argument, mmc_resp.resp); - if (err == 1) { - mmc_card_cur->card_type = SD_CARD; - ocr_value |= hcs_val; - ret_cmd41 = MMC_ACMD41; - } else { - mmc_card_cur->card_type = MMC_CARD; - ocr_value |= MMC_OCR_REG_ACCESS_MODE_SECTOR; - ret_cmd41 = MMC_CMD1; - writel(readl(&mmc_base->con) & ~OD, &mmc_base->con); - writel(readl(&mmc_base->con) | OPENDRAIN, &mmc_base->con); - } - - argument = ocr_value; - err = mmc_send_cmd(ret_cmd41, argument, mmc_resp.resp); - if (err != 1) - return err; - - ocr_recvd = mmc_resp.r3.ocr; - - while (!(ocr_recvd & (0x1 << 31)) && (retry_cnt > 0)) { - retry_cnt--; - if (mmc_card_cur->card_type == SD_CARD) { - argument = 0x0000 << 16; - err = mmc_send_cmd(MMC_CMD55, argument, mmc_resp.resp); - } - - argument = ocr_value; - err = mmc_send_cmd(ret_cmd41, argument, mmc_resp.resp); - if (err != 1) - return err; - ocr_recvd = mmc_resp.r3.ocr; - } - - if (!(ocr_recvd & (0x1 << 31))) - return 0; - - if (mmc_card_cur->card_type == MMC_CARD) { - if ((ocr_recvd & MMC_OCR_REG_ACCESS_MODE_MASK) == - MMC_OCR_REG_ACCESS_MODE_SECTOR) { - mmc_card_cur->mode = SECTOR_MODE; - } else { - mmc_card_cur->mode = BYTE_MODE; - } - - ocr_recvd &= ~MMC_OCR_REG_ACCESS_MODE_MASK; - } else { - if ((ocr_recvd & MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK) - == MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR) { - mmc_card_cur->mode = SECTOR_MODE; - } else { - mmc_card_cur->mode = BYTE_MODE; - } - ocr_recvd &= ~MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK; - } - - ocr_recvd &= ~(0x1 << 31); - if (!(ocr_recvd & ocr_value)) - return 0; - - err = mmc_send_cmd(MMC_CMD2, argument, mmc_resp.resp); - if (err != 1) - return err; - - if (mmc_card_cur->card_type == MMC_CARD) { - argument = mmc_card_cur->RCA << 16; - err = mmc_send_cmd(MMC_CMD3, argument, mmc_resp.resp); - if (err != 1) - return err; - } else { - argument = 0x00000000; - err = mmc_send_cmd(MMC_SDCMD3, argument, mmc_resp.resp); - if (err != 1) - return err; - - mmc_card_cur->RCA = mmc_resp.r6.newpublishedrca; - } - - writel(readl(&mmc_base->con) & ~OD, &mmc_base->con); - writel(readl(&mmc_base->con) | NOOPENDRAIN, &mmc_base->con); - return 1; -} - -static unsigned char mmc_read_cardsize(mmc_card_data *mmc_dev_data, - mmc_csd_reg_t *cur_csd) -{ - mmc_extended_csd_reg_t ext_csd; - unsigned int size, count, blk_len, blk_no, card_size, argument; - unsigned char err; - unsigned int resp[4]; - - if (mmc_dev_data->mode == SECTOR_MODE) { - if (mmc_dev_data->card_type == SD_CARD) { - card_size = - (((mmc_sd2_csd_reg_t *) cur_csd)-> - c_size_lsb & MMC_SD2_CSD_C_SIZE_LSB_MASK) | - ((((mmc_sd2_csd_reg_t *) cur_csd)-> - c_size_msb & MMC_SD2_CSD_C_SIZE_MSB_MASK) - << MMC_SD2_CSD_C_SIZE_MSB_OFFSET); - mmc_dev_data->size = card_size * 1024; - if (mmc_dev_data->size == 0) - return 0; - } else { - argument = 0x00000000; - err = mmc_send_cmd(MMC_CMD8, argument, resp); - if (err != 1) - return err; - err = mmc_read_data((unsigned int *) &ext_csd); - if (err != 1) - return err; - mmc_dev_data->size = ext_csd.sectorcount; - - if (mmc_dev_data->size == 0) - mmc_dev_data->size = 8388608; - } - } else { - if (cur_csd->c_size_mult >= 8) - return 0; - - if (cur_csd->read_bl_len >= 12) - return 0; - - /* Compute size */ - count = 1 << (cur_csd->c_size_mult + 2); - card_size = (cur_csd->c_size_lsb & MMC_CSD_C_SIZE_LSB_MASK) | - ((cur_csd->c_size_msb & MMC_CSD_C_SIZE_MSB_MASK) - << MMC_CSD_C_SIZE_MSB_OFFSET); - blk_no = (card_size + 1) * count; - blk_len = 1 << cur_csd->read_bl_len; - size = blk_no * blk_len; - mmc_dev_data->size = size / MMCSD_SECTOR_SIZE; - if (mmc_dev_data->size == 0) - return 0; - } - return 1; -} - -static unsigned long mmc_bread(int dev_num, unsigned long blknr, - lbaint_t blkcnt, void *dst) -{ - unsigned char err; - unsigned int argument; - unsigned int resp[4]; - unsigned int *output_buf = dst; - unsigned int sec_inc_val; - lbaint_t i; - - if (blkcnt == 0) - return 0; - - if (cur_card_data.mode == SECTOR_MODE) { - argument = blknr; - sec_inc_val = 1; - } else { - argument = blknr * MMCSD_SECTOR_SIZE; - sec_inc_val = MMCSD_SECTOR_SIZE; - } - - for (i = 0; i < blkcnt; i++) { - err = mmc_send_cmd(MMC_CMD17, argument, resp); - if (err != 1) { - printf("mmc: CMD17 failed, status = %08x\n", err); - break; - } - - err = mmc_read_data(output_buf); - if (err != 1) { - printf("mmc: read failed, status = %08x\n", err); - break; - } - - output_buf += (MMCSD_SECTOR_SIZE / 4); - argument += sec_inc_val; - } - - return i; -} - -static unsigned char configure_mmc(mmc_card_data *mmc_card_cur) -{ - unsigned char ret_val; - unsigned int argument; - unsigned int trans_clk, trans_fact, trans_unit, retries = 2; - unsigned char trans_speed; - mmc_resp_t mmc_resp; - - ret_val = mmc_init_setup(); - - if (ret_val != 1) - return ret_val; - - do { - ret_val = mmc_detect_card(mmc_card_cur); - retries--; - } while ((retries > 0) && (ret_val != 1)); - - argument = mmc_card_cur->RCA << 16; - ret_val = mmc_send_cmd(MMC_CMD9, argument, mmc_resp.resp); - if (ret_val != 1) - return ret_val; - - if (mmc_card_cur->card_type == MMC_CARD) - mmc_card_cur->version = mmc_resp.Card_CSD.spec_vers; - - trans_speed = mmc_resp.Card_CSD.tran_speed; - - ret_val = mmc_send_cmd(MMC_CMD4, MMC_DSR_DEFAULT << 16, mmc_resp.resp); - if (ret_val != 1) - return ret_val; - - trans_unit = trans_speed & MMC_CSD_TRAN_SPEED_UNIT_MASK; - trans_fact = trans_speed & MMC_CSD_TRAN_SPEED_FACTOR_MASK; - - if (trans_unit > MMC_CSD_TRAN_SPEED_UNIT_100MHZ) - return 0; - - if ((trans_fact < MMC_CSD_TRAN_SPEED_FACTOR_1_0) || - (trans_fact > MMC_CSD_TRAN_SPEED_FACTOR_8_0)) - return 0; - - trans_unit >>= 0; - trans_fact >>= 3; - - trans_clk = mmc_transspeed_val[trans_fact - 1][trans_unit] * 2; - ret_val = mmc_clock_config(CLK_MISC, trans_clk); - - if (ret_val != 1) - return ret_val; - - argument = mmc_card_cur->RCA << 16; - ret_val = mmc_send_cmd(MMC_CMD7_SELECT, argument, mmc_resp.resp); - if (ret_val != 1) - return ret_val; - - /* Configure the block length to 512 bytes */ - argument = MMCSD_SECTOR_SIZE; - ret_val = mmc_send_cmd(MMC_CMD16, argument, mmc_resp.resp); - if (ret_val != 1) - return ret_val; - - /* get the card size in sectors */ - ret_val = mmc_read_cardsize(mmc_card_cur, &mmc_resp.Card_CSD); - if (ret_val != 1) - return ret_val; - - return 1; -} - -int mmc_legacy_init(int dev) -{ - if (mmc_set_dev(dev) != 0) - return 1; - - if (configure_mmc(&cur_card_data) != 1) - return 1; - - mmc_blk_dev.if_type = IF_TYPE_MMC; - mmc_blk_dev.part_type = PART_TYPE_DOS; - mmc_blk_dev.dev = 0; - mmc_blk_dev.lun = 0; - mmc_blk_dev.type = 0; - - /* FIXME fill in the correct size (is set to 32MByte) */ - mmc_blk_dev.blksz = MMCSD_SECTOR_SIZE; - mmc_blk_dev.lba = 0x10000; - mmc_blk_dev.removable = 0; - mmc_blk_dev.block_read = mmc_bread; - - fat_register_device(&mmc_blk_dev, 1); - return 0; -} diff --git a/drivers/mmc/omap3_mmc.h b/drivers/mmc/omap3_mmc.h deleted file mode 100644 index e4d263c..0000000 --- a/drivers/mmc/omap3_mmc.h +++ /dev/null @@ -1,233 +0,0 @@ -/* - * (C) Copyright 2008 - * Texas Instruments, <www.ti.com> - * Syed Mohammed Khasim <khasim@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation's version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef MMC_H -#define MMC_H - -#include <asm/arch/mmc_host_def.h> - -/* Responses */ -#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK) -#define RSP_TYPE_R1 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK) -#define RSP_TYPE_R1B (RSP_TYPE_LGHT48B | CCCE_CHECK | CICE_CHECK) -#define RSP_TYPE_R2 (RSP_TYPE_LGHT136 | CCCE_CHECK | CICE_NOCHECK) -#define RSP_TYPE_R3 (RSP_TYPE_LGHT48 | CCCE_NOCHECK | CICE_NOCHECK) -#define RSP_TYPE_R4 (RSP_TYPE_LGHT48 | CCCE_NOCHECK | CICE_NOCHECK) -#define RSP_TYPE_R5 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK) -#define RSP_TYPE_R6 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK) -#define RSP_TYPE_R7 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK) - -/* All supported commands */ -#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD1 (INDEX(1) | RSP_TYPE_R3 | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD2 (INDEX(2) | RSP_TYPE_R2 | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD3 (INDEX(3) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) -#define MMC_SDCMD3 (INDEX(3) | RSP_TYPE_R6 | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD4 (INDEX(4) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD6 (INDEX(6) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD7_SELECT (INDEX(7) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD7_DESELECT (INDEX(7)| RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD8 (INDEX(8) | RSP_TYPE_R1 | DP_DATA | DDIR_READ) -#define MMC_SDCMD8 (INDEX(8) | RSP_TYPE_R7 | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD9 (INDEX(9) | RSP_TYPE_R2 | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD12 (INDEX(12) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD13 (INDEX(13) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD15 (INDEX(15) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD16 (INDEX(16) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) -#define MMC_CMD17 (INDEX(17) | RSP_TYPE_R1 | DP_DATA | DDIR_READ) -#define MMC_CMD24 (INDEX(24) | RSP_TYPE_R1 | DP_DATA | DDIR_WRITE) -#define MMC_ACMD6 (INDEX(6) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) -#define MMC_ACMD41 (INDEX(41) | RSP_TYPE_R3 | DP_NO_DATA | DDIR_WRITE) -#define MMC_ACMD51 (INDEX(51) | RSP_TYPE_R1 | DP_DATA | DDIR_READ) -#define MMC_CMD55 (INDEX(55) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) - -#define MMC_AC_CMD_RCA_MASK (unsigned int)(0xFFFF << 16) -#define MMC_BC_CMD_DSR_MASK (unsigned int)(0xFFFF << 16) -#define MMC_DSR_DEFAULT 0x0404 -#define SD_CMD8_CHECK_PATTERN 0xAA -#define SD_CMD8_2_7_3_6_V_RANGE (0x01 << 8) - -/* Clock Configurations and Macros */ - -#define MMC_CLOCK_REFERENCE 96 -#define MMC_RELATIVE_CARD_ADDRESS 0x1234 -#define MMC_INIT_SEQ_CLK (MMC_CLOCK_REFERENCE * 1000 / 80) -#define MMC_400kHz_CLK (MMC_CLOCK_REFERENCE * 1000 / 400) -#define CLKDR(r, f, u) ((((r)*100) / ((f)*(u))) + 1) -#define CLKD(f, u) (CLKDR(MMC_CLOCK_REFERENCE, f, u)) - -#define MMC_OCR_REG_ACCESS_MODE_MASK (0x3 << 29) -#define MMC_OCR_REG_ACCESS_MODE_BYTE (0x0 << 29) -#define MMC_OCR_REG_ACCESS_MODE_SECTOR (0x2 << 29) - -#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK (0x1 << 30) -#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE (0x0 << 30) -#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR (0x1 << 30) - -#define MMC_SD2_CSD_C_SIZE_LSB_MASK 0xFFFF -#define MMC_SD2_CSD_C_SIZE_MSB_MASK 0x003F -#define MMC_SD2_CSD_C_SIZE_MSB_OFFSET 16 -#define MMC_CSD_C_SIZE_LSB_MASK 0x0003 -#define MMC_CSD_C_SIZE_MSB_MASK 0x03FF -#define MMC_CSD_C_SIZE_MSB_OFFSET 2 - -#define MMC_CSD_TRAN_SPEED_UNIT_MASK (0x07 << 0) -#define MMC_CSD_TRAN_SPEED_FACTOR_MASK (0x0F << 3) -#define MMC_CSD_TRAN_SPEED_UNIT_100MHZ (0x3 << 0) -#define MMC_CSD_TRAN_SPEED_FACTOR_1_0 (0x01 << 3) -#define MMC_CSD_TRAN_SPEED_FACTOR_8_0 (0x0F << 3) - -typedef struct { - unsigned not_used:1; - unsigned crc:7; - unsigned ecc:2; - unsigned file_format:2; - unsigned tmp_write_protect:1; - unsigned perm_write_protect:1; - unsigned copy:1; - unsigned file_format_grp:1; - unsigned content_prot_app:1; - unsigned reserved_1:4; - unsigned write_bl_partial:1; - unsigned write_bl_len:4; - unsigned r2w_factor:3; - unsigned default_ecc:2; - unsigned wp_grp_enable:1; - unsigned wp_grp_size:5; - unsigned erase_grp_mult:5; - unsigned erase_grp_size:5; - unsigned c_size_mult:3; - unsigned vdd_w_curr_max:3; - unsigned vdd_w_curr_min:3; - unsigned vdd_r_curr_max:3; - unsigned vdd_r_curr_min:3; - unsigned c_size_lsb:2; - unsigned c_size_msb:10; - unsigned reserved_2:2; - unsigned dsr_imp:1; - unsigned read_blk_misalign:1; - unsigned write_blk_misalign:1; - unsigned read_bl_partial:1; - unsigned read_bl_len:4; - unsigned ccc:12; - unsigned tran_speed:8; - unsigned nsac:8; - unsigned taac:8; - unsigned reserved_3:2; - unsigned spec_vers:4; - unsigned csd_structure:2; -} mmc_csd_reg_t; - -/* csd for sd2.0 */ -typedef struct { - unsigned not_used:1; - unsigned crc:7; - unsigned reserved_1:2; - unsigned file_format:2; - unsigned tmp_write_protect:1; - unsigned perm_write_protect:1; - unsigned copy:1; - unsigned file_format_grp:1; - unsigned reserved_2:5; - unsigned write_bl_partial:1; - unsigned write_bl_len:4; - unsigned r2w_factor:3; - unsigned reserved_3:2; - unsigned wp_grp_enable:1; - unsigned wp_grp_size:7; - unsigned sector_size:7; - unsigned erase_blk_len:1; - unsigned reserved_4:1; - unsigned c_size_lsb:16; - unsigned c_size_msb:6; - unsigned reserved_5:6; - unsigned dsr_imp:1; - unsigned read_blk_misalign:1; - unsigned write_blk_misalign:1; - unsigned read_bl_partial:1; - unsigned read_bl_len:4; - unsigned ccc:12; - unsigned tran_speed:8; - unsigned nsac:8; - unsigned taac:8; - unsigned reserved_6:6; - unsigned csd_structure:2; -} mmc_sd2_csd_reg_t; - -/* extended csd - 512 bytes long */ -typedef struct { - unsigned char reserved_1[181]; - unsigned char erasedmemorycontent; - unsigned char reserved_2; - unsigned char buswidthmode; - unsigned char reserved_3; - unsigned char highspeedinterfacetiming; - unsigned char reserved_4; - unsigned char powerclass; - unsigned char reserved_5; - unsigned char commandsetrevision; - unsigned char reserved_6; - unsigned char commandset; - unsigned char extendedcsdrevision; - unsigned char reserved_7; - unsigned char csdstructureversion; - unsigned char reserved_8; - unsigned char cardtype; - unsigned char reserved_9[3]; - unsigned char powerclass_52mhz_1_95v; - unsigned char powerclass_26mhz_1_95v; - unsigned char powerclass_52mhz_3_6v; - unsigned char powerclass_26mhz_3_6v; - unsigned char reserved_10; - unsigned char minreadperf_4b_26mhz; - unsigned char minwriteperf_4b_26mhz; - unsigned char minreadperf_8b_26mhz_4b_52mhz; - unsigned char minwriteperf_8b_26mhz_4b_52mhz; - unsigned char minreadperf_8b_52mhz; - unsigned char minwriteperf_8b_52mhz; - unsigned char reserved_11; - unsigned int sectorcount; - unsigned char reserved_12[288]; - unsigned char supportedcommandsets; - unsigned char reserved_13[7]; -} mmc_extended_csd_reg_t; - -/* mmc sd responce */ -typedef struct { - unsigned int ocr; -} mmc_resp_r3; - -typedef struct { - unsigned short cardstatus; - unsigned short newpublishedrca; -} mmc_resp_r6; - -typedef union { - unsigned int resp[4]; - mmc_resp_r3 r3; - mmc_resp_r6 r6; - mmc_csd_reg_t Card_CSD; -} mmc_resp_t; - -#endif /* MMC_H */ diff --git a/drivers/mmc/s5p_mmc.c b/drivers/mmc/s5p_mmc.c index f136813..7786ecf 100644 --- a/drivers/mmc/s5p_mmc.c +++ b/drivers/mmc/s5p_mmc.c @@ -232,9 +232,15 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, __func__, mask); return -1; } else if (mask & (1 << 3)) { - /* DMA Interrupt */ + /* + * DMA Interrupt, restart the transfer where + * it was interrupted. + */ + unsigned int address = readl(&host->reg->sysad); + debug("DMA end\n"); - break; + writel((1 << 3), &host->reg->norintsts); + writel(address, &host->reg->sysad); } else if (mask & (1 << 1)) { /* Transfer Complete */ debug("r/w is done\n"); @@ -425,12 +431,13 @@ static int mmc_core_init(struct mmc *mmc) * NORMAL Interrupt Status Enable Register init * [5] ENSTABUFRDRDY : Buffer Read Ready Status Enable * [4] ENSTABUFWTRDY : Buffer write Ready Status Enable + * [3] ENSTADMAINT : DMA Interrupt Status Enable * [1] ENSTASTANSCMPLT : Transfre Complete Status Enable * [0] ENSTACMDCMPLT : Command Complete Status Enable - */ + */ mask = readl(&host->reg->norintstsen); mask &= ~(0xffff); - mask |= (1 << 5) | (1 << 4) | (1 << 1) | (1 << 0); + mask |= (1 << 5) | (1 << 4) | (1 << 3) | (1 << 1) | (1 << 0); writel(mask, &host->reg->norintstsen); /* diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 66c0d13..c0b8929 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -457,7 +457,7 @@ static void davinci_eth_ch_teardown(int ch) if (ch == EMAC_CH_TX) { /* Init TX channel teardown */ - writel(1, &adap_emac->TXTEARDOWN); + writel(0, &adap_emac->TXTEARDOWN); do { /* * Wait here for Tx teardown completion interrupt to @@ -476,7 +476,7 @@ static void davinci_eth_ch_teardown(int ch) writel(0, &adap_emac->TX0HDP); } else { /* Init RX channel teardown */ - writel(1, &adap_emac->RXTEARDOWN); + writel(0, &adap_emac->RXTEARDOWN); do { /* * Wait here for Rx teardown completion interrupt to diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 81381d9..2fa7486 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -23,7 +23,7 @@ #include <spi.h> #include <asm/errno.h> #include <asm/io.h> -#include <mxc_gpio.h> +#include <asm/gpio.h> #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> @@ -145,14 +145,14 @@ void spi_cs_activate(struct spi_slave *slave) { struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); if (mxcs->gpio > 0) - mxc_gpio_set(mxcs->gpio, mxcs->ss_pol); + gpio_set_value(mxcs->gpio, mxcs->ss_pol); } void spi_cs_deactivate(struct spi_slave *slave) { struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); if (mxcs->gpio > 0) - mxc_gpio_set(mxcs->gpio, + gpio_set_value(mxcs->gpio, !(mxcs->ss_pol)); } @@ -468,7 +468,7 @@ static int decode_cs(struct mxc_spi_slave *mxcs, unsigned int cs) if (cs > 3) { mxcs->gpio = cs >> 8; cs &= 3; - ret = mxc_gpio_direction(mxcs->gpio, OUT); + ret = gpio_direction_output(mxcs->gpio, 0); if (ret) { printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio); return -EINVAL; diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 70c02c9..2197119 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -461,7 +461,6 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, /* Check that the TD processing happened */ if (token & 0x80) { printf("EHCI timed out on TD - token=%#x\n", token); - goto fail; } /* Disable async schedule. */ diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index 945ab64..3d0ad0c 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -55,7 +55,7 @@ struct ehci_hccr { #define HCS_N_PORTS(p) (((p) >> 0) & 0xf) uint32_t cr_hccparams; uint8_t cr_hcsp_portrt[8]; -} __attribute__ ((packed)); +} __attribute__ ((packed, aligned(4))); struct ehci_hcor { uint32_t or_usbcmd; @@ -85,7 +85,7 @@ struct ehci_hcor { #define FLAG_CF (1 << 0) /* true: we'll support "high speed" */ uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS]; uint32_t or_systune; -} __attribute__ ((packed)); +} __attribute__ ((packed, aligned(4))); #define USBMODE 0x68 /* USB Device mode */ #define USBMODE_SDIS (1 << 3) /* Stream disable */ diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 086dc05..226684ad 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -41,6 +41,8 @@ COBJS-$(CONFIG_SED156X) += sed156x.o COBJS-$(CONFIG_VIDEO_SM501) += sm501.o COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o +COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o +COBJS-y += videomodes.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c new file mode 100644 index 0000000..b322cc3 --- /dev/null +++ b/drivers/video/omap3_dss.c @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * Syed Mohammed Khasim <khasim@ti.com> + * + * Referred to Linux Kernel DSS driver files for OMAP3 by + * Tomi Valkeinen from drivers/video/omap2/dss/ + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation's version 2 and any + * later version the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/dss.h> + +/* + * Configure VENC for a given Mode (NTSC / PAL) + */ +void omap3_dss_venc_config(const struct venc_regs *venc_cfg, + u32 height, u32 width) +{ + struct venc_regs *venc = (struct venc_regs *) OMAP3_VENC_BASE; + struct dss_regs *dss = (struct dss_regs *) OMAP3_DSS_BASE; + struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE; + + writel(venc_cfg->status, &venc->status); + writel(venc_cfg->f_control, &venc->f_control); + writel(venc_cfg->vidout_ctrl, &venc->vidout_ctrl); + writel(venc_cfg->sync_ctrl, &venc->sync_ctrl); + writel(venc_cfg->llen, &venc->llen); + writel(venc_cfg->flens, &venc->flens); + writel(venc_cfg->hfltr_ctrl, &venc->hfltr_ctrl); + writel(venc_cfg->cc_carr_wss_carr, &venc->cc_carr_wss_carr); + writel(venc_cfg->c_phase, &venc->c_phase); + writel(venc_cfg->gain_u, &venc->gain_u); + writel(venc_cfg->gain_v, &venc->gain_v); + writel(venc_cfg->gain_y, &venc->gain_y); + writel(venc_cfg->black_level, &venc->black_level); + writel(venc_cfg->blank_level, &venc->blank_level); + writel(venc_cfg->x_color, &venc->x_color); + writel(venc_cfg->m_control, &venc->m_control); + writel(venc_cfg->bstamp_wss_data, &venc->bstamp_wss_data); + writel(venc_cfg->s_carr, &venc->s_carr); + writel(venc_cfg->line21, &venc->line21); + writel(venc_cfg->ln_sel, &venc->ln_sel); + writel(venc_cfg->l21__wc_ctl, &venc->l21__wc_ctl); + writel(venc_cfg->htrigger_vtrigger, &venc->htrigger_vtrigger); + writel(venc_cfg->savid__eavid, &venc->savid__eavid); + writel(venc_cfg->flen__fal, &venc->flen__fal); + writel(venc_cfg->lal__phase_reset, &venc->lal__phase_reset); + writel(venc_cfg->hs_int_start_stop_x, + &venc->hs_int_start_stop_x); + writel(venc_cfg->hs_ext_start_stop_x, + &venc->hs_ext_start_stop_x); + writel(venc_cfg->vs_int_start_x, &venc->vs_int_start_x); + writel(venc_cfg->vs_int_stop_x__vs_int_start_y, + &venc->vs_int_stop_x__vs_int_start_y); + writel(venc_cfg->vs_int_stop_y__vs_ext_start_x, + &venc->vs_int_stop_y__vs_ext_start_x); + writel(venc_cfg->vs_ext_stop_x__vs_ext_start_y, + &venc->vs_ext_stop_x__vs_ext_start_y); + writel(venc_cfg->vs_ext_stop_y, &venc->vs_ext_stop_y); + writel(venc_cfg->avid_start_stop_x, &venc->avid_start_stop_x); + writel(venc_cfg->avid_start_stop_y, &venc->avid_start_stop_y); + writel(venc_cfg->fid_int_start_x__fid_int_start_y, + &venc->fid_int_start_x__fid_int_start_y); + writel(venc_cfg->fid_int_offset_y__fid_ext_start_x, + &venc->fid_int_offset_y__fid_ext_start_x); + writel(venc_cfg->fid_ext_start_y__fid_ext_offset_y, + &venc->fid_ext_start_y__fid_ext_offset_y); + writel(venc_cfg->tvdetgp_int_start_stop_x, + &venc->tvdetgp_int_start_stop_x); + writel(venc_cfg->tvdetgp_int_start_stop_y, + &venc->tvdetgp_int_start_stop_y); + writel(venc_cfg->gen_ctrl, &venc->gen_ctrl); + writel(venc_cfg->output_control, &venc->output_control); + writel(venc_cfg->dac_b__dac_c, &venc->dac_b__dac_c); + + /* Configure DSS for VENC Settings */ + writel(VENC_DSS_CONFIG, &dss->control); + + /* Configure height and width for Digital out */ + writel(((height << DIG_LPP_SHIFT) | width), &dispc->size_dig); +} + +/* + * Configure Panel Specific Parameters + */ +void omap3_dss_panel_config(const struct panel_config *panel_cfg) +{ + struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE; + + writel(panel_cfg->timing_h, &dispc->timing_h); + writel(panel_cfg->timing_v, &dispc->timing_v); + writel(panel_cfg->pol_freq, &dispc->pol_freq); + writel(panel_cfg->divisor, &dispc->divisor); + writel(panel_cfg->lcd_size, &dispc->size_lcd); + writel((panel_cfg->load_mode << FRAME_MODE_SHIFT), &dispc->config); + writel(((panel_cfg->panel_type << TFTSTN_SHIFT) | + (panel_cfg->data_lines << DATALINES_SHIFT)), &dispc->control); + writel(panel_cfg->panel_color, &dispc->default_color0); +} + +/* + * Enable LCD and DIGITAL OUT in DSS + */ +void omap3_dss_enable(void) +{ + struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE; + u32 l = 0; + + l = readl(&dispc->control); + l |= DISPC_ENABLE; + writel(l, &dispc->control); +} |