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-rw-r--r--drivers/net/fm/Makefile1
-rw-r--r--drivers/net/fm/dtsec.c2
-rw-r--r--drivers/net/fm/eth.c195
-rw-r--r--drivers/net/fm/fm.c31
-rw-r--r--drivers/net/fm/fm.h14
-rw-r--r--drivers/net/fm/init.c10
-rw-r--r--drivers/net/fm/ls1043.c119
-rw-r--r--drivers/net/fm/tgec.c2
-rw-r--r--drivers/net/fm/tgec_phy.c2
-rw-r--r--drivers/net/ldpaa_eth/ldpaa_eth.c15
-rw-r--r--drivers/net/ldpaa_eth/ls2085a.c2
11 files changed, 283 insertions, 110 deletions
diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index d052fcb..a3c9f99 100644
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -37,3 +37,4 @@ obj-$(CONFIG_PPC_T4160) += t4240.o
obj-$(CONFIG_PPC_T4080) += t4240.o
obj-$(CONFIG_PPC_B4420) += b4860.o
obj-$(CONFIG_PPC_B4860) += b4860.o
+obj-$(CONFIG_LS1043A) += ls1043.o
diff --git a/drivers/net/fm/dtsec.c b/drivers/net/fm/dtsec.c
index 8d3dc0e..b339a84 100644
--- a/drivers/net/fm/dtsec.c
+++ b/drivers/net/fm/dtsec.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/types.h>
#include <asm/io.h>
-#include <asm/fsl_dtsec.h>
+#include <fsl_dtsec.h>
#include <fsl_mdio.h>
#include <phy.h>
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 6702f5a..eb8e936 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -13,8 +13,8 @@
#include <fsl_mdio.h>
#include <miiphy.h>
#include <phy.h>
-#include <asm/fsl_dtsec.h>
-#include <asm/fsl_tgec.h>
+#include <fsl_dtsec.h>
+#include <fsl_tgec.h>
#include <fsl_memac.h>
#include "fm.h"
@@ -41,28 +41,35 @@ static void dtsec_configure_serdes(struct fm_eth *priv)
bus.priv = priv->mac->phyregs;
bool sgmii_2500 = (priv->enet_if ==
PHY_INTERFACE_MODE_SGMII_2500) ? true : false;
+ int i = 0;
+qsgmii_loop:
/* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */
value = PHY_SGMII_IF_MODE_SGMII;
if (!sgmii_2500)
value |= PHY_SGMII_IF_MODE_AN;
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x14, value);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x14, value);
/* Dev ability according to SGMII specification */
value = PHY_SGMII_DEV_ABILITY_SGMII;
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x4, value);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x4, value);
/* Adjust link timer for SGMII -
1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40 */
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x13, 0x3);
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x12, 0xd40);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x13, 0x3);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x12, 0xd40);
/* Restart AN */
value = PHY_SGMII_CR_DEF_VAL;
if (!sgmii_2500)
value |= PHY_SGMII_CR_RESET_AN;
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0, value);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0, value);
+
+ if ((priv->enet_if == PHY_INTERFACE_MODE_QSGMII) && (i < 3)) {
+ i++;
+ goto qsgmii_loop;
+ }
#else
struct dtsec *regs = priv->mac->base;
struct tsec_mii_mng *phyregs = priv->mac->phyregs;
@@ -91,10 +98,12 @@ static void dtsec_init_phy(struct eth_device *dev)
#endif
if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII ||
+ fm_eth->enet_if == PHY_INTERFACE_MODE_QSGMII ||
fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500)
dtsec_configure_serdes(fm_eth);
}
+#ifdef CONFIG_PHYLIB
static int tgec_is_fibre(struct eth_device *dev)
{
struct fm_eth *fm = dev->priv;
@@ -105,15 +114,16 @@ static int tgec_is_fibre(struct eth_device *dev)
return hwconfig_arg_cmp(phyopt, "xfi");
}
#endif
+#endif
static u16 muram_readw(u16 *addr)
{
- u32 base = (u32)addr & ~0x3;
- u32 val32 = *(u32 *)base;
+ ulong base = (ulong)addr & ~0x3UL;
+ u32 val32 = in_be32((void *)base);
int byte_pos;
u16 ret;
- byte_pos = (u32)addr & 0x3;
+ byte_pos = (ulong)addr & 0x3UL;
if (byte_pos)
ret = (u16)(val32 & 0x0000ffff);
else
@@ -124,18 +134,18 @@ static u16 muram_readw(u16 *addr)
static void muram_writew(u16 *addr, u16 val)
{
- u32 base = (u32)addr & ~0x3;
- u32 org32 = *(u32 *)base;
+ ulong base = (ulong)addr & ~0x3UL;
+ u32 org32 = in_be32((void *)base);
u32 val32;
int byte_pos;
- byte_pos = (u32)addr & 0x3;
+ byte_pos = (ulong)addr & 0x3UL;
if (byte_pos)
val32 = (org32 & 0xffff0000) | val;
else
val32 = (org32 & 0x0000ffff) | ((u32)val << 16);
- *(u32 *)base = val32;
+ out_be32((void *)base, val32);
}
static void bmi_rx_port_disable(struct fm_bmi_rx_port *rx_port)
@@ -199,6 +209,8 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth)
u32 pram_page_offset;
void *rx_bd_ring_base;
void *rx_buf_pool;
+ u32 bd_ring_base_lo, bd_ring_base_hi;
+ u32 buf_lo, buf_hi;
struct fm_port_bd *rxbd;
struct fm_port_qd *rxqd;
struct fm_bmi_rx_port *bmi_rx_port = fm_eth->rx_port;
@@ -207,16 +219,21 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth)
/* alloc global parameter ram at MURAM */
pram = (struct fm_port_global_pram *)fm_muram_alloc(fm_eth->fm_index,
FM_PRAM_SIZE, FM_PRAM_ALIGN);
+ if (!pram) {
+ printf("%s: No muram for Rx global parameter\n", __func__);
+ return -ENOMEM;
+ }
+
fm_eth->rx_pram = pram;
/* parameter page offset to MURAM */
- pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
+ pram_page_offset = (void *)pram - fm_muram_base(fm_eth->fm_index);
/* enable global mode- snooping data buffers and BDs */
- pram->mode = PRAM_MODE_GLOBAL;
+ out_be32(&pram->mode, PRAM_MODE_GLOBAL);
/* init the Rx queue descriptor pionter */
- pram->rxqd_ptr = pram_page_offset + 0x20;
+ out_be32(&pram->rxqd_ptr, pram_page_offset + 0x20);
/* set the max receive buffer length, power of 2 */
muram_writew(&pram->mrblr, MAX_RXBUF_LOG2);
@@ -225,15 +242,18 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth)
rx_bd_ring_base = malloc(sizeof(struct fm_port_bd)
* RX_BD_RING_SIZE);
if (!rx_bd_ring_base)
- return 0;
+ return -ENOMEM;
+
memset(rx_bd_ring_base, 0, sizeof(struct fm_port_bd)
* RX_BD_RING_SIZE);
/* alloc Rx buffer from main memory */
rx_buf_pool = malloc(MAX_RXBUF_LEN * RX_BD_RING_SIZE);
if (!rx_buf_pool)
- return 0;
+ return -ENOMEM;
+
memset(rx_buf_pool, 0, MAX_RXBUF_LEN * RX_BD_RING_SIZE);
+ debug("%s: rx_buf_pool = %p\n", __func__, rx_buf_pool);
/* save them to fm_eth */
fm_eth->rx_bd_ring = rx_bd_ring_base;
@@ -243,18 +263,24 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth)
/* init Rx BDs ring */
rxbd = (struct fm_port_bd *)rx_bd_ring_base;
for (i = 0; i < RX_BD_RING_SIZE; i++) {
- rxbd->status = RxBD_EMPTY;
- rxbd->len = 0;
- rxbd->buf_ptr_hi = 0;
- rxbd->buf_ptr_lo = (u32)rx_buf_pool + i * MAX_RXBUF_LEN;
+ muram_writew(&rxbd->status, RxBD_EMPTY);
+ muram_writew(&rxbd->len, 0);
+ buf_hi = upper_32_bits(virt_to_phys(rx_buf_pool +
+ i * MAX_RXBUF_LEN));
+ buf_lo = lower_32_bits(virt_to_phys(rx_buf_pool +
+ i * MAX_RXBUF_LEN));
+ muram_writew(&rxbd->buf_ptr_hi, (u16)buf_hi);
+ out_be32(&rxbd->buf_ptr_lo, buf_lo);
rxbd++;
}
/* set the Rx queue descriptor */
rxqd = &pram->rxqd;
muram_writew(&rxqd->gen, 0);
- muram_writew(&rxqd->bd_ring_base_hi, 0);
- rxqd->bd_ring_base_lo = (u32)rx_bd_ring_base;
+ bd_ring_base_hi = upper_32_bits(virt_to_phys(rx_bd_ring_base));
+ bd_ring_base_lo = lower_32_bits(virt_to_phys(rx_bd_ring_base));
+ muram_writew(&rxqd->bd_ring_base_hi, (u16)bd_ring_base_hi);
+ out_be32(&rxqd->bd_ring_base_lo, bd_ring_base_lo);
muram_writew(&rxqd->bd_ring_size, sizeof(struct fm_port_bd)
* RX_BD_RING_SIZE);
muram_writew(&rxqd->offset_in, 0);
@@ -263,7 +289,7 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth)
/* set IM parameter ram pointer to Rx Frame Queue ID */
out_be32(&bmi_rx_port->fmbm_rfqid, pram_page_offset);
- return 1;
+ return 0;
}
static int fm_eth_tx_port_parameter_init(struct fm_eth *fm_eth)
@@ -271,6 +297,7 @@ static int fm_eth_tx_port_parameter_init(struct fm_eth *fm_eth)
struct fm_port_global_pram *pram;
u32 pram_page_offset;
void *tx_bd_ring_base;
+ u32 bd_ring_base_lo, bd_ring_base_hi;
struct fm_port_bd *txbd;
struct fm_port_qd *txqd;
struct fm_bmi_tx_port *bmi_tx_port = fm_eth->tx_port;
@@ -279,22 +306,27 @@ static int fm_eth_tx_port_parameter_init(struct fm_eth *fm_eth)
/* alloc global parameter ram at MURAM */
pram = (struct fm_port_global_pram *)fm_muram_alloc(fm_eth->fm_index,
FM_PRAM_SIZE, FM_PRAM_ALIGN);
+ if (!pram) {
+ printf("%s: No muram for Tx global parameter\n", __func__);
+ return -ENOMEM;
+ }
fm_eth->tx_pram = pram;
/* parameter page offset to MURAM */
- pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
+ pram_page_offset = (void *)pram - fm_muram_base(fm_eth->fm_index);
/* enable global mode- snooping data buffers and BDs */
- pram->mode = PRAM_MODE_GLOBAL;
+ out_be32(&pram->mode, PRAM_MODE_GLOBAL);
/* init the Tx queue descriptor pionter */
- pram->txqd_ptr = pram_page_offset + 0x40;
+ out_be32(&pram->txqd_ptr, pram_page_offset + 0x40);
/* alloc Tx buffer descriptors from main memory */
tx_bd_ring_base = malloc(sizeof(struct fm_port_bd)
* TX_BD_RING_SIZE);
if (!tx_bd_ring_base)
- return 0;
+ return -ENOMEM;
+
memset(tx_bd_ring_base, 0, sizeof(struct fm_port_bd)
* TX_BD_RING_SIZE);
/* save it to fm_eth */
@@ -304,16 +336,19 @@ static int fm_eth_tx_port_parameter_init(struct fm_eth *fm_eth)
/* init Tx BDs ring */
txbd = (struct fm_port_bd *)tx_bd_ring_base;
for (i = 0; i < TX_BD_RING_SIZE; i++) {
- txbd->status = TxBD_LAST;
- txbd->len = 0;
- txbd->buf_ptr_hi = 0;
- txbd->buf_ptr_lo = 0;
+ muram_writew(&txbd->status, TxBD_LAST);
+ muram_writew(&txbd->len, 0);
+ muram_writew(&txbd->buf_ptr_hi, 0);
+ out_be32(&txbd->buf_ptr_lo, 0);
+ txbd++;
}
/* set the Tx queue decriptor */
txqd = &pram->txqd;
- muram_writew(&txqd->bd_ring_base_hi, 0);
- txqd->bd_ring_base_lo = (u32)tx_bd_ring_base;
+ bd_ring_base_hi = upper_32_bits(virt_to_phys(tx_bd_ring_base));
+ bd_ring_base_lo = lower_32_bits(virt_to_phys(tx_bd_ring_base));
+ muram_writew(&txqd->bd_ring_base_hi, (u16)bd_ring_base_hi);
+ out_be32(&txqd->bd_ring_base_lo, bd_ring_base_lo);
muram_writew(&txqd->bd_ring_size, sizeof(struct fm_port_bd)
* TX_BD_RING_SIZE);
muram_writew(&txqd->offset_in, 0);
@@ -322,29 +357,35 @@ static int fm_eth_tx_port_parameter_init(struct fm_eth *fm_eth)
/* set IM parameter ram pointer to Tx Confirmation Frame Queue ID */
out_be32(&bmi_tx_port->fmbm_tcfqid, pram_page_offset);
- return 1;
+ return 0;
}
static int fm_eth_init(struct fm_eth *fm_eth)
{
+ int ret;
- if (!fm_eth_rx_port_parameter_init(fm_eth))
- return 0;
+ ret = fm_eth_rx_port_parameter_init(fm_eth);
+ if (ret)
+ return ret;
- if (!fm_eth_tx_port_parameter_init(fm_eth))
- return 0;
+ ret = fm_eth_tx_port_parameter_init(fm_eth);
+ if (ret)
+ return ret;
- return 1;
+ return 0;
}
static int fm_eth_startup(struct fm_eth *fm_eth)
{
struct fsl_enet_mac *mac;
+ int ret;
+
mac = fm_eth->mac;
/* Rx/TxBDs, Rx/TxQDs, Rx buff and parameter ram init */
- if (!fm_eth_init(fm_eth))
- return 0;
+ ret = fm_eth_init(fm_eth);
+ if (ret)
+ return ret;
/* setup the MAC controller */
mac->init_mac(mac);
@@ -359,7 +400,7 @@ static int fm_eth_startup(struct fm_eth *fm_eth)
/* init bmi tx port, IM mode and disable */
bmi_tx_port_init(fm_eth->tx_port);
- return 1;
+ return 0;
}
static void fmc_tx_port_graceful_stop_enable(struct fm_eth *fm_eth)
@@ -368,7 +409,7 @@ static void fmc_tx_port_graceful_stop_enable(struct fm_eth *fm_eth)
pram = fm_eth->tx_pram;
/* graceful stop transmission of frames */
- pram->mode |= PRAM_MODE_GRACEFUL_STOP;
+ setbits_be32(&pram->mode, PRAM_MODE_GRACEFUL_STOP);
sync();
}
@@ -378,7 +419,7 @@ static void fmc_tx_port_graceful_stop_disable(struct fm_eth *fm_eth)
pram = fm_eth->tx_pram;
/* re-enable transmission of frames */
- pram->mode &= ~PRAM_MODE_GRACEFUL_STOP;
+ clrbits_be32(&pram->mode, PRAM_MODE_GRACEFUL_STOP);
sync();
}
@@ -452,8 +493,10 @@ static void fm_eth_halt(struct eth_device *dev)
/* disable bmi Rx port */
bmi_rx_port_disable(fm_eth->rx_port);
+#ifdef CONFIG_PHYLIB
if (fm_eth->phydev)
phy_shutdown(fm_eth->phydev);
+#endif
}
static int fm_eth_send(struct eth_device *dev, void *buf, int len)
@@ -469,19 +512,20 @@ static int fm_eth_send(struct eth_device *dev, void *buf, int len)
txbd = fm_eth->cur_txbd;
/* find one empty TxBD */
- for (i = 0; txbd->status & TxBD_READY; i++) {
+ for (i = 0; muram_readw(&txbd->status) & TxBD_READY; i++) {
udelay(100);
if (i > 0x1000) {
- printf("%s: Tx buffer not ready\n", dev->name);
+ printf("%s: Tx buffer not ready, txbd->status = 0x%x\n",
+ dev->name, muram_readw(&txbd->status));
return 0;
}
}
/* setup TxBD */
- txbd->buf_ptr_hi = 0;
- txbd->buf_ptr_lo = (u32)buf;
- txbd->len = len;
+ muram_writew(&txbd->buf_ptr_hi, (u16)upper_32_bits(virt_to_phys(buf)));
+ out_be32(&txbd->buf_ptr_lo, lower_32_bits(virt_to_phys(buf)));
+ muram_writew(&txbd->len, len);
sync();
- txbd->status = TxBD_READY | TxBD_LAST;
+ muram_writew(&txbd->status, TxBD_READY | TxBD_LAST);
sync();
/* update TxQD, let RISC to send the packet */
@@ -493,10 +537,11 @@ static int fm_eth_send(struct eth_device *dev, void *buf, int len)
sync();
/* wait for buffer to be transmitted */
- for (i = 0; txbd->status & TxBD_READY; i++) {
+ for (i = 0; muram_readw(&txbd->status) & TxBD_READY; i++) {
udelay(100);
if (i > 0x10000) {
- printf("%s: Tx error\n", dev->name);
+ printf("%s: Tx error, txbd->status = 0x%x\n",
+ dev->name, muram_readw(&txbd->status));
return 0;
}
}
@@ -518,6 +563,7 @@ static int fm_eth_recv(struct eth_device *dev)
struct fm_port_global_pram *pram;
struct fm_port_bd *rxbd, *rxbd_base;
u16 status, len;
+ u32 buf_lo, buf_hi;
u8 *data;
u16 offset_out;
int ret = 1;
@@ -525,12 +571,14 @@ static int fm_eth_recv(struct eth_device *dev)
fm_eth = (struct fm_eth *)dev->priv;
pram = fm_eth->rx_pram;
rxbd = fm_eth->cur_rxbd;
- status = rxbd->status;
+ status = muram_readw(&rxbd->status);
while (!(status & RxBD_EMPTY)) {
if (!(status & RxBD_ERROR)) {
- data = (u8 *)rxbd->buf_ptr_lo;
- len = rxbd->len;
+ buf_hi = muram_readw(&rxbd->buf_ptr_hi);
+ buf_lo = in_be32(&rxbd->buf_ptr_lo);
+ data = (u8 *)((ulong)(buf_hi << 16) << 16 | buf_lo);
+ len = muram_readw(&rxbd->len);
net_process_received_packet(data, len);
} else {
printf("%s: Rx error\n", dev->name);
@@ -538,8 +586,8 @@ static int fm_eth_recv(struct eth_device *dev)
}
/* clear the RxBDs */
- rxbd->status = RxBD_EMPTY;
- rxbd->len = 0;
+ muram_writew(&rxbd->status, RxBD_EMPTY);
+ muram_writew(&rxbd->len, 0);
sync();
/* advance RxBD */
@@ -548,7 +596,7 @@ static int fm_eth_recv(struct eth_device *dev)
if (rxbd >= (rxbd_base + RX_BD_RING_SIZE))
rxbd = rxbd_base;
/* read next status */
- status = rxbd->status;
+ status = muram_readw(&rxbd->status);
/* update RxQD */
offset_out = muram_readw(&pram->rxqd.offset_out);
@@ -601,7 +649,7 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg)
/* alloc mac controller */
mac = malloc(sizeof(struct fsl_enet_mac));
if (!mac)
- return 0;
+ return -ENOMEM;
memset(mac, 0, sizeof(struct fsl_enet_mac));
/* save the mac to fm_eth struct */
@@ -616,19 +664,21 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg)
init_tgec(mac, base, phyregs, MAX_RXBUF_LEN);
#endif
- return 1;
+ return 0;
}
static int init_phy(struct eth_device *dev)
{
struct fm_eth *fm_eth = dev->priv;
+#ifdef CONFIG_PHYLIB
struct phy_device *phydev = NULL;
u32 supported;
+#endif
-#ifdef CONFIG_PHYLIB
if (fm_eth->type == FM_ETH_1G_E)
dtsec_init_phy(dev);
+#ifdef CONFIG_PHYLIB
if (fm_eth->bus) {
phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, dev,
fm_eth->enet_if);
@@ -669,17 +719,18 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)
struct eth_device *dev;
struct fm_eth *fm_eth;
int i, num = info->num;
+ int ret;
/* alloc eth device */
dev = (struct eth_device *)malloc(sizeof(struct eth_device));
if (!dev)
- return 0;
+ return -ENOMEM;
memset(dev, 0, sizeof(struct eth_device));
/* alloc the FMan ethernet private struct */
fm_eth = (struct fm_eth *)malloc(sizeof(struct fm_eth));
if (!fm_eth)
- return 0;
+ return -ENOMEM;
memset(fm_eth, 0, sizeof(struct fm_eth));
/* save off some things we need from the info struct */
@@ -694,8 +745,9 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)
fm_eth->max_rx_len = MAX_RXBUF_LEN;
/* init global mac structure */
- if (!fm_eth_init_mac(fm_eth, reg))
- return 0;
+ ret = fm_eth_init_mac(fm_eth, reg);
+ if (ret)
+ return ret;
/* keep same as the manual, we call FMAN1, FMAN2, DTSEC1, DTSEC2, etc */
if (fm_eth->type == FM_ETH_1G_E)
@@ -716,8 +768,9 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)
fm_eth->enet_if = info->enet_if;
/* startup the FM im */
- if (!fm_eth_startup(fm_eth))
- return 0;
+ ret = fm_eth_startup(fm_eth);
+ if (ret)
+ return ret;
init_phy(dev);
@@ -726,5 +779,5 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)
dev->enetaddr[i] = 0;
eth_register(dev);
- return 1;
+ return 0;
}
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 400e9dd..df5db72 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -22,21 +22,22 @@
struct fm_muram muram[CONFIG_SYS_NUM_FMAN];
-u32 fm_muram_base(int fm_idx)
+void *fm_muram_base(int fm_idx)
{
return muram[fm_idx].base;
}
-u32 fm_muram_alloc(int fm_idx, u32 size, u32 align)
+void *fm_muram_alloc(int fm_idx, size_t size, ulong align)
{
- u32 ret;
- u32 align_mask, off;
- u32 save;
+ void *ret;
+ ulong align_mask;
+ size_t off;
+ void *save;
align_mask = align - 1;
save = muram[fm_idx].alloc;
- off = save & align_mask;
+ off = (ulong)save & align_mask;
if (off != 0)
muram[fm_idx].alloc += (align - off);
off = size & align_mask;
@@ -45,6 +46,7 @@ u32 fm_muram_alloc(int fm_idx, u32 size, u32 align)
if ((muram[fm_idx].alloc + size) >= muram[fm_idx].top) {
muram[fm_idx].alloc = save;
printf("%s: run out of ram.\n", __func__);
+ return NULL;
}
ret = muram[fm_idx].alloc;
@@ -56,7 +58,7 @@ u32 fm_muram_alloc(int fm_idx, u32 size, u32 align)
static void fm_init_muram(int fm_idx, void *reg)
{
- u32 base = (u32)reg;
+ void *base = reg;
muram[fm_idx].base = base;
muram[fm_idx].size = CONFIG_SYS_FM_MURAM_SIZE;
@@ -80,11 +82,11 @@ static void fm_upload_ucode(int fm_idx, struct fm_imem *imem,
out_be32(&imem->iadd, IRAM_IADD_AIE);
/* write microcode to IRAM */
for (i = 0; i < size / 4; i++)
- out_be32(&imem->idata, ucode[i]);
+ out_be32(&imem->idata, (be32_to_cpu(ucode[i])));
/* verify if the writing is over */
out_be32(&imem->iadd, 0);
- while ((in_be32(&imem->idata) != ucode[0]) && --timeout)
+ while ((in_be32(&imem->idata) != be32_to_cpu(ucode[0])) && --timeout)
;
if (!timeout)
printf("Fman%u: microcode upload timeout\n", fm_idx + 1);
@@ -177,14 +179,15 @@ static int fman_upload_firmware(int fm_idx,
const struct qe_microcode *ucode = &firmware->microcode[i];
/* Upload a microcode if it's present */
- if (ucode->code_offset) {
+ if (be32_to_cpu(ucode->code_offset)) {
u32 ucode_size;
u32 *code;
printf("Fman%u: Uploading microcode version %u.%u.%u\n",
fm_idx + 1, ucode->major, ucode->minor,
ucode->revision);
- code = (void *)firmware + ucode->code_offset;
- ucode_size = sizeof(u32) * ucode->count;
+ code = (void *)firmware +
+ be32_to_cpu(ucode->code_offset);
+ ucode_size = sizeof(u32) * be32_to_cpu(ucode->count);
fm_upload_ucode(fm_idx, fm_imem, code, ucode_size);
}
}
@@ -255,7 +258,9 @@ static void fm_init_fpm(struct fm_fpm *fpm)
static int fm_init_bmi(int fm_idx, struct fm_bmi_common *bmi)
{
int blk, i, port_id;
- u32 val, offset, base;
+ u32 val;
+ size_t offset;
+ void *base;
/* alloc free buffer pool in MURAM */
base = fm_muram_alloc(fm_idx, FM_FREE_POOL_SIZE, FM_FREE_POOL_ALIGN);
diff --git a/drivers/net/fm/fm.h b/drivers/net/fm/fm.h
index a9691c6..fa9bc9f 100644
--- a/drivers/net/fm/fm.h
+++ b/drivers/net/fm/fm.h
@@ -10,7 +10,7 @@
#include <common.h>
#include <phy.h>
#include <fm_eth.h>
-#include <asm/fsl_fman.h>
+#include <fsl_fman.h>
/* Port ID */
#define OH_PORT_ID_BASE 0x01
@@ -26,10 +26,10 @@
#define MIIM_TIMEOUT 0xFFFF
struct fm_muram {
- u32 base;
- u32 top;
- u32 size;
- u32 alloc;
+ void *base;
+ void *top;
+ size_t size;
+ void *alloc;
};
#define FM_MURAM_RES_SIZE 0x01000
@@ -95,8 +95,8 @@ struct fm_port_global_pram {
#endif
#define FM_FREE_POOL_ALIGN 256
-u32 fm_muram_alloc(int fm_idx, u32 size, u32 align);
-u32 fm_muram_base(int fm_idx);
+void *fm_muram_alloc(int fm_idx, size_t size, ulong align);
+void *fm_muram_base(int fm_idx);
int fm_init_common(int index, struct ccsr_fman *reg);
int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info);
phy_interface_t fman_port_enet_if(enum fm_port port);
diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c
index b3ff4c5..3a1de59 100644
--- a/drivers/net/fm/init.c
+++ b/drivers/net/fm/init.c
@@ -1,13 +1,17 @@
/*
- * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011-2015 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <errno.h>
#include <common.h>
#include <asm/io.h>
-#include <asm/fsl_serdes.h>
#include <fsl_mdio.h>
+#ifdef CONFIG_FSL_LAYERSCAPE
+#include <asm/arch/fsl_serdes.h>
+#else
+#include <asm/fsl_serdes.h>
+#endif
#include "fm.h"
@@ -153,7 +157,9 @@ void fm_disable_port(enum fm_port port)
return;
fm_info[i].enabled = 0;
+#ifndef CONFIG_SYS_FMAN_V3
fman_disable_port(port);
+#endif
}
void fm_enable_port(enum fm_port port)
diff --git a/drivers/net/fm/ls1043.c b/drivers/net/fm/ls1043.c
new file mode 100644
index 0000000..cf2cc95
--- /dev/null
+++ b/drivers/net/fm/ls1043.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <phy.h>
+#include <fm_eth.h>
+#include <asm/io.h>
+#include <asm/arch/fsl_serdes.h>
+
+#define FSL_CHASSIS2_RCWSR13_EC1 0xe0000000 /* bits 416..418 */
+#define FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII 0x00000000
+#define FSL_CHASSIS2_RCWSR13_EC1_GPIO 0x20000000
+#define FSL_CHASSIS2_RCWSR13_EC1_FTM 0xa0000000
+#define FSL_CHASSIS2_RCWSR13_EC2 0x1c000000 /* bits 419..421 */
+#define FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII 0x00000000
+#define FSL_CHASSIS2_RCWSR13_EC2_GPIO 0x04000000
+#define FSL_CHASSIS2_RCWSR13_EC2_1588 0x08000000
+#define FSL_CHASSIS2_RCWSR13_EC2_FTM 0x14000000
+
+u32 port_to_devdisr[] = {
+ [FM1_DTSEC1] = FSL_CHASSIS2_DEVDISR2_DTSEC1_1,
+ [FM1_DTSEC2] = FSL_CHASSIS2_DEVDISR2_DTSEC1_2,
+ [FM1_DTSEC3] = FSL_CHASSIS2_DEVDISR2_DTSEC1_3,
+ [FM1_DTSEC4] = FSL_CHASSIS2_DEVDISR2_DTSEC1_4,
+ [FM1_DTSEC5] = FSL_CHASSIS2_DEVDISR2_DTSEC1_5,
+ [FM1_DTSEC6] = FSL_CHASSIS2_DEVDISR2_DTSEC1_6,
+ [FM1_DTSEC9] = FSL_CHASSIS2_DEVDISR2_DTSEC1_9,
+ [FM1_DTSEC10] = FSL_CHASSIS2_DEVDISR2_DTSEC1_10,
+ [FM1_10GEC1] = FSL_CHASSIS2_DEVDISR2_10GEC1_1,
+ [FM1_10GEC2] = FSL_CHASSIS2_DEVDISR2_10GEC1_2,
+ [FM1_10GEC3] = FSL_CHASSIS2_DEVDISR2_10GEC1_3,
+ [FM1_10GEC4] = FSL_CHASSIS2_DEVDISR2_10GEC1_4,
+};
+
+static int is_device_disabled(enum fm_port port)
+{
+ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+ u32 devdisr2 = in_be32(&gur->devdisr2);
+
+ return port_to_devdisr[port] & devdisr2;
+}
+
+void fman_disable_port(enum fm_port port)
+{
+ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+
+ setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
+}
+
+phy_interface_t fman_port_enet_if(enum fm_port port)
+{
+ struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+ u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
+
+ if (is_device_disabled(port)) {
+ printf("%s:%d: port(%d) is disabled\n", __func__,
+ __LINE__, port);
+ return PHY_INTERFACE_MODE_NONE;
+ }
+
+ if ((port == FM1_10GEC1) && (is_serdes_configured(XFI_FM1_MAC9)))
+ return PHY_INTERFACE_MODE_XGMII;
+
+ if ((port == FM1_DTSEC9) && (is_serdes_configured(XFI_FM1_MAC9)))
+ return PHY_INTERFACE_MODE_NONE;
+
+ if (port == FM1_DTSEC3)
+ if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
+ FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII) {
+ printf("%s:%d: port(FM1_DTSEC3) is OK\n",
+ __func__, __LINE__);
+ return PHY_INTERFACE_MODE_RGMII;
+ }
+ if (port == FM1_DTSEC4)
+ if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) ==
+ FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII) {
+ printf("%s:%d: port(FM1_DTSEC4) is OK\n",
+ __func__, __LINE__);
+ return PHY_INTERFACE_MODE_RGMII;
+ }
+
+ /* handle SGMII */
+ switch (port) {
+ case FM1_DTSEC1:
+ case FM1_DTSEC2:
+ if ((port == FM1_DTSEC2) &&
+ is_serdes_configured(SGMII_2500_FM1_DTSEC2))
+ return PHY_INTERFACE_MODE_SGMII_2500;
+ case FM1_DTSEC5:
+ case FM1_DTSEC6:
+ case FM1_DTSEC9:
+ if (is_serdes_configured(SGMII_FM1_DTSEC1 + port - FM1_DTSEC1))
+ return PHY_INTERFACE_MODE_SGMII;
+ else if ((port == FM1_DTSEC9) &&
+ is_serdes_configured(SGMII_2500_FM1_DTSEC9))
+ return PHY_INTERFACE_MODE_SGMII_2500;
+ break;
+ default:
+ break;
+ }
+
+ /* handle QSGMII */
+ switch (port) {
+ case FM1_DTSEC1:
+ case FM1_DTSEC2:
+ case FM1_DTSEC5:
+ case FM1_DTSEC6:
+ /* only MAC 1,2,5,6 available for QSGMII */
+ if (is_serdes_configured(QSGMII_FM1_A))
+ return PHY_INTERFACE_MODE_QSGMII;
+ break;
+ default:
+ break;
+ }
+
+ return PHY_INTERFACE_MODE_NONE;
+}
diff --git a/drivers/net/fm/tgec.c b/drivers/net/fm/tgec.c
index 5017123..8d4622f 100644
--- a/drivers/net/fm/tgec.c
+++ b/drivers/net/fm/tgec.c
@@ -12,7 +12,7 @@
#include <phy.h>
#include <asm/types.h>
#include <asm/io.h>
-#include <asm/fsl_tgec.h>
+#include <fsl_tgec.h>
#include "fm.h"
diff --git a/drivers/net/fm/tgec_phy.c b/drivers/net/fm/tgec_phy.c
index 095f00c..24cb17b 100644
--- a/drivers/net/fm/tgec_phy.c
+++ b/drivers/net/fm/tgec_phy.c
@@ -9,7 +9,7 @@
#include <miiphy.h>
#include <phy.h>
#include <asm/io.h>
-#include <asm/fsl_tgec.h>
+#include <fsl_tgec.h>
#include <fm_eth.h>
/*
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 4de7586..99acb7a 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -220,7 +220,6 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd)
{
struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
struct dpni_queue_attr rx_queue_attr;
- uint8_t mac_addr[6];
int err;
if (net_dev->state == ETH_STATE_ACTIVE)
@@ -240,21 +239,13 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd)
if (err)
goto err_bind;
- err = dpni_get_primary_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS,
- priv->dpni_handle, mac_addr);
+ err = dpni_add_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS,
+ priv->dpni_handle, net_dev->enetaddr);
if (err) {
- printf("dpni_get_primary_mac_addr() failed\n");
+ printf("dpni_add_mac_addr() failed\n");
return err;
}
- memcpy(net_dev->enetaddr, mac_addr, 0x6);
-
- /* setup the MAC address */
- if (net_dev->enetaddr[0] & 0x01) {
- printf("%s: MacAddress is multcast address\n", __func__);
- return 1;
- }
-
#ifdef CONFIG_PHYLIB
/* TODO Check this path */
err = phy_startup(priv->phydev);
diff --git a/drivers/net/ldpaa_eth/ls2085a.c b/drivers/net/ldpaa_eth/ls2085a.c
index 6b7960a..93ed4f1 100644
--- a/drivers/net/ldpaa_eth/ls2085a.c
+++ b/drivers/net/ldpaa_eth/ls2085a.c
@@ -7,9 +7,7 @@
#include <phy.h>
#include <fsl-mc/ldpaa_wriop.h>
#include <asm/io.h>
-#include <asm/arch-fsl-lsch3/immap_lsch3.h>
#include <asm/arch/fsl_serdes.h>
-#include <fsl-mc/ldpaa_wriop.h>
u32 dpmac_to_devdisr[] = {
[WRIOP1_DPMAC1] = FSL_CHASSIS3_DEVDISR2_DPMAC1,
generated by cgit v1.1 at 2024-11-07 12:06:33 +0000