diff options
Diffstat (limited to 'cpu/mpc86xx/spd_sdram.c')
| -rw-r--r-- | cpu/mpc86xx/spd_sdram.c | 37 |
1 files changed, 12 insertions, 25 deletions
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index 54e40f1..e501caf 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -27,7 +27,7 @@ #include <i2c.h> #include <spd.h> #include <asm/mmu.h> - +#include <asm/fsl_law.h> #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) extern void dma_init(void); @@ -1123,7 +1123,6 @@ spd_sdram(void) int memsize_ddr1 = 0; unsigned int law_size_ddr1; volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; #ifdef CONFIG_DDR_INTERLEAVE volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; #endif @@ -1179,12 +1178,9 @@ spd_sdram(void) /* * Set up LAWBAR for DDR 1 space. */ - mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - mcm->lawar1 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR_INTERLEAVED - | (LAWAR_SIZE & law_size_interleaved)); - debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1); - debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1); +#ifdef CONFIG_FSL_LAW + set_law(1, CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV); +#endif debug("Interleaved memory size is 0x%08lx\n", memsize_total); #ifdef CONFIG_DDR_INTERLEAVE @@ -1239,12 +1235,9 @@ spd_sdram(void) /* * Set up LAWBAR for DDR 1 space. */ - mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - mcm->lawar1 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR1 - | (LAWAR_SIZE & law_size_ddr1)); - debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1); - debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1); +#ifdef CONFIG_FSL_LAW + set_law(1, CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1); +#endif } #if (CONFIG_NUM_DDR_CONTROLLERS > 1) @@ -1269,17 +1262,11 @@ spd_sdram(void) /* * Set up LAWBAR for DDR 2 space. */ - if (ddr1_enabled) - mcm->lawbar8 = (((memsize_ddr1 * 1024 * 1024) >> 12) - & 0xfffff); - else - mcm->lawbar8 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - - mcm->lawar8 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR2 - | (LAWAR_SIZE & law_size_ddr2)); - debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8); - debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8); +#ifdef CONFIG_FSL_LAW + set_law(8, + (ddr1_enabled ? (memsize_ddr1 * 1024 * 1024) : CFG_DDR_SDRAM_BASE), + law_size_ddr2, LAW_TRGT_IF_DDR_2); +#endif } debug("\nMemory size of DDR2 = 0x%08lx\n", memsize_ddr2); |