diff options
Diffstat (limited to 'board')
15 files changed, 237 insertions, 170 deletions
diff --git a/board/freescale/mx25_3stack/config.mk b/board/freescale/mx25_3stack/config.mk index 4c401e7..083613a 100644 --- a/board/freescale/mx25_3stack/config.mk +++ b/board/freescale/mx25_3stack/config.mk @@ -1 +1,3 @@ +LDSCRIPT := $(SRCTREE)/board/$(VENDOR)/$(BOARD)/u-boot.lds + TEXT_BASE = 0x83F00000 diff --git a/board/freescale/mx25_3stack/mx25_3stack.c b/board/freescale/mx25_3stack/mx25_3stack.c index b33eaa1..f79b1b9 100644 --- a/board/freescale/mx25_3stack/mx25_3stack.c +++ b/board/freescale/mx25_3stack/mx25_3stack.c @@ -35,7 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; static u32 system_rev; -volatile u32 *esdhc_base_pointer; u32 get_board_rev(void) { @@ -67,9 +66,11 @@ int dram_init(void) return 0; } -#ifdef CONFIG_FSL_MMC +#ifdef CONFIG_CMD_MMC -int sdhc_init(void) +u32 *imx_esdhc_base_addr; + +int esdhc_gpio_init(void) { u32 interface_esdhc = 0, val = 0; @@ -77,7 +78,7 @@ int sdhc_init(void) switch (interface_esdhc) { case 0: - esdhc_base_pointer = (volatile u32 *)MMC_SDHC1_BASE; + imx_esdhc_base_addr = (u32 *)MMC_SDHC1_BASE; /* Pins */ writel(0x10, IOMUXC_BASE + 0x190); /* SD1_CMD */ writel(0x10, IOMUXC_BASE + 0x194); /* SD1_CLK */ @@ -114,7 +115,7 @@ int sdhc_init(void) writel(val, GPIO1_BASE + GPIO_GDIR); break; case 1: - esdhc_base_pointer = (volatile u32 *)MMC_SDHC2_BASE; + imx_esdhc_base_addr = (u32 *)MMC_SDHC2_BASE; /* Pins */ writel(0x16, IOMUXC_BASE + 0x0e8); /* LD8 (SD1_CMD) */ writel(0x16, IOMUXC_BASE + 0x0ec); /* LD9 (SD1_CLK) */ @@ -144,6 +145,14 @@ int sdhc_init(void) } return 0; } + +int board_mmc_init(void) +{ + if (!esdhc_gpio_init()) + return fsl_esdhc_mmc_init(gd->bd); + else + return -1; +} #endif int board_init(void) @@ -264,8 +273,8 @@ int checkboard(void) int board_eth_init(bd_t *bis) { int rc = -ENODEV; -#if defined(CONFIG_DRIVER_SMC911X) - rc = smc911x_initialize(bis); +#if defined(CONFIG_SMC911X) + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); #endif return rc; } diff --git a/board/freescale/mx31_3stack/config.mk b/board/freescale/mx31_3stack/config.mk index d34dc02..f8fc7dd 100644 --- a/board/freescale/mx31_3stack/config.mk +++ b/board/freescale/mx31_3stack/config.mk @@ -1 +1,3 @@ +LDSCRIPT := $(SRCTREE)/board/$(VENDOR)/$(BOARD)/u-boot.lds + TEXT_BASE = 0x87f00000 diff --git a/board/freescale/mx35_3stack/config.mk b/board/freescale/mx35_3stack/config.mk index 70b4271..848787d 100644 --- a/board/freescale/mx35_3stack/config.mk +++ b/board/freescale/mx35_3stack/config.mk @@ -1 +1,3 @@ +LDSCRIPT := $(SRCTREE)/board/$(VENDOR)/$(BOARD)/u-boot.lds + TEXT_BASE = 0x87800000 diff --git a/board/freescale/mx35_3stack/mx35_3stack.c b/board/freescale/mx35_3stack/mx35_3stack.c index f7fb96a..cbd0756 100644 --- a/board/freescale/mx35_3stack/mx35_3stack.c +++ b/board/freescale/mx35_3stack/mx35_3stack.c @@ -31,11 +31,7 @@ #include <i2c.h> #include <linux/types.h> -#ifdef CONFIG_MMC -#include <asm/arch/sdhc.h> -#endif DECLARE_GLOBAL_DATA_PTR; -volatile u32 *esdhc_base_pointer; static u32 system_rev; @@ -58,7 +54,6 @@ static inline void setup_soc_rev(void) static inline void set_board_rev(int rev) { - int reg; system_rev = (system_rev & ~(0xF << 8)) | (rev & 0xF) << 8; } @@ -276,129 +271,101 @@ int checkboard(void) return 0; } +#if defined(CONFIG_SMC911X) +extern int smc911x_initialize(u8 dev_num, int base_addr); +#endif + int board_eth_init(bd_t *bis) { int rc = -ENODEV; -#if defined(CONFIG_DRIVER_SMC911X) - rc = smc911x_initialize(bis); +#if defined(CONFIG_SMC911X) + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); #endif return rc; } -#ifdef CONFIG_FSL_MMC +#ifdef CONFIG_CMD_MMC -int sdhc_init(void) +u32 *imx_esdhc_base_addr; + +int esdhc_gpio_init(void) { u32 interface_esdhc = 0; u32 pad_val = 0; interface_esdhc = (readl(IIM_BASE_ADDR + 0x80c)) & (0x000000C0) >> 6; - if (!is_soc_rev(CHIP_REV_1_0)) { - pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | - PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | - PAD_CTL_100K_PU | PAD_CTL_SRE_FAST; + /* IOMUX PROGRAMMING */ + switch (interface_esdhc) { + case 0: + imx_esdhc_base_addr = \ + (u32 *)MMC_SDHC1_BASE_ADDR; - switch (interface_esdhc) { - case 0: - debug("TO1 ESDHC1\n"); + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_HIGH | + PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; + mxc_request_iomux(MX35_PIN_SD1_CLK, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_iomux_set_pad(MX35_PIN_SD1_CLK, pad_val); - esdhc_base_pointer = \ - (volatile u32 *)MMC_SDHC1_BASE_ADDR; + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_HIGH | + PAD_CTL_100K_PU | PAD_CTL_SRE_FAST; + mxc_request_iomux(MX35_PIN_SD1_CMD, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_iomux_set_pad(MX35_PIN_SD1_CMD, pad_val); + mxc_request_iomux(MX35_PIN_SD1_DATA0, + MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA0, pad_val); + mxc_request_iomux(MX35_PIN_SD1_DATA3, + MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA3, pad_val); - mxc_iomux_set_pad(MX35_PIN_SD1_DATA3, pad_val); - break; - case 1: - debug("TO1 ESDHC2\n"); + break; + case 1: + imx_esdhc_base_addr = \ + (u32 *)MMC_SDHC2_BASE_ADDR; + + mxc_request_iomux(MX35_PIN_SD2_CLK, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_CMD, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_DATA0, + MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD2_DATA3, + MUX_CONFIG_FUNC); - esdhc_base_pointer = \ - (volatile u32 *)MMC_SDHC2_BASE_ADDR; + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | + PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; + mxc_iomux_set_pad(MX35_PIN_SD2_CLK, pad_val); - mxc_iomux_set_pad(MX35_PIN_SD2_DATA3, pad_val); - break; - case 2: - debug("TO1 ESDHC3\n"); + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | + PAD_CTL_100K_PU | PAD_CTL_SRE_FAST; + mxc_iomux_set_pad(MX35_PIN_SD2_CMD, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA0, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA3, pad_val); - esdhc_base_pointer = \ - (volatile u32 *)MMC_SDHC3_BASE_ADDR; + break; + case 2: + imx_esdhc_base_addr = \ + (u32 *)MMC_SDHC3_BASE_ADDR; - printf("TO1 ESDHC3 not supported!"); - break; - default: - break; - } - } else if (!is_soc_rev(CHIP_REV_2_0)) { - /* IOMUX PROGRAMMING */ - switch (interface_esdhc) { - case 0: - debug("TO2 ESDHC1\n"); - - esdhc_base_pointer = \ - (volatile u32 *)MMC_SDHC1_BASE_ADDR; - - pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | - PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_HIGH | - PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; - mxc_request_iomux(MX35_PIN_SD1_CLK, - MUX_CONFIG_FUNC | MUX_CONFIG_SION); - mxc_iomux_set_pad(MX35_PIN_SD1_CLK, pad_val); - - pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | - PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_HIGH | - PAD_CTL_100K_PU | PAD_CTL_SRE_FAST; - mxc_request_iomux(MX35_PIN_SD1_CMD, - MUX_CONFIG_FUNC | MUX_CONFIG_SION); - mxc_iomux_set_pad(MX35_PIN_SD1_CMD, pad_val); - mxc_request_iomux(MX35_PIN_SD1_DATA0, - MUX_CONFIG_FUNC); - mxc_iomux_set_pad(MX35_PIN_SD1_DATA0, pad_val); - mxc_request_iomux(MX35_PIN_SD1_DATA3, - MUX_CONFIG_FUNC); - mxc_iomux_set_pad(MX35_PIN_SD1_DATA3, pad_val); - - break; - case 1: - debug("TO2 ESDHC2\n"); - - esdhc_base_pointer = \ - (volatile u32 *)MMC_SDHC2_BASE_ADDR; - - mxc_request_iomux(MX35_PIN_SD2_CLK, - MUX_CONFIG_FUNC | MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_SD2_CMD, - MUX_CONFIG_FUNC | MUX_CONFIG_SION); - mxc_request_iomux(MX35_PIN_SD2_DATA0, - MUX_CONFIG_FUNC); - mxc_request_iomux(MX35_PIN_SD2_DATA3, - MUX_CONFIG_FUNC); - - pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | - PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | - PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; - mxc_iomux_set_pad(MX35_PIN_SD2_CLK, pad_val); - - pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | - PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | - PAD_CTL_100K_PU | PAD_CTL_SRE_FAST; - mxc_iomux_set_pad(MX35_PIN_SD2_CMD, pad_val); - mxc_iomux_set_pad(MX35_PIN_SD2_DATA0, pad_val); - mxc_iomux_set_pad(MX35_PIN_SD2_DATA3, pad_val); - - break; - case 2: - debug("TO2 ESDHC3\n"); - - esdhc_base_pointer = \ - (volatile u32 *)MMC_SDHC3_BASE_ADDR; - - printf("TO2 ESDHC3 not supported!"); - break; - default: - break; - } + printf("TO2 ESDHC3 not supported!"); + break; + default: + break; } return 0; } +int board_mmc_init(void) +{ + if (!esdhc_gpio_init()) + return fsl_esdhc_mmc_init(gd->bd); + else + return -1; +} #endif diff --git a/board/freescale/mx51_3stack/config.mk b/board/freescale/mx51_3stack/config.mk index ce7369d..705aa34 100644 --- a/board/freescale/mx51_3stack/config.mk +++ b/board/freescale/mx51_3stack/config.mk @@ -1 +1,3 @@ +LDSCRIPT := $(SRCTREE)/board/$(VENDOR)/$(BOARD)/u-boot.lds + TEXT_BASE = 0x97800000 diff --git a/board/freescale/mx51_3stack/mx51_3stack.c b/board/freescale/mx51_3stack/mx51_3stack.c index 4ee342e..50aec8c 100644 --- a/board/freescale/mx51_3stack/mx51_3stack.c +++ b/board/freescale/mx51_3stack/mx51_3stack.c @@ -32,12 +32,12 @@ #include <mxc_keyb.h> #include <asm/arch/keypad.h> #include "board-mx51_3stack.h" +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; static u32 system_rev; u32 mx51_io_base_addr; -volatile u32 *esdhc_base_pointer; u32 get_board_rev(void) { @@ -349,20 +349,26 @@ int checkboard(void) return 0; } +#if defined(CONFIG_SMC911X) +extern int smc911x_initialize(u8 dev_num, int base_addr); +#endif + #ifdef CONFIG_NET_MULTI int board_eth_init(bd_t *bis) { int rc = -ENODEV; -#if defined(CONFIG_DRIVER_SMC911X) - rc = smc911x_initialize(bis); +#if defined(CONFIG_SMC911X) + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); #endif return rc; } #endif -#ifdef CONFIG_FSL_MMC +#ifdef CONFIG_CMD_MMC + +u32 *imx_esdhc_base_addr; -int sdhc_init(void) +int esdhc_gpio_init(void) { u32 interface_esdhc = 0; s32 status = 0; @@ -372,7 +378,7 @@ int sdhc_init(void) switch (interface_esdhc) { case 0: - esdhc_base_pointer = (volatile u32 *)MMC_SDHC1_BASE_ADDR; + imx_esdhc_base_addr = (u32 *)MMC_SDHC1_BASE_ADDR; mxc_request_iomux(MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); @@ -432,9 +438,16 @@ int sdhc_init(void) break; } - return status = 1; + return status; } +int board_mmc_init(void) +{ + if (!esdhc_gpio_init()) + return fsl_esdhc_mmc_init(gd->bd); + else + return -1; +} #endif #if defined(CONFIG_MXC_KPD) diff --git a/board/freescale/imx51/Makefile b/board/freescale/mx51_bbg/Makefile index fbd40f2..109ca7b 100644 --- a/board/freescale/imx51/Makefile +++ b/board/freescale/mx51_bbg/Makefile @@ -23,7 +23,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := imx51.o +COBJS := mx51_bbg.o SOBJS := lowlevel_init.o flash_header.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/freescale/imx51/board-imx51.h b/board/freescale/mx51_bbg/board-imx51.h index 7a2cae0..7a2cae0 100644 --- a/board/freescale/imx51/board-imx51.h +++ b/board/freescale/mx51_bbg/board-imx51.h diff --git a/board/freescale/imx51/config.mk b/board/freescale/mx51_bbg/config.mk index 705aa34..705aa34 100644 --- a/board/freescale/imx51/config.mk +++ b/board/freescale/mx51_bbg/config.mk diff --git a/board/freescale/imx51/flash_header.S b/board/freescale/mx51_bbg/flash_header.S index 6790679..6790679 100644 --- a/board/freescale/imx51/flash_header.S +++ b/board/freescale/mx51_bbg/flash_header.S diff --git a/board/freescale/imx51/lowlevel_init.S b/board/freescale/mx51_bbg/lowlevel_init.S index e974a5f..e974a5f 100644 --- a/board/freescale/imx51/lowlevel_init.S +++ b/board/freescale/mx51_bbg/lowlevel_init.S diff --git a/board/freescale/imx51/imx51.c b/board/freescale/mx51_bbg/mx51_bbg.c index 364f224..9e1bb1a 100644 --- a/board/freescale/imx51/imx51.c +++ b/board/freescale/mx51_bbg/mx51_bbg.c @@ -34,12 +34,15 @@ #include "board-imx51.h" #include <asm/arch/imx_spi.h> #include <asm/arch/imx_spi_pmic.h> +#include <fsl_esdhc.h> + +#include <part.h> +#include <ext2fs.h> DECLARE_GLOBAL_DATA_PTR; static u32 system_rev; u32 mx51_io_base_addr; -volatile u32 *esdhc_base_pointer; u32 get_board_rev(void) { @@ -367,34 +370,34 @@ static void power_init(void) #ifdef CONFIG_NET_MULTI -#if defined(CONFIG_DRIVER_SMC911X) -extern int smc911x_initialize(bd_t *bis); -#endif int board_eth_init(bd_t *bis) { int rc = -ENODEV; -#if defined(CONFIG_DRIVER_SMC911X) - rc = smc911x_initialize(bis); -#endif - return rc; } #endif -#ifdef CONFIG_FSL_MMC +#ifdef CONFIG_CMD_MMC + +u32 *imx_esdhc_base_addr; -int sdhc_init(void) +int esdhc_gpio_init(void) { u32 interface_esdhc = 0; - s32 status = 0; + s32 status = 0; + u32 pad = 0; - interface_esdhc = (readl(SRC_BASE_ADDR + 0x4) & (0x00180000)) >> 19; + interface_esdhc = (readl(SRC_BASE_ADDR + 0x4) & (0x00180000)) >> 19; + + printf("interface_esdhc: %d\n", interface_esdhc); switch (interface_esdhc) { - case 0: + case 0: + imx_esdhc_base_addr = (u32 *)MMC_SDHC1_BASE_ADDR; - esdhc_base_pointer = (volatile u32 *)MMC_SDHC1_BASE_ADDR; + pad = PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; mxc_request_iomux(MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); @@ -409,52 +412,58 @@ int sdhc_init(void) IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); mxc_request_iomux(MX51_PIN_SD1_DATA3, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); - mxc_iomux_set_pad(MX51_PIN_SD1_CMD, - PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | - PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | - PAD_CTL_PUE_PULL | - PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); - mxc_iomux_set_pad(MX51_PIN_SD1_CLK, - PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | - PAD_CTL_HYS_NONE | PAD_CTL_47K_PU | - PAD_CTL_PUE_PULL | - PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); - mxc_iomux_set_pad(MX51_PIN_SD1_DATA0, - PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | - PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | - PAD_CTL_PUE_PULL | - PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); - mxc_iomux_set_pad(MX51_PIN_SD1_DATA1, - PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | - PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | - PAD_CTL_PUE_PULL | - PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); - mxc_iomux_set_pad(MX51_PIN_SD1_DATA2, - PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | - PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | - PAD_CTL_PUE_PULL | - PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); - mxc_iomux_set_pad(MX51_PIN_SD1_DATA3, - PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | - PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PD | - PAD_CTL_PUE_PULL | - PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX51_PIN_SD1_CMD, pad); + mxc_iomux_set_pad(MX51_PIN_SD1_CLK, pad); + mxc_iomux_set_pad(MX51_PIN_SD1_DATA0, pad); + mxc_iomux_set_pad(MX51_PIN_SD1_DATA1, pad); + mxc_iomux_set_pad(MX51_PIN_SD1_DATA2, pad); + mxc_iomux_set_pad(MX51_PIN_SD1_DATA3, pad); break; case 1: - status = 1; + imx_esdhc_base_addr = (u32 *)MMC_SDHC2_BASE_ADDR; + + pad = PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST; + + mxc_request_iomux(MX51_PIN_SD2_CMD, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX51_PIN_SD2_CLK, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + + mxc_request_iomux(MX51_PIN_SD2_DATA0, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX51_PIN_SD2_DATA1, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX51_PIN_SD2_DATA2, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX51_PIN_SD2_DATA3, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_iomux_set_pad(MX51_PIN_SD2_CMD, pad); + mxc_iomux_set_pad(MX51_PIN_SD2_CLK, pad); + mxc_iomux_set_pad(MX51_PIN_SD2_DATA0, pad); + mxc_iomux_set_pad(MX51_PIN_SD2_DATA1, pad); + mxc_iomux_set_pad(MX51_PIN_SD2_DATA2, pad); + mxc_iomux_set_pad(MX51_PIN_SD2_DATA3, pad); break; case 2: - status = 1; + status = -1; break; case 3: - status = 1; + status = -1; break; default: - status = 1; + status = -1; break; } - return status = 1; + return status; +} + +int board_mmc_init(void) +{ + if (!esdhc_gpio_init()) + return fsl_esdhc_mmc_init(gd->bd); + else + return -1; } #endif @@ -571,6 +580,66 @@ int board_late_init(void) for (i = 0; i < 100; ++i) udelay(10000); } + + /* Check CONFIG_ANDROID_RECOVERY_CMD_FILE to + judge if need to enter recovery mode */ + { + char *cmd_file_patch; + block_dev_desc_t *dev_desc = NULL; + disk_partition_t info; + ulong part_length; + int filelen; + + cmd_file_patch = getenv("android_recovery_cmd_file"); + if (!cmd_file_patch) + cmd_file_patch = CONFIG_ANDROID_RECOVERY_CMD_FILE; + + dev_desc = get_dev("mmc", 0); + + if (dev_desc==NULL) { + puts("** Block device MMC 0 not supported\n"); + return 1; + } + + if (get_partition_info (dev_desc, + CONFIG_ANDROID_CACHE_PARTITION, + &info)) { + printf("** Bad partition %d **\n", + CONFIG_ANDROID_CACHE_PARTITION); + return 1; + } + + if ((part_length = \ + ext2fs_set_blk_dev(dev_desc, + CONFIG_ANDROID_CACHE_PARTITION)) == 0) { + printf("** Bad partition - mmc 0:%d **\n", + CONFIG_ANDROID_CACHE_PARTITION); + ext2fs_close(); + return 1; + } + + if (!ext2fs_mount(part_length)) { + printf ("** Bad ext2 partition or disk - mmc 0:%d **\n", + CONFIG_ANDROID_CACHE_PARTITION); + ext2fs_close(); + return 1; + } + + filelen = ext2fs_open(CONFIG_ANDROID_RECOVERY_CMD_FILE); + + if (filelen > 0) { + puts("Recovery command file founded, switch to recovery mode!\n"); + /* Set env to recovery mode */ + setenv("bootargs_android", CONFIG_ANDROID_RECOVERY_BOOTARGS); + setenv("bootcmd_android", CONFIG_ANDROID_RECOVERY_BOOTCMD); + setenv("bootcmd", "run bootcmd_android"); + } else { + puts("Recovery command file not found, normal boot!\n"); + } + + ext2fs_close(); + } + #endif return 0; diff --git a/board/freescale/imx51/u-boot.lds b/board/freescale/mx51_bbg/u-boot.lds index 15d50ab..9ece8af 100644 --- a/board/freescale/imx51/u-boot.lds +++ b/board/freescale/mx51_bbg/u-boot.lds @@ -38,9 +38,9 @@ SECTIONS { /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - board/freescale/imx51/flash_header.o (.text.flasheader) + board/freescale/mx51_bbg/flash_header.o (.text.flasheader) cpu/arm_cortexa8/start.o - board/freescale/imx51/libimx51.a (.text) + board/freescale/mx51_bbg/libmx51_bbg.a (.text) lib_arm/libarm.a (.text) net/libnet.a (.text) drivers/mtd/libmtd.a (.text) diff --git a/board/stmp378x_dev/config.mk b/board/stmp378x_dev/config.mk index cfd24d1..7b57ec3 100644 --- a/board/stmp378x_dev/config.mk +++ b/board/stmp378x_dev/config.mk @@ -1,5 +1,6 @@ # # image should be loaded at 0x41008000 # +LDSCRIPT := $(SRCTREE)/board/$(VENDOR)/$(BOARD)/u-boot.lds TEXT_BASE = 0x41008000 |