diff options
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/mx6qarm2/mx6qarm2.c | 9 | ||||
| -rw-r--r-- | board/freescale/mx6qsabreauto/mx6qsabreauto.c | 34 | ||||
| -rw-r--r-- | board/freescale/mx6sabresd/mx6sabresd.c | 67 | ||||
| -rw-r--r-- | board/freescale/mx6slevk/mx6slevk.c | 41 |
4 files changed, 150 insertions, 1 deletions
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index 6c51f3a..7603abe 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -228,3 +228,12 @@ int checkboard(void) return 0; } + +#ifdef CONFIG_LDO_BYPASS_CHECK +/* no external pmic, always ldo_enable */ +void ldo_mode_set(int ldo_bypass) +{ + return; +} +#endif + diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 928dadf..1fe13e0 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -132,6 +132,40 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +#ifdef CONFIG_LDO_BYPASS_CHECK +void ldo_mode_set(int ldo_bypass) +{ + unsigned char value; + /* increase VDDARM/VDDSOC to support 1.2G chip */ + if (check_1_2G()) { + ldo_bypass = 0; /* ldo_enable on 1.2G chip */ + printf("1.2G chip, increase VDDARM_IN/VDDSOC_IN\n"); + /* increase VDDARM to 1.425V */ + if (i2c_read(0x8, 0x20, 1, &value, 1)) { + printf("Read SW1AB error!\n"); + return; + } + value &= ~0x3f; + value |= 0x2d; + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("Set SW1AB error!\n"); + return; + } + /* increase VDDSOC to 1.425V */ + if (i2c_read(0x8, 0x2e, 1, &value, 1)) { + printf("Read SW1C error!\n"); + return; + } + value &= ~0x3f; + value |= 0x2d; + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("Set SW1C error!\n"); + return; + } + } +} +#endif + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index d7d932e..722981e 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -24,6 +24,10 @@ #include <ipu_pixfmt.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> +#ifdef CONFIG_SYS_I2C_MXC +#include <i2c.h> +#include <asm/imx-common/mxc_i2c.h> +#endif DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ @@ -156,6 +160,68 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } +#ifdef CONFIG_LDO_BYPASS_CHECK +void ldo_mode_set(int ldo_bypass) +{ + unsigned char value; + /* increase VDDARM/VDDSOC to support 1.2G chip */ + if (check_1_2G()) { + ldo_bypass = 0; /* ldo_enable on 1.2G chip */ + printf("1.2G chip, increase VDDARM_IN/VDDSOC_IN\n"); + /* increase VDDARM to 1.425V */ + if (i2c_read(0x8, 0x20, 1, &value, 1)) { + printf("Read SW1AB error!\n"); + return; + } + value &= ~0x3f; + value |= 0x2d; + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("Set SW1AB error!\n"); + return; + } + /* increase VDDSOC to 1.425V */ + if (i2c_read(0x8, 0x2e, 1, &value, 1)) { + printf("Read SW1C error!\n"); + return; + } + value &= ~0x3f; + value |= 0x2d; + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("Set SW1C error!\n"); + return; + } + } + /* switch to ldo_bypass mode , boot on 800Mhz */ + if (ldo_bypass) { + /* decrease VDDARM to 1.175V */ + if (i2c_read(0x8, 0x20, 1, &value, 1)) { + printf("Read SW1AB error!\n"); + return; + } + value &= ~0x3f; + value |= 0x23; + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("Set SW1AB error!\n"); + return; + } + /* increase VDDSOC to 1.175V */ + if (i2c_read(0x8, 0x2e, 1, &value, 1)) { + printf("Read SW1C error!\n"); + return; + } + value &= ~0x3f; + value |= 0x23; + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("Set SW1C error!\n"); + return; + } + + set_anatop_bypass(); + printf("switch to ldo_bypass mode!\n"); + } +} +#endif + #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, @@ -516,3 +582,4 @@ int checkboard(void) puts("Board: MX6-SabreSD\n"); return 0; } + diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index aadad32..aeb418b 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013-2014 Freescale Semiconductor, Inc. * * Author: Fabio Estevam <fabio.estevam@freescale.com> * @@ -19,6 +19,10 @@ #include <fsl_esdhc.h> #include <mmc.h> #include <netdev.h> +#ifdef CONFIG_SYS_I2C_MXC +#include <i2c.h> +#include <asm/imx-common/mxc_i2c.h> +#endif DECLARE_GLOBAL_DATA_PTR; @@ -128,6 +132,41 @@ static int setup_fec(void) } #endif +#ifdef CONFIG_LDO_BYPASS_CHECK +void ldo_mode_set(int ldo_bypass) +{ + unsigned char value; + /* swith to ldo_bypass mode */ + if (ldo_bypass) { + /* decrease VDDARM to 1.15V */ + if (i2c_read(0x8, 0x20, 1, &value, 1)) { + printf("Read SW1AB error!\n"); + return; + } + value &= ~0x3f; + value |= 0x22; + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("Set SW1AB error!\n"); + return; + } + /* increase VDDSOC to 1.15V */ + if (i2c_read(0x8, 0x2e, 1, &value, 1)) { + printf("Read SW1C error!\n"); + return; + } + value &= ~0x3f; + value |= 0x22; + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("Set SW1C error!\n"); + return; + } + + set_anatop_bypass(); + printf("switch to ldo_bypass mode!\n"); + } + +} +#endif int board_early_init_f(void) { |