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Diffstat (limited to 'board/ti/beagle/beagle.h')
-rw-r--r--board/ti/beagle/beagle.h46
1 files changed, 44 insertions, 2 deletions
diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index ec0da6d..b22b653 100644
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -259,8 +259,8 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\
MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\
MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\
- MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M4)) /*GPIO_168*/\
- MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M4)) /*GPIO_183*/\
+ MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) /*I2C2_SCL*/\
+ MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) /*I2C2_SDA*/\
MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\
MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\
MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\
@@ -415,4 +415,46 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(SYS_BOOT5), (IDIS | PTD | DIS | M3)) /*DSS_DATA22*/\
MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/
+#define MUX_TINCANTOOLS_ZIPPY() \
+ MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\
+ MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\
+ MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\
+ MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\
+ MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\
+ MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\
+ MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M1)) /*MMC2_DIR_DAT0*/\
+ MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M1)) /*MMC2_DIR_DAT1*/\
+ MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M1)) /*MMC2_DIR_CMD*/\
+ MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\
+ MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTU | EN | M1)) /*MCSPI4_CLK*/\
+ MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M4)) /*GPIO_157*/\
+ MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | EN | M1)) /*MCSPI4_SIMO*/\
+ MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M1)) /*MCSPI4_SOMI*/\
+ MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | EN | M1)) /*MCSPI4_CS0*/\
+ MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_162*/\
+ MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\
+ MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M4)) /*GPIO_142*/\
+ MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/
+
+#define MUX_TINCANTOOLS_TRAINER() \
+ MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M4)) /*GPIO_130*/\
+ MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M4)) /*GPIO_131*/\
+ MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132*/\
+ MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133*/\
+ MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M4)) /*GPIO_134*/\
+ MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M4)) /*GPIO_135*/\
+ MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M4)) /*GPIO_136*/\
+ MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137*/\
+ MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M4)) /*GPIO_138*/\
+ MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\
+ MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) /*GPIO_140*/\
+ MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) /*GPIO_141*/\
+ MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTU | EN | M4)) /*GPIO_162*/
+
+#define MUX_KBADC_BEAGLEFPGA() \
+ MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTU | DIS | M1)) /*MCSPI4_CLK*/\
+ MUX_VAL(CP(MCBSP1_DX), (IDIS | PTU | DIS | M1)) /*MCSPI4_SIMO*/\
+ MUX_VAL(CP(MCBSP1_DR), (IEN | PTU | EN | M1)) /*MCSPI4_SOMI*/\
+ MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTU | DIS | M1)) /*MCSPI4_CS0*/
+
#endif