diff options
Diffstat (limited to 'board/sc520_spunk/sc520_spunk.c')
| -rw-r--r-- | board/sc520_spunk/sc520_spunk.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/board/sc520_spunk/sc520_spunk.c b/board/sc520_spunk/sc520_spunk.c index d119a7d..038d479 100644 --- a/board/sc520_spunk/sc520_spunk.c +++ b/board/sc520_spunk/sc520_spunk.c @@ -256,11 +256,11 @@ static void bus_init(void) if (version) { /* set up the GP IO pins (for the Spunk board) */ - write_mmcr_word(SC520_PIOPFS31_16, 0xfff0); /* set the GPIO pin function 31-16 reg */ - write_mmcr_word(SC520_PIOPFS15_0, 0x000f); /* set the GPIO pin function 15-0 reg */ - write_mmcr_word(SC520_PIODIR31_16, 0x000f); /* set the GPIO direction 31-16 reg */ - write_mmcr_word(SC520_PIODIR15_0, 0x1ff0); /* set the GPIO direction 15-0 reg */ - write_mmcr_byte(SC520_CSPFS, 0xc0); /* set the CS pin function reg */ + write_mmcr_word(SC520_PIOPFS31_16, 0xfff0); /* set the GPIO pin function 31-16 reg */ + write_mmcr_word(SC520_PIOPFS15_0, 0x000f); /* set the GPIO pin function 15-0 reg */ + write_mmcr_word(SC520_PIODIR31_16, 0x000f); /* set the GPIO direction 31-16 reg */ + write_mmcr_word(SC520_PIODIR15_0, 0x1ff0); /* set the GPIO direction 15-0 reg */ + write_mmcr_byte(SC520_CSPFS, 0xc0); /* set the CS pin function reg */ write_mmcr_byte(SC520_CLKSEL, 0x70); write_mmcr_word(SC520_PIOCLR31_16, 0x0003); /* reset SSI chip-selects */ @@ -268,11 +268,11 @@ static void bus_init(void) } else { /* set up the GP IO pins (for the Hyglo board) */ - write_mmcr_word(SC520_PIOPFS31_16, 0xffc0); /* set the GPIO pin function 31-16 reg */ - write_mmcr_word(SC520_PIOPFS15_0, 0x1e7f); /* set the GPIO pin function 15-0 reg */ - write_mmcr_word(SC520_PIODIR31_16, 0x003f); /* set the GPIO direction 31-16 reg */ - write_mmcr_word(SC520_PIODIR15_0, 0xe180); /* set the GPIO direction 15-0 reg */ - write_mmcr_byte(SC520_CSPFS, 0x00); /* set the CS pin function reg */ + write_mmcr_word(SC520_PIOPFS31_16, 0xffc0); /* set the GPIO pin function 31-16 reg */ + write_mmcr_word(SC520_PIOPFS15_0, 0x1e7f); /* set the GPIO pin function 15-0 reg */ + write_mmcr_word(SC520_PIODIR31_16, 0x003f); /* set the GPIO direction 31-16 reg */ + write_mmcr_word(SC520_PIODIR15_0, 0xe180); /* set the GPIO direction 15-0 reg */ + write_mmcr_byte(SC520_CSPFS, 0x00); /* set the CS pin function reg */ write_mmcr_byte(SC520_CLKSEL, 0x70); write_mmcr_word(SC520_PIOCLR15_0, 0x0180); /* reset SSI chip-selects */ @@ -656,7 +656,7 @@ ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len) offset |= addr[i]; } - return read_mmcr_byte(SC520_SYSINFO) ? + return read_mmcr_byte(SC520_SYSINFO) ? spi_eeprom_read(1, offset, buffer, len) : mw_eeprom_read(1, offset, buffer, len); } @@ -672,7 +672,7 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len) offset |= addr[i]; } - return read_mmcr_byte(SC520_SYSINFO) ? + return read_mmcr_byte(SC520_SYSINFO) ? spi_eeprom_write(1, offset, buffer, len) : mw_eeprom_write(1, offset, buffer, len); } |