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Diffstat (limited to 'board/olimex/mx23_olinuxino/mx23_olinuxino.c')
-rw-r--r--board/olimex/mx23_olinuxino/mx23_olinuxino.c46
1 files changed, 44 insertions, 2 deletions
diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
index e2a03a1..313ab20 100644
--- a/board/olimex/mx23_olinuxino/mx23_olinuxino.c
+++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
@@ -30,13 +30,25 @@ int board_early_init_f(void)
/* SSP0 clock at 96MHz */
mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
+ return 0;
+}
+
#ifdef CONFIG_CMD_USB
- /* Enable LAN9512 */
+int board_ehci_hcd_init(int port)
+{
+ /* Enable LAN9512 (Maxi) or GL850G (Mini) USB HUB power. */
gpio_direction_output(MX23_PAD_GPMI_ALE__GPIO_0_17, 1);
-#endif
+ udelay(100);
+ return 0;
+}
+int board_ehci_hcd_exit(int port)
+{
+ /* Enable LAN9512 (Maxi) or GL850G (Mini) USB HUB power. */
+ gpio_direction_output(MX23_PAD_GPMI_ALE__GPIO_0_17, 0);
return 0;
}
+#endif
int dram_init(void)
{
@@ -66,3 +78,33 @@ int board_init(void)
return 0;
}
+
+/* Fine-tune the DRAM configuration. */
+void mxs_adjust_memory_params(uint32_t *dram_vals)
+{
+ /* Enable Auto Precharge. */
+ dram_vals[3] |= 1 << 8;
+ /* Enable Fast Writes. */
+ dram_vals[5] |= 1 << 8;
+ /* tEMRS = 3*tCK */
+ dram_vals[10] &= ~(0x3 << 8);
+ dram_vals[10] |= (0x3 << 8);
+ /* CASLAT = 3*tCK */
+ dram_vals[11] &= ~(0x3 << 0);
+ dram_vals[11] |= (0x3 << 0);
+ /* tCKE = 1*tCK */
+ dram_vals[12] &= ~(0x7 << 0);
+ dram_vals[12] |= (0x1 << 0);
+ /* CASLAT_LIN_GATE = 3*tCK , CASLAT_LIN = 3*tCK, tWTR=2*tCK */
+ dram_vals[13] &= ~((0xf << 16) | (0xf << 24) | (0xf << 0));
+ dram_vals[13] |= (0x6 << 16) | (0x6 << 24) | (0x2 << 0);
+ /* tDAL = 6*tCK */
+ dram_vals[15] &= ~(0xf << 16);
+ dram_vals[15] |= (0x6 << 16);
+ /* tREF = 1040*tCK */
+ dram_vals[26] &= ~0xffff;
+ dram_vals[26] |= 0x0410;
+ /* tRAS_MAX = 9334*tCK */
+ dram_vals[32] &= ~0xffff;
+ dram_vals[32] |= 0x2475;
+}