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Diffstat (limited to 'board/isee/igep0046/igep0046.c')
-rw-r--r--board/isee/igep0046/igep0046.c554
1 files changed, 487 insertions, 67 deletions
diff --git a/board/isee/igep0046/igep0046.c b/board/isee/igep0046/igep0046.c
index cdc0466..d3877d8 100644
--- a/board/isee/igep0046/igep0046.c
+++ b/board/isee/igep0046/igep0046.c
@@ -32,10 +32,12 @@
#include <power/pmic.h>
#include <power/pfuze100_pmic.h>
#include "pfuze.h"
-#include "igep0046_eeprom.h"
#include "../common/igep_common.h"
+#include "../common/igep_eeprom.h"
+#include "../common/igep_test.h"
#include <usb.h>
#include <mmc.h>
+#include <net.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -92,6 +94,9 @@ DECLARE_GLOBAL_DATA_PTR;
#define GPIO_LED_RED2 IMX_GPIO_NR(4, 20)
#define GPIO_LED_GREEN2 IMX_GPIO_NR(4, 17)
+/* Define Revision */
+#define TEST_REVISION 4
+
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
@@ -187,11 +192,12 @@ static iomux_v3_cfg_t const init_pads[] =
MX6_PAD_CSI0_DAT7__GPIO5_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL),
#endif
};
-#define STATION 0x01
-const uchar igep_mac0 [6] = { 0x02, 0xBA, 0xD0, 0xBA, 0xD0, STATION };
+#define STATION 0x02
+const uchar igep_mac0 [6] = { 0x02, 0xBA, 0xD0, 0xBB, 0xD1, STATION };
uchar enetaddr[6];
static int igep_eeprom_valid = 0;
static struct igep_mf_setup igep0046_eeprom_config;
+static int net_fail = 0;
/* I2C MUX */
#ifdef CONFIG_SYS_I2C
@@ -406,7 +412,9 @@ int board_eth_init(bd_t *bis)
get_mac_address();
setup_iomux_enet();
#ifdef CONFIG_FEC_MXC
- cpu_eth_init(bis);
+ if(cpu_eth_init(bis)){
+ net_fail = 1;
+ }
#endif
return 0;
}
@@ -421,19 +429,265 @@ int board_early_init_f(void)
setup_iomux_uart();
imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads));
+ return 0;
+}
- /* configure LEDS - SPL = 1 YELLOW */
- gpio_direction_output(GPIO_LED_RED1, 1);
- gpio_direction_output(GPIO_LED_GREEN1, 1);
+/* ------------- HERE IT WILL GO THE TEST FUNCTIONS THAT ITS EASIER TO BE HERE ------------- */
+
+void error_loop(int casee){
+
+ int su = 1;
+ /* Turn off LEDs */
+ gpio_direction_output(GPIO_LED_RED1, 0);
+ gpio_direction_output(GPIO_LED_GREEN1, 0);
gpio_direction_output(GPIO_LED_RED2, 0);
gpio_direction_output(GPIO_LED_GREEN2, 0);
+
+ switch (casee){
+ case 0:
+ /* I2C BUS ERROR */
+ /* Turn on LED combination to notify I2C FAILED */
+ /* We will infinite loop here 1 every 1 sec, combination is red-green switching every sec */
+ while(1){
+ if (su){
+ gpio_direction_output(GPIO_LED_RED1, 1);
+ gpio_direction_output(GPIO_LED_GREEN1, 0);
+ gpio_direction_output(GPIO_LED_RED2, 0);
+ gpio_direction_output(GPIO_LED_GREEN2, 1);
+ su=0;
+ }else{
+ gpio_direction_output(GPIO_LED_RED1, 0);
+ gpio_direction_output(GPIO_LED_GREEN1, 1);
+ gpio_direction_output(GPIO_LED_RED2, 1);
+ gpio_direction_output(GPIO_LED_GREEN2, 0);
+ su=1;
+ }
+ mdelay(500);
+ }
+ break;
+ case 1:
+ /* EEPROM ERROR */
+ while(1){
+ if (su){
+ gpio_direction_output(GPIO_LED_RED1, 1);
+ gpio_direction_output(GPIO_LED_GREEN1, 1);
+ gpio_direction_output(GPIO_LED_RED2, 0);
+ gpio_direction_output(GPIO_LED_GREEN2, 0);
+ su=0;
+ }else{
+ gpio_direction_output(GPIO_LED_RED1, 0);
+ gpio_direction_output(GPIO_LED_GREEN1, 0);
+ gpio_direction_output(GPIO_LED_RED2, 1);
+ gpio_direction_output(GPIO_LED_GREEN2, 1);
+ su=1;
+ }
+ mdelay(500);
+ }
+ break;
+ case 2:
+ /* SDRAM ANY CHIP ERROR */
+ while(1){
+ if (su){
+ gpio_direction_output(GPIO_LED_RED1, 1);
+ gpio_direction_output(GPIO_LED_GREEN1, 1);
+ gpio_direction_output(GPIO_LED_RED2, 0);
+ gpio_direction_output(GPIO_LED_GREEN2, 0);
+ su=0;
+ }else{
+ gpio_direction_output(GPIO_LED_RED1, 0);
+ gpio_direction_output(GPIO_LED_GREEN1, 0);
+ gpio_direction_output(GPIO_LED_RED2, 0);
+ gpio_direction_output(GPIO_LED_GREEN2, 0);
+ su=1;
+ }
+ mdelay(500);
+ }
+ break;
+ }
+}
+
+int test_i2c(void){
+
+ puts("Testing I2C...\n");
+ /* First we will test I2C */
+ if (setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1)){
+ puts("I2C: Bus 2 Error\n");
+ return 1;
+ }
+ if(setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2)){
+ puts("I2C: Bus 3 Error\n");
+ return 1;
+ }
+ mdelay(2);
return 0;
}
-int board_init(void)
+uint8_t test_SDRAM(void)
+{
+ //dcache_disable();
+ int i = 0;
+ uint8_t result = 0;
+ uint64_t* file1 = 0;
+ uint64_t* file2 = 0;
+ uint64_t* file3 = 0;
+ uint64_t* file4 = 0;
+ int crc_value1 = 0;
+ int crc_value2 = 0;
+ int crc_value3 = 0;
+ int crc_value4 = 0;
+ int bytes = 1*1024*1024;
+
+ file1 = (uint64_t*) 0x20000000;
+ file2 = (uint64_t*) 0x40000000;
+ file3 = (uint64_t*) 0x60000000;
+ file4 = (uint64_t*) 0x80000000;
+
+/*
+ for(i=0; i<bytes;i++){
+ file1[i] = i%16;
+ file2[i] = i%16;
+ file3[i] = i%16;
+ file4[i] = i%16;
+ }
+*/
+ for(i=0; i<bytes;i++){
+ switch (i%6) {
+ case 0:
+ file1[i] = 0x0000AAAAULL;
+ file2[i] = (0x33330000ULL << 16);
+ file3[i] = (0x0000AAAAULL << 32);
+ file4[i] = (0x33330000ULL << 48);
+ break;
+ case 1:
+ file1[i] = 0x00005555ULL;
+ file2[i] = (0x99990000ULL << 16);
+ file3[i] = (0x00005555ULL << 32);
+ file4[i] = (0x99990000ULL << 48);
+ break;
+ case 2:
+ file1[i] = 0x0000CCCCULL;
+ file2[i] = (0x66660000ULL << 16);
+ file3[i] = (0x0000CCCCULL << 32);
+ file4[i] = (0x66660000ULL << 48);
+ break;
+ case 3:
+ file1[i] = 0x0000AAAAULL;
+ file2[i] = (0x33330000ULL << 16);
+ file3[i] = (0x0000AAAAULL << 32);
+ file4[i] = (0x00003333ULL << 48);
+ break;
+ case 4:
+ file1[i] = 0x00005555ULL;
+ file2[i] = (0x99990000ULL << 16);
+ file3[i] = (0x00005555ULL << 32);
+ file4[i] = (0x00009999ULL << 48);
+ break;
+ case 5:
+ file1[i] = 0x0000CCCCULL;
+ file2[i] = (0x66660000ULL << 16);
+ file3[i] = (0x0000CCCCULL << 32);
+ file4[i] = (0x66660000ULL << 48);
+ break;
+ default:
+ puts("Test RAM error \n");
+ }
+ }
+
+ /* crc file 1 - CHIP 1 */
+ crc_value1 = crc32(0, (const unsigned char*) file1, bytes);
+ /* crc file 2 - CHIP 2 */
+ crc_value2 = crc32(0, (const unsigned char*) file2, bytes);
+ /* crc file 3 - CHIP 3 */
+ crc_value3 = crc32(0, (const unsigned char*) file3, bytes);
+ /* crc file 4 - CHIP 4 */
+ crc_value4 = crc32(0, (const unsigned char*) file4, bytes);
+
+ printf("CHIP 1 U500 crc32: 0x%x \n", crc_value1);
+ printf("CHIP 2 U501 crc32: 0x%x \n", crc_value2);
+ printf("CHIP 3 U502 crc32: 0x%x \n", crc_value3);
+ printf("CHIP 4 U503 crc32: 0x%x \n", crc_value4);
+
+ //dcache_enable();
+
+ if(crc_value1 != KNOWN_CRC_CUSTOM_1MB_1){
+ /* Chip 1 Fail */
+ result = result + 0x01;
+ }
+ if(crc_value2 != KNOWN_CRC_CUSTOM_1MB_2){
+ /* Chip 2 Fail */
+ result = result + 0x02;
+ }
+ if(crc_value3 != KNOWN_CRC_CUSTOM_1MB_3){
+ /* Chip 3 Fail */
+ result = result + 0x04;
+ }
+ if(crc_value4 != KNOWN_CRC_CUSTOM_1MB_4){
+ /* Chip 4 Fail */
+ result = result + 0x08;
+ }
+
+ /* RESULT */
+ return result;
+}
+
+int test_MMC(int who)
{
+ struct mmc *mmc;
+
+ if(who){
+ /* eMMC case */
+ mmc = find_mmc_device(1);
+ }else{
+ /* SD case */
+ mmc = find_mmc_device(0);
+ }
+
+ if (!mmc){
+ return 1;
+ }
+
+ if (mmc_init(mmc)){
+ return 1;
+ }
- /* configure LEDS - UBOOT = 2 YELLOW */
+ if (IS_SD(mmc)){
+ return 0;
+ }else{
+ return 0;
+ }
+ return 0;
+}
+
+int test_ETH(void)
+{
+ net_ping_ip = string_to_ip("192.168.2.171");
+ net_ip = string_to_ip("192.168.2.101");
+ net_netmask = string_to_ip("255.255.255.0");
+ net_gateway = string_to_ip("192.168.2.1");
+
+ /* Just to avoid warning */
+ if (net_ping_ip.s_addr == 0){
+ return CMD_RET_USAGE;
+ }
+
+ /* Check if network is already down */
+ if(net_fail){
+ return 1;
+ }
+ /*
+ else{
+ if (net_loop(5) < 0) {
+ printf("ping failed; host 192.168.2.171 is not alive\n");
+ return 1;
+ }
+ }
+ */
+ return 0;
+}
+
+int board_init(void)
+{
+ /* Configure LEDS - UBOOT = 2 YELLOW */
gpio_direction_output(GPIO_LED_RED1, 1);
gpio_direction_output(GPIO_LED_GREEN1, 1);
gpio_direction_output(GPIO_LED_RED2, 1);
@@ -456,7 +710,6 @@ int board_init(void)
#ifdef CONFIG_USB_EHCI_MX6
setup_usb();
#endif
-
return 0;
}
@@ -491,46 +744,8 @@ static inline unsigned int pcb_version(void)
}
int board_late_init(void)
-{
-
- u32 crc_value = 0;
- u32 crc_save_value;
-
- if(check_eeprom() != 0){
- printf("EEPROM: not found\n");
- }else{
- /* Read configuration from eeprom */
- if(eeprom46_read_setup(0, (char*) &igep0046_eeprom_config, sizeof(struct igep_mf_setup)))
- printf("EEPROM: read fail\n");
- /* Verify crc32 */
-
- printf("EEPROM: read %d bytes \n", sizeof(struct igep_mf_setup));
- printf("---------------------------- |!| IGEP STRUCT |!| ----------------------------\n");
- printf("magic_id: 0x%x \n", igep0046_eeprom_config.magic_id);
- printf("crc32: 0x%x \n", igep0046_eeprom_config.crc32);
- printf("board_uuid: %.36s \n", igep0046_eeprom_config.board_uuid);
- printf("board_pid: %.16s \n", igep0046_eeprom_config.board_pid);
- printf("model: %.8s \n", igep0046_eeprom_config.model);
- printf("variant: %.9s \n", igep0046_eeprom_config.variant);
- printf("manf_of: %.6s \n", igep0046_eeprom_config.manf_of);
- printf("manf_timestamp: %.19s \n", igep0046_eeprom_config.manf_timestamp);
- printf("bmac0: %.17s \n", igep0046_eeprom_config.bmac0);
- printf("bmac1: %.17s \n", igep0046_eeprom_config.bmac1);
- printf("-----------------------------------------------------------------------------\n");
-
-
- crc_save_value = igep0046_eeprom_config.crc32;
- igep0046_eeprom_config.crc32 = 0;
- crc_value = crc32(0, (const unsigned char*) &igep0046_eeprom_config, sizeof(struct igep_mf_setup));
- printf("crc32 calculated: 0x%x \n", crc_value);
- if(crc_save_value != crc_value){
- printf("EEPROM: CRC32 failed. Loading default MAC\n");
- }else{
- printf("EEPROM: CRC32 OK! Loading MAC from eeprom\n");
- igep_eeprom_valid = 1;
- }
- }
-
+{
+ uint64_t cpuid = 0;
checkboard();
switch (pcb_version()) {
case PCB_REV_A:
@@ -570,8 +785,111 @@ int board_late_init(void)
setenv("fdt_file", "");
break;
}
+
+ /* Get CPU ID */
+ cpuid = ((uint64_t)readl(0x21bc420) << 32) | (readl(0x21bc410));
+ printf("CPU ID: 0x%llx \n",cpuid);
+ return 0;
+}
+
+#ifdef CONFIG_LAST_STAGE_INIT
+int last_stage_init(void){
+
+ /* This is the function that will be called last before running bootcmd u-boot */
+ uint16_t test = 0;
+ //uint8_t ramtest = 0;
+ uint64_t cpuid = 0;
+
+ /* We need to read SPL eeprom struct to acquire whose test have already being done */
+ puts("---------------------------- |!| ISEE UBOOT TEST START |!| ----------------------------\n");
+ /* Get SPL last test */
+ test = load_test(SPL_MAGIC_ID_COUNTER);
+ if (test == 0x4000){
+ puts("SPL GET TEST FAILED.\n");
+
+ }else if (test == 0xfff0){
+ puts("I2C OK.\n");
+ puts("EEPROM OK.\n");
+ puts("POWER OK.\n");
+ puts("CPU OK.\n");
+ puts("SD OK.\n");
+ puts("REV OK.\n");
+ puts("IRAM OK.\n");
+ puts("SDRAM OK.\n");
+ puts("CPUID OK.\n");
+ }else{
+ puts("SOME SPL TEST FAILED, PERFORM MANUAL CHECK.\n");
+ }
+
+ /* Test RAM Now this will be done in SPL !!!
+ ramtest = test_SDRAM();
+
+ if((ramtest & 0x01) == 0x01){
+ puts("SDRAM CHIP 1 FAIL.\n");
+ }
+
+ if((ramtest & 0x02) == 0x02){
+ puts("SDRAM CHIP 2 FAIL.\n");
+ }
+
+ if((ramtest & 0x04) == 0x04){
+ puts("SDRAM CHIP 3 FAIL.\n");
+ }
+
+ if((ramtest & 0x08) == 0x08){
+ puts("SDRAM CHIP 4 FAIL.\n");
+ }
+
+ if(!ramtest){
+ puts("RAM OK.\n");
+ test = test + 0xF0;
+ }else{
+ puts("RAM FAIL.\n");
+ }
+ */
+
+ /* Test eMMC */
+ if(test_MMC(1)){
+ puts("eMMC FAIL.\n");
+ }else{
+ puts("eMMC OK.\n");
+ test = test + 0x08;
+ }
+
+ /* Test Ethernet */
+ if(test_ETH()){
+ puts("Ethernet FAIL.\n");
+ }else{
+ puts("Ethernet OK.\n");
+ test = test + 0x04;
+ }
+
+ /*
+ test_SATA();
+ test_USB();
+ */
+
+ /* We will reserve 2 bits for future test development like SATA, USB */
+ /* So for now add test the last 3 bits to 1 to forma a 0xffff if everything is ok */
+ test = test + 0x03;
+
+ /* Get CPU ID */
+ cpuid = ((uint64_t)readl(0x21bc420) << 32) | (readl(0x21bc410));
+ puts("CPUID OK.\n");
+
+ printf("U-BOOT Test Result: 0x%x\n",test);
+
+ /* Save Results to EEPROM */
+ if (save_test(test,UB_MAGIC_ID,cpuid)){
+ puts("ISEE U-BOOT TEST FAIL.\n");
+ }else{
+ puts("ISEE U-BOOT TEST OK.\n");
+ }
+
+ /* Let test process continue, bootcmd take us to kernel load via tftp and jump to it */
return 0;
}
+#endif
#ifdef CONFIG_LDO_BYPASS_CHECK
/* TODO, use external pmic, for now always ldo_enable */
@@ -942,6 +1260,12 @@ void board_init_f(ulong dummy)
/* iomux and setup of UART and leds */
board_early_init_f();
+ /* configure LEDS - SPL = 1 YELLOW */
+ gpio_direction_output(GPIO_LED_RED1, 1);
+ gpio_direction_output(GPIO_LED_GREEN1, 1);
+ gpio_direction_output(GPIO_LED_RED2, 0);
+ gpio_direction_output(GPIO_LED_GREEN2, 0);
+
/* setup GP timer */
timer_init();
@@ -969,11 +1293,56 @@ void board_init_f(ulong dummy)
/* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
/* its our chance to print info about boot device */
void spl_board_init(void)
-{
+{
+ u32 boot_device = 0;
+ uint64_t cpuid = 0;
+ u16 test = 0;
+ uint8_t ramtest = 0;
- /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 */
- u32 boot_device = spl_boot_device();
+ /* Minimal init sequence for pmic setup of igep imx6 boards */
+ #ifdef CONFIG_BASE0040
+ reset_audio();
+ #endif
+ /* First we will test I2C */
+ puts("---------------------------- |!| ISEE SPL TEST START |!| ----------------------------\n");
+
+ /* Test I2C */
+ #ifdef CONFIG_SYS_I2C
+ if(test_i2c()){
+ puts("I2C FAIL.\n");
+ error_loop(0);
+ }else{
+ puts("I2C OK.\n");
+ }
+ #endif
+
+ /* Test EEPROM */
+ if(test_eeprom()){
+ puts("EEPROM FAIL.\n");
+ error_loop(1);
+ }else{
+ puts("EEPROM OK.\n");
+ }
+ mdelay(2);
+
+ /* If we are here we put test variable to 11000000 00000000 */
+ test = 0xC000;
+
+ /* Next we would want to know the counter just for control purpose */
+ //test_counter_check(SPL_TEST_COUNTER_OFF);
+
+ /* Test Power, PMIC */
+ if(power_init_board()){
+ puts("POWER FAIL.\n");
+ }else{
+ puts("POWER OK.\n");
+ /* Test = 11100000 00000000 */
+ test = test + 0x2000;
+ }
+
+ /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 */
+ boot_device = spl_boot_device();
switch (boot_device) {
case BOOT_DEVICE_MMC1:
puts("Booting from MMC\n");
@@ -987,27 +1356,78 @@ void spl_board_init(void)
default:
puts("Unknown boot device\n");
}
+
+ /* If we are here (imx6) case CPU and SD should be working */
+ puts("CPU OK.\n");
+ puts("SD OK.\n");
+ /* Test = 11111000 00000000 */
+ test = test + 0x1800;
- /* Minimal init sequence for pmic setup of igep imx6 boards */
- #ifdef CONFIG_BASE0040
- reset_audio();
- #endif
+ /* Test Revision PINs */
+ if (!(pcb_version() == TEST_REVISION)) {
+ puts("REV FAIL.\n");
+ }else{
+ puts("REV OK.\n");
+ /* Test = 11111100 00000000 */
+ test = test + 0x400;
+ }
- #ifdef CONFIG_SYS_I2C
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
- mdelay(1);
- #endif
+ /* Internal RAM is working */
+ puts("Internal RAM OK.\n");
+ /* Test = 11111110 00000000 */
+ test = test + 0x200;
+
+ /* Test SDRAM */
+ ramtest = test_SDRAM();
+
+ if((ramtest & 0x01) == 0x01){
+ puts("SDRAM CHIP 1 FAIL.\n");
+ }
+
+ if((ramtest & 0x02) == 0x02){
+ puts("SDRAM CHIP 2 FAIL.\n");
+ }
+
+ if((ramtest & 0x04) == 0x04){
+ puts("SDRAM CHIP 3 FAIL.\n");
+ }
+
+ if((ramtest & 0x08) == 0x08){
+ puts("SDRAM CHIP 4 FAIL.\n");
+ }
+
+ if(!ramtest){
+ puts("SDRAM OK.\n");
+ test = test + 0xF0;
+ }else{
+ puts("SDRAM FAIL.\n");
+ /* Do not jump to UBOOT until SDRAM hardware is good */
+ error_loop(2);
+ }
+
+ /* Get CPU ID */
+ cpuid = ((uint64_t)readl(0x21bc420) << 32) | (readl(0x21bc410));
+ puts("CPUID OK.\n");
+ /* Test = 11111111 00000000 */
+ test = test + 0x100;
- /* PMIC init */
- power_init_board();
+ /* Print Test Result */
+ printf("SPL Test Result: 0x%x\n",test);
+
+ /* Save Results to EEPROM */
+ if (save_test(test,SPL_MAGIC_ID,cpuid)){
+ puts("ISEE SPL TEST FAIL.\n");
+ }else{
+ puts("ISEE SPL TEST OK.\n");
+ }
+ /* Jump to U-BOOT */
}
#ifdef CONFIG_SPL_OS_BOOT
-/* return 1 if we wish to boot to uboot vs os (falcon mode) */
+/* return 1 if we wish to boot to uboot vs 0 if we wish to falcon mode */
int spl_start_uboot(void)
{
- return 0;
+ return 1;
}
void spl_board_prepare_for_linux(void)
@@ -1053,4 +1473,4 @@ void spl_board_prepare_for_linux(void)
}
#endif
-#endif
+#endif \ No newline at end of file
generated by cgit v1.1 at 2024-05-12 15:14:56 +0000