diff options
Diffstat (limited to 'board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c')
| -rw-r--r-- | board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 01f5699..c09e2ae 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -498,7 +498,7 @@ int mmc_map_to_kernel_blk(int dev_no) { if (dev_no == 0 && mx6_esdhc_fused(USDHC1_BASE_ADDR)) dev_no = 1; - + return dev_no; } @@ -755,18 +755,16 @@ static int setup_fec(int fec_id) int ret; if (0 == fec_id) { - if (check_module_fused(MX6_MODULE_ENET1)) { + if (check_module_fused(MX6_MODULE_ENET1)) return -1; - } - + /* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); } else { - if (check_module_fused(MX6_MODULE_ENET2)) { + if (check_module_fused(MX6_MODULE_ENET2)) return -1; - } - + /* Use 50M anatop loopback REF_CLK2 for ENET2, clear gpr1[14], set gpr1[18]*/ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); |