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path: root/board/freescale/mx53_smd/flash_header.S
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Diffstat (limited to 'board/freescale/mx53_smd/flash_header.S')
-rw-r--r--board/freescale/mx53_smd/flash_header.S61
1 files changed, 31 insertions, 30 deletions
diff --git a/board/freescale/mx53_smd/flash_header.S b/board/freescale/mx53_smd/flash_header.S
index 0411f1b..8a1e091 100644
--- a/board/freescale/mx53_smd/flash_header.S
+++ b/board/freescale/mx53_smd/flash_header.S
@@ -109,29 +109,30 @@ plugin_start:
REG_LD_AND_STR_OP(26, 0x090, 0x4d444c44)
REG_LD_AND_STR_OP(27, 0x07c, 0x01370138)
REG_LD_AND_STR_OP(28, 0x080, 0x013b013c)
- REG_LD_AND_STR_OP(29, 0x018, 0x00001740)
- REG_LD_AND_STR_OP(30, 0x000, 0xc3190000)
- REG_LD_AND_STR_OP(31, 0x00c, 0x9f5152e3)
- REG_LD_AND_STR_OP(32, 0x010, 0xb68e8a63)
- REG_LD_AND_STR_OP(33, 0x014, 0x01ff00db)
- REG_LD_AND_STR_OP(34, 0x02c, 0x000026d2)
- REG_LD_AND_STR_OP(35, 0x030, 0x009f0e21)
- REG_LD_AND_STR_OP(36, 0x008, 0x12273030)
- REG_LD_AND_STR_OP(37, 0x004, 0x0002002d)
- REG_LD_AND_STR_OP(38, 0x01c, 0x00008032)
- REG_LD_AND_STR_OP(39, 0x01c, 0x00008033)
- REG_LD_AND_STR_OP(40, 0x01c, 0x00028031)
- REG_LD_AND_STR_OP(41, 0x01c, 0x052080b0)
- REG_LD_AND_STR_OP(42, 0x01c, 0x04008040)
- REG_LD_AND_STR_OP(43, 0x01c, 0x0000803a)
- REG_LD_AND_STR_OP(44, 0x01c, 0x0000803b)
- REG_LD_AND_STR_OP(45, 0x01c, 0x00028039)
- REG_LD_AND_STR_OP(46, 0x01c, 0x05208138)
- REG_LD_AND_STR_OP(47, 0x01c, 0x04008048)
- REG_LD_AND_STR_OP(48, 0x020, 0x00005800)
- REG_LD_AND_STR_OP(49, 0x040, 0x04b80003)
- REG_LD_AND_STR_OP(50, 0x058, 0x00022227)
- REG_LD_AND_STR_OP(51, 0x01C, 0x00000000)
+ REG_LD_AND_STR_OP(29, 0x0f8, 0x00000800)
+ REG_LD_AND_STR_OP(30, 0x018, 0x00001740)
+ REG_LD_AND_STR_OP(31, 0x000, 0xc3190000)
+ REG_LD_AND_STR_OP(32, 0x00c, 0x9f5152e3)
+ REG_LD_AND_STR_OP(33, 0x010, 0xb68e8a63)
+ REG_LD_AND_STR_OP(34, 0x014, 0x01ff00db)
+ REG_LD_AND_STR_OP(35, 0x02c, 0x000026d2)
+ REG_LD_AND_STR_OP(36, 0x030, 0x009f0e21)
+ REG_LD_AND_STR_OP(37, 0x008, 0x12273030)
+ REG_LD_AND_STR_OP(38, 0x004, 0x0002002d)
+ REG_LD_AND_STR_OP(39, 0x01c, 0x00008032)
+ REG_LD_AND_STR_OP(40, 0x01c, 0x00008033)
+ REG_LD_AND_STR_OP(41, 0x01c, 0x00028031)
+ REG_LD_AND_STR_OP(42, 0x01c, 0x052080b0)
+ REG_LD_AND_STR_OP(43, 0x01c, 0x04008040)
+ REG_LD_AND_STR_OP(44, 0x01c, 0x0000803a)
+ REG_LD_AND_STR_OP(45, 0x01c, 0x0000803b)
+ REG_LD_AND_STR_OP(46, 0x01c, 0x00028039)
+ REG_LD_AND_STR_OP(47, 0x01c, 0x05208138)
+ REG_LD_AND_STR_OP(48, 0x01c, 0x04008048)
+ REG_LD_AND_STR_OP(49, 0x020, 0x00005800)
+ REG_LD_AND_STR_OP(50, 0x040, 0x04b80003)
+ REG_LD_AND_STR_OP(51, 0x058, 0x00022227)
+ REG_LD_AND_STR_OP(52, 0x01C, 0x00000000)
REG_LD_AND_STR_END(ESDCTL_BASE_ADDR)
/*
@@ -206,13 +207,13 @@ return_sdp:
*/
quit_plugin:
pop {r0-r6, lr}
- ldr r4, DDR_DEST_ADDR
- str r4, [r0]
- ldr r4, COPY_SIZE
- str r4, [r1]
- mov r4, #0x400 /* Point to the second IVT table at offset 0x42C */
- add r4, r4, #0x2C
- str r4, [r2]
+ ldr r7, DDR_DEST_ADDR
+ str r7, [r0]
+ ldr r7, COPY_SIZE
+ str r7, [r1]
+ mov r7, #0x400 /* Point to the second IVT table at offset 0x42C */
+ add r7, r7, #0x2C
+ str r7, [r2]
mov r0, #1
bx lr /* return back to ROM code */