diff options
Diffstat (limited to 'board/dave/PPChameleonEVB/nand.c')
-rw-r--r-- | board/dave/PPChameleonEVB/nand.c | 49 |
1 files changed, 23 insertions, 26 deletions
diff --git a/board/dave/PPChameleonEVB/nand.c b/board/dave/PPChameleonEVB/nand.c index 09c0b04..4bc4257 100644 --- a/board/dave/PPChameleonEVB/nand.c +++ b/board/dave/PPChameleonEVB/nand.c @@ -21,7 +21,7 @@ */ #include <common.h> - +#include <asm/io.h> #if defined(CONFIG_CMD_NAND) @@ -31,31 +31,28 @@ * hardware specific access to control-lines * function borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c) */ -static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd) +static void ppchameleonevb_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *this = mtdinfo->priv; + struct nand_chip *this = mtd->priv; ulong base = (ulong) this->IO_ADDR_W; - switch(cmd) { - case NAND_CTL_SETCLE: - MACRO_NAND_CTL_SETCLE((unsigned long)base); - break; - case NAND_CTL_CLRCLE: - MACRO_NAND_CTL_CLRCLE((unsigned long)base); - break; - case NAND_CTL_SETALE: - MACRO_NAND_CTL_SETALE((unsigned long)base); - break; - case NAND_CTL_CLRALE: - MACRO_NAND_CTL_CLRALE((unsigned long)base); - break; - case NAND_CTL_SETNCE: - MACRO_NAND_ENABLE_CE((unsigned long)base); - break; - case NAND_CTL_CLRNCE: - MACRO_NAND_DISABLE_CE((unsigned long)base); - break; + if (ctrl & NAND_CTRL_CHANGE) { + if ( ctrl & NAND_CLE ) + MACRO_NAND_CTL_SETCLE((unsigned long)base); + else + MACRO_NAND_CTL_CLRCLE((unsigned long)base); + if ( ctrl & NAND_ALE ) + MACRO_NAND_CTL_CLRCLE((unsigned long)base); + else + MACRO_NAND_CTL_CLRALE((unsigned long)base); + if ( ctrl & NAND_NCE ) + MACRO_NAND_ENABLE_CE((unsigned long)base); + else + MACRO_NAND_DISABLE_CE((unsigned long)base); } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); } @@ -92,11 +89,11 @@ static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo) * argument are board-specific (per include/linux/mtd/nand.h): * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device - * - hwcontrol: hardwarespecific function for accesing control-lines + * - cmd_ctrl: hardwarespecific function for accesing control-lines * - dev_ready: hardwarespecific function for accesing device ready/busy line * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must * only be provided if a hardware ECC is available - * - eccmode: mode of ecc, see defines + * - ecc.mode: mode of ecc, see defines * - chip_delay: chip dependent delay for transfering data from array to * read regs (tR) * - options: various chip options. They can partly be set to inform @@ -108,9 +105,9 @@ static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo) int board_nand_init(struct nand_chip *nand) { - nand->hwcontrol = ppchameleonevb_hwcontrol; + nand->cmd_ctrl = ppchameleonevb_hwcontrol; nand->dev_ready = ppchameleonevb_device_ready; - nand->eccmode = NAND_ECC_SOFT; + nand->ecc.mode = NAND_ECC_SOFT; nand->chip_delay = NAND_BIG_DELAY_US; nand->options = NAND_SAMSUNG_LP_OPTIONS; return 0; |