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-rw-r--r--board/amcc/sequoia/sdram.c2
-rw-r--r--board/amcc/sequoia/u-boot-nand.lds2
-rw-r--r--board/amcc/sequoia/u-boot-ram.lds2
3 files changed, 3 insertions, 3 deletions
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c
index bde471c..b5c7d6d 100644
--- a/board/amcc/sequoia/sdram.c
+++ b/board/amcc/sequoia/sdram.c
@@ -40,7 +40,7 @@ extern int denali_wait_for_dlllock(void);
extern void denali_core_search_data_eye(void);
#if defined(CONFIG_NAND_SPL)
-/* Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
+/* Using arch/ppc/cpu/ppc4xx/speed.c to calculate the bus frequency is too big
* for the 4k NAND boot image so define bus_frequency to 133MHz here
* which is save for the refresh counter setup.
*/
diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds
index fb629e0..8a71bfa 100644
--- a/board/amcc/sequoia/u-boot-nand.lds
+++ b/board/amcc/sequoia/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
- cpu/ppc4xx/start.o (.text)
+ arch/ppc/cpu/ppc4xx/start.o (.text)
/* Align to next NAND block */
. = ALIGN(0x4000);
diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds
index e22dbec..c6a321e 100644
--- a/board/amcc/sequoia/u-boot-ram.lds
+++ b/board/amcc/sequoia/u-boot-ram.lds
@@ -50,7 +50,7 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
- cpu/ppc4xx/start.o (.text)
+ arch/ppc/cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)