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Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h')
-rw-r--r--arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h
index c82060d..3c551e9 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.h
@@ -22,14 +22,6 @@
#ifndef __FSL_CORENET_SERDES_H
#define __FSL_CORENET_SERDES_H
-/*
- * Note: For P5040, the fourth SerDes bank is on SerDes2, but U-boot currently
- * only supports one SerDes controller. For now, pretend that we have three
- * banks and 18 lanes on the P5040.
- */
-#define SRDS_MAX_LANES 18
-#define SRDS_MAX_BANK 3
-
enum srds_bank {
FSL_SRDS_BANK_1 = 0,
FSL_SRDS_BANK_2 = 1,