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-rw-r--r--arch/mips/dts/Makefile3
-rw-r--r--arch/mips/dts/ap121.dts43
-rw-r--r--arch/mips/dts/ap143.dts43
-rw-r--r--arch/mips/dts/ar933x.dtsi115
-rw-r--r--arch/mips/dts/ar934x.dtsi112
-rw-r--r--arch/mips/dts/qca953x.dtsi84
-rw-r--r--arch/mips/dts/tplink_wdr4300.dts53
7 files changed, 453 insertions, 0 deletions
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index b513918..a94b745 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -2,7 +2,10 @@
# SPDX-License-Identifier: GPL-2.0+
#
+dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
+dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
+dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
targets += $(dtb-y)
diff --git a/arch/mips/dts/ap121.dts b/arch/mips/dts/ap121.dts
new file mode 100644
index 0000000..e31f601
--- /dev/null
+++ b/arch/mips/dts/ap121.dts
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include "ar933x.dtsi"
+
+/ {
+ model = "AP121 Reference Board";
+ compatible = "qca,ap121", "qca,ar933x";
+
+ aliases {
+ spi0 = &spi0;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&xtal {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&spi0 {
+ spi-max-frequency = <25000000>;
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ memory-map = <0x9f000000 0x00800000>;
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ };
+};
diff --git a/arch/mips/dts/ap143.dts b/arch/mips/dts/ap143.dts
new file mode 100644
index 0000000..f53207e
--- /dev/null
+++ b/arch/mips/dts/ap143.dts
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include "qca953x.dtsi"
+
+/ {
+ model = "AP143 Reference Board";
+ compatible = "qca,ap143", "qca,qca953x";
+
+ aliases {
+ spi0 = &spi0;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&xtal {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&spi0 {
+ spi-max-frequency = <25000000>;
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ memory-map = <0x9f000000 0x00800000>;
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ };
+};
diff --git a/arch/mips/dts/ar933x.dtsi b/arch/mips/dts/ar933x.dtsi
new file mode 100644
index 0000000..00896b2
--- /dev/null
+++ b/arch/mips/dts/ar933x.dtsi
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "qca,ar933x";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ reg = <0>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ xtal: xtal {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-output-names = "xtal";
+ };
+ };
+
+ pinctrl {
+ u-boot,dm-pre-reloc;
+ compatible = "qca,ar933x-pinctrl";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x18040000 0x100>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ apb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ehci0: ehci@1b000100 {
+ compatible = "generic-ehci";
+ reg = <0x1b000100 0x100>;
+
+ status = "disabled";
+ };
+
+ uart0: uart@18020000 {
+ compatible = "qca,ar9330-uart";
+ reg = <0x18020000 0x20>;
+ interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ gmac0: eth@0x19000000 {
+ compatible = "qca,ag7240-mac";
+ reg = <0x19000000 0x200>;
+ phy = <&phy0>;
+ phy-mode = "rmii";
+
+ status = "disabled";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+ };
+
+ gmac1: eth@0x1a000000 {
+ compatible = "qca,ag7240-mac";
+ reg = <0x1a000000 0x200>;
+ phy = <&phy0>;
+ phy-mode = "rgmii";
+
+ status = "disabled";
+ };
+ };
+
+ spi0: spi@1f000000 {
+ compatible = "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+ interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
diff --git a/arch/mips/dts/ar934x.dtsi b/arch/mips/dts/ar934x.dtsi
new file mode 100644
index 0000000..7a036a8
--- /dev/null
+++ b/arch/mips/dts/ar934x.dtsi
@@ -0,0 +1,112 @@
+/*
+ * Copyright (C) 2016 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "qca,ar934x";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips74Kc";
+ reg = <0>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ xtal: xtal {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-output-names = "xtal";
+ };
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ apb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ehci0: ehci@1b000100 {
+ compatible = "generic-ehci";
+ reg = <0x1b000100 0x100>;
+
+ status = "disabled";
+ };
+
+ uart0: uart@18020000 {
+ compatible = "ns16550";
+ reg = <0x18020000 0x20>;
+ reg-shift = <2>;
+
+ status = "disabled";
+ };
+
+ gmac0: eth@0x19000000 {
+ compatible = "qca,ag934x-mac";
+ reg = <0x19000000 0x200>;
+ phy = <&phy0>;
+ phy-mode = "rgmii";
+
+ status = "disabled";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+ };
+
+ gmac1: eth@0x1a000000 {
+ compatible = "qca,ag934x-mac";
+ reg = <0x1a000000 0x200>;
+ phy = <&phy1>;
+ phy-mode = "rgmii";
+
+ status = "disabled";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy1: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+ };
+ };
+
+ spi0: spi@1f000000 {
+ compatible = "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
diff --git a/arch/mips/dts/qca953x.dtsi b/arch/mips/dts/qca953x.dtsi
new file mode 100644
index 0000000..870010f
--- /dev/null
+++ b/arch/mips/dts/qca953x.dtsi
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "qca,qca953x";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ reg = <0>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ xtal: xtal {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-output-names = "xtal";
+ };
+ };
+
+ pinctrl {
+ u-boot,dm-pre-reloc;
+ compatible = "qca,qca953x-pinctrl";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x18040000 0x100>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ apb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ uart0: uart@18020000 {
+ compatible = "ns16550";
+ reg = <0x18020000 0x20>;
+ reg-shift = <2>;
+ clock-frequency = <25000000>;
+ interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+ };
+
+ spi0: spi@1f000000 {
+ compatible = "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+ interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
diff --git a/arch/mips/dts/tplink_wdr4300.dts b/arch/mips/dts/tplink_wdr4300.dts
new file mode 100644
index 0000000..cfda4df
--- /dev/null
+++ b/arch/mips/dts/tplink_wdr4300.dts
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2016 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include "ar934x.dtsi"
+
+/ {
+ model = "TP-Link WDR4300 Board";
+ compatible = "tplink,wdr4300", "qca,ar934x";
+
+ aliases {
+ serial0 = &uart0;
+ spi0 = &spi0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&spi0 {
+ spi-max-frequency = <25000000>;
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ memory-map = <0x1e000000 0x00800000>;
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ };
+};
+
+&uart0 {
+ clock-frequency = <40000000>;
+ status = "okay";
+};
+
+&xtal {
+ clock-frequency = <40000000>;
+};
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