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-rw-r--r--arch/mips/cpu/mips32/start.S251
-rw-r--r--arch/mips/cpu/mips64/start.S110
-rw-r--r--arch/mips/cpu/u-boot.lds57
-rw-r--r--arch/mips/cpu/xburst/jz4740.c6
-rw-r--r--arch/mips/cpu/xburst/start.S56
5 files changed, 243 insertions, 237 deletions
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 51ce914..76abbaa 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -47,27 +47,16 @@
.set pop
.endm
- .macro setup_c0_status_reset
-#ifdef CONFIG_64BIT
- setup_c0_status ST0_KX 0
-#else
- setup_c0_status 0 0
-#endif
- .endm
-
-#define RVECENT(f,n) \
- b f; nop
-#define XVECENT(f,bev) \
- b f ; \
- li k0,bev
-
.set noreorder
.globl _start
.text
_start:
- RVECENT(reset,0) # U-boot entry point
- RVECENT(reset,1) # software reboot
+ /* U-boot entry point */
+ b reset
+ nop
+
+ .org 0x10
#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
/*
* Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
@@ -77,141 +66,39 @@ _start:
* device with correct parameters. This config option is board-specific.
*/
.word CONFIG_SYS_XWAY_EBU_BOOTCFG
- .word 0x00000000
-#else
- RVECENT(romReserved,2)
+ .word 0x0
#endif
- RVECENT(romReserved,3)
- RVECENT(romReserved,4)
- RVECENT(romReserved,5)
- RVECENT(romReserved,6)
- RVECENT(romReserved,7)
- RVECENT(romReserved,8)
- RVECENT(romReserved,9)
- RVECENT(romReserved,10)
- RVECENT(romReserved,11)
- RVECENT(romReserved,12)
- RVECENT(romReserved,13)
- RVECENT(romReserved,14)
- RVECENT(romReserved,15)
- RVECENT(romReserved,16)
- RVECENT(romReserved,17)
- RVECENT(romReserved,18)
- RVECENT(romReserved,19)
- RVECENT(romReserved,20)
- RVECENT(romReserved,21)
- RVECENT(romReserved,22)
- RVECENT(romReserved,23)
- RVECENT(romReserved,24)
- RVECENT(romReserved,25)
- RVECENT(romReserved,26)
- RVECENT(romReserved,27)
- RVECENT(romReserved,28)
- RVECENT(romReserved,29)
- RVECENT(romReserved,30)
- RVECENT(romReserved,31)
- RVECENT(romReserved,32)
- RVECENT(romReserved,33)
- RVECENT(romReserved,34)
- RVECENT(romReserved,35)
- RVECENT(romReserved,36)
- RVECENT(romReserved,37)
- RVECENT(romReserved,38)
- RVECENT(romReserved,39)
- RVECENT(romReserved,40)
- RVECENT(romReserved,41)
- RVECENT(romReserved,42)
- RVECENT(romReserved,43)
- RVECENT(romReserved,44)
- RVECENT(romReserved,45)
- RVECENT(romReserved,46)
- RVECENT(romReserved,47)
- RVECENT(romReserved,48)
- RVECENT(romReserved,49)
- RVECENT(romReserved,50)
- RVECENT(romReserved,51)
- RVECENT(romReserved,52)
- RVECENT(romReserved,53)
- RVECENT(romReserved,54)
- RVECENT(romReserved,55)
- RVECENT(romReserved,56)
- RVECENT(romReserved,57)
- RVECENT(romReserved,58)
- RVECENT(romReserved,59)
- RVECENT(romReserved,60)
- RVECENT(romReserved,61)
- RVECENT(romReserved,62)
- RVECENT(romReserved,63)
- XVECENT(romExcHandle,0x200) # bfc00200: R4000 tlbmiss vector
- RVECENT(romReserved,65)
- RVECENT(romReserved,66)
- RVECENT(romReserved,67)
- RVECENT(romReserved,68)
- RVECENT(romReserved,69)
- RVECENT(romReserved,70)
- RVECENT(romReserved,71)
- RVECENT(romReserved,72)
- RVECENT(romReserved,73)
- RVECENT(romReserved,74)
- RVECENT(romReserved,75)
- RVECENT(romReserved,76)
- RVECENT(romReserved,77)
- RVECENT(romReserved,78)
- RVECENT(romReserved,79)
- XVECENT(romExcHandle,0x280) # bfc00280: R4000 xtlbmiss vector
- RVECENT(romReserved,81)
- RVECENT(romReserved,82)
- RVECENT(romReserved,83)
- RVECENT(romReserved,84)
- RVECENT(romReserved,85)
- RVECENT(romReserved,86)
- RVECENT(romReserved,87)
- RVECENT(romReserved,88)
- RVECENT(romReserved,89)
- RVECENT(romReserved,90)
- RVECENT(romReserved,91)
- RVECENT(romReserved,92)
- RVECENT(romReserved,93)
- RVECENT(romReserved,94)
- RVECENT(romReserved,95)
- XVECENT(romExcHandle,0x300) # bfc00300: R4000 cache vector
- RVECENT(romReserved,97)
- RVECENT(romReserved,98)
- RVECENT(romReserved,99)
- RVECENT(romReserved,100)
- RVECENT(romReserved,101)
- RVECENT(romReserved,102)
- RVECENT(romReserved,103)
- RVECENT(romReserved,104)
- RVECENT(romReserved,105)
- RVECENT(romReserved,106)
- RVECENT(romReserved,107)
- RVECENT(romReserved,108)
- RVECENT(romReserved,109)
- RVECENT(romReserved,110)
- RVECENT(romReserved,111)
- XVECENT(romExcHandle,0x380) # bfc00380: R4000 general vector
- RVECENT(romReserved,113)
- RVECENT(romReserved,114)
- RVECENT(romReserved,115)
- RVECENT(romReserved,116)
- RVECENT(romReserved,116)
- RVECENT(romReserved,118)
- RVECENT(romReserved,119)
- RVECENT(romReserved,120)
- RVECENT(romReserved,121)
- RVECENT(romReserved,122)
- RVECENT(romReserved,123)
- RVECENT(romReserved,124)
- RVECENT(romReserved,125)
- RVECENT(romReserved,126)
- RVECENT(romReserved,127)
- /*
- * We hope there are no more reserved vectors!
- * 128 * 8 == 1024 == 0x400
- * so this is address R_VEC+0x400 == 0xbfc00400
- */
+ .org 0x200
+ /* TLB refill, 32 bit task */
+1: b 1b
+ nop
+
+ .org 0x280
+ /* XTLB refill, 64 bit task */
+1: b 1b
+ nop
+
+ .org 0x300
+ /* Cache error exception */
+1: b 1b
+ nop
+
+ .org 0x380
+ /* General exception */
+1: b 1b
+ nop
+
+ .org 0x400
+ /* Catch interrupt exceptions */
+1: b 1b
+ nop
+
+ .org 0x480
+ /* EJTAG debug exception */
+1: b 1b
+ nop
+
.align 4
reset:
@@ -222,7 +109,7 @@ reset:
/* WP(Watch Pending), SW0/1 should be cleared */
mtc0 zero, CP0_CAUSE
- setup_c0_status_reset
+ setup_c0_status 0 0
/* Init Timer */
mtc0 zero, CP0_COUNT
@@ -286,7 +173,7 @@ relocate_code:
sub s1, s2, t0 # s1 <-- relocation offset
la t3, in_ram
- lw t2, -12(t3) # t2 <-- uboot_end_data
+ lw t2, -12(t3) # t2 <-- __image_copy_end
move t1, a2
add gp, s1 # adjust gp
@@ -314,9 +201,10 @@ relocate_code:
jr t0
nop
+ .word __rel_dyn_end
+ .word __rel_dyn_start
+ .word __image_copy_end
.word _GLOBAL_OFFSET_TABLE_
- .word uboot_end_data
- .word uboot_end
.word num_got_entries
in_ram:
@@ -327,7 +215,7 @@ in_ram:
* generated by GNU ld. Skip these reserved entries from relocation.
*/
lw t3, -4(t0) # t3 <-- num_got_entries
- lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
+ lw t4, -8(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
add t4, s1 # t4 now holds relocated _G_O_T_
addi t4, t4, 8 # skipping first two entries
li t2, 2
@@ -341,17 +229,45 @@ in_ram:
blt t2, t3, 1b
addi t4, 4
- /* Clear BSS */
- lw t1, -12(t0) # t1 <-- uboot_end_data
- lw t2, -8(t0) # t2 <-- uboot_end
- add t1, s1 # adjust pointers
- add t2, s1
+ /* Update dynamic relocations */
+ lw t1, -16(t0) # t1 <-- __rel_dyn_start
+ lw t2, -20(t0) # t2 <-- __rel_dyn_end
+
+ b 2f # skip first reserved entry
+ addi t1, 8
+
+1:
+ lw t3, -4(t1) # t3 <-- relocation info
+
+ sub t3, 3
+ bnez t3, 2f # skip non R_MIPS_REL32 entries
+ nop
+
+ lw t3, -8(t1) # t3 <-- location to fix up in FLASH
+
+ lw t4, 0(t3) # t4 <-- original pointer
+ add t4, s1 # t4 <-- adjusted pointer
+
+ add t3, s1 # t3 <-- location to fix up in RAM
+ sw t4, 0(t3)
+
+2:
+ blt t1, t2, 1b
+ addi t1, 8 # each rel.dyn entry is 8 bytes
+
+ /*
+ * Clear BSS
+ *
+ * GOT is now relocated. Thus __bss_start and __bss_end can be
+ * accessed directly via $gp.
+ */
+ la t1, __bss_start # t1 <-- __bss_start
+ la t2, __bss_end # t2 <-- __bss_end
- sub t1, 4
1:
- addi t1, 4
- bltl t1, t2, 1b
- sw zero, 0(t1)
+ sw zero, 0(t1)
+ blt t1, t2, 1b
+ addi t1, 4
move a0, s0 # a0 <-- gd
la t9, board_init_r
@@ -359,12 +275,3 @@ in_ram:
move a1, s2
.end relocate_code
-
- /* Exception handlers */
-romReserved:
- b romReserved
- nop
-
-romExcHandle:
- b romExcHandle
- nop
diff --git a/arch/mips/cpu/mips64/start.S b/arch/mips/cpu/mips64/start.S
index 1522594..dc7ce07 100644
--- a/arch/mips/cpu/mips64/start.S
+++ b/arch/mips/cpu/mips64/start.S
@@ -31,6 +31,14 @@
#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
#endif
+#ifdef CONFIG_SYS_LITTLE_ENDIAN
+#define MIPS64_R_INFO(ssym, r_type3, r_type2, r_type) \
+ (((r_type) << 24) | ((r_type2) << 16) | ((r_type3) << 8) | (ssym))
+#else
+#define MIPS64_R_INFO(ssym, r_type3, r_type2, r_type) \
+ ((r_type) | ((r_type2) << 8) | ((r_type3) << 16) | (ssym) << 24)
+#endif
+
/*
* For the moment disable interrupts, mark the kernel mode and
* set ST0_KX so that the CPU does not spit fire when using
@@ -52,40 +60,40 @@
.globl _start
.text
_start:
- .org 0x000
+ /* U-boot entry point */
b reset
nop
- .org 0x080
- b romReserved
- nop
- .org 0x100
- b romReserved
- nop
- .org 0x180
- b romReserved
- nop
+
.org 0x200
- b romReserved
+ /* TLB refill, 32 bit task */
+1: b 1b
nop
+
.org 0x280
- b romReserved
+ /* XTLB refill, 64 bit task */
+1: b 1b
nop
+
.org 0x300
- b romReserved
+ /* Cache error exception */
+1: b 1b
nop
+
.org 0x380
- b romReserved
+ /* General exception */
+1: b 1b
+ nop
+
+ .org 0x400
+ /* Catch interrupt exceptions */
+1: b 1b
nop
+
.org 0x480
- b romReserved
+ /* EJTAG debug exception */
+1: b 1b
nop
- /*
- * We hope there are no more reserved vectors!
- * 128 * 8 == 1024 == 0x400
- * so this is address R_VEC+0x400 == 0xbfc00400
- */
- .org 0x500
.align 4
reset:
@@ -165,7 +173,7 @@ relocate_code:
dsub s1, s2, t0 # s1 <-- relocation offset
dla t3, in_ram
- ld t2, -24(t3) # t2 <-- uboot_end_data
+ ld t2, -24(t3) # t2 <-- __image_copy_end
move t1, a2
dadd gp, s1 # adjust gp
@@ -193,9 +201,10 @@ relocate_code:
jr t0
nop
+ .dword __rel_dyn_end
+ .dword __rel_dyn_start
+ .dword __image_copy_end
.dword _GLOBAL_OFFSET_TABLE_
- .dword uboot_end_data
- .dword uboot_end
.dword num_got_entries
in_ram:
@@ -206,7 +215,7 @@ in_ram:
* generated by GNU ld. Skip these reserved entries from relocation.
*/
ld t3, -8(t0) # t3 <-- num_got_entries
- ld t8, -32(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_
+ ld t8, -16(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_
dadd t8, s1 # t8 now holds relocated _G_O_T_
daddi t8, t8, 16 # skipping first two entries
dli t2, 2
@@ -220,17 +229,45 @@ in_ram:
blt t2, t3, 1b
daddi t8, 8
- /* Clear BSS */
- ld t1, -24(t0) # t1 <-- uboot_end_data
- ld t2, -16(t0) # t2 <-- uboot_end
- dadd t1, s1 # adjust pointers
- dadd t2, s1
+ /* Update dynamic relocations */
+ ld t1, -32(t0) # t1 <-- __rel_dyn_start
+ ld t2, -40(t0) # t2 <-- __rel_dyn_end
+
+ b 2f # skip first reserved entry
+ daddi t1, 16
- dsub t1, 8
1:
- daddi t1, 8
- bltl t1, t2, 1b
- sd zero, 0(t1)
+ lw t8, -4(t1) # t8 <-- relocation info
+
+ dli t3, MIPS64_R_INFO(0x00, 0x00, 0x12, 0x03)
+ bne t8, t3, 2f # skip non R_MIPS_REL32 entries
+ nop
+
+ ld t3, -16(t1) # t3 <-- location to fix up in FLASH
+
+ ld t8, 0(t3) # t8 <-- original pointer
+ dadd t8, s1 # t8 <-- adjusted pointer
+
+ dadd t3, s1 # t3 <-- location to fix up in RAM
+ sd t8, 0(t3)
+
+2:
+ blt t1, t2, 1b
+ daddi t1, 16 # each rel.dyn entry is 16 bytes
+
+ /*
+ * Clear BSS
+ *
+ * GOT is now relocated. Thus __bss_start and __bss_end can be
+ * accessed directly via $gp.
+ */
+ dla t1, __bss_start # t1 <-- __bss_start
+ dla t2, __bss_end # t2 <-- __bss_end
+
+1:
+ sd zero, 0(t1)
+ blt t1, t2, 1b
+ daddi t1, 8
move a0, s0 # a0 <-- gd
dla t9, board_init_r
@@ -238,8 +275,3 @@ in_ram:
move a1, s2
.end relocate_code
-
- /* Exception handlers */
-romReserved:
- b romReserved
- nop
diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds
index 37c9d23..10513ab 100644
--- a/arch/mips/cpu/u-boot.lds
+++ b/arch/mips/cpu/u-boot.lds
@@ -52,11 +52,11 @@ SECTIONS
_gp = ALIGN(16) + 0x7ff0;
.got : {
- __got_start = .;
*(.got)
- __got_end = .;
}
+ num_got_entries = SIZEOF(.got) >> PTR_COUNT_SHIFT;
+
. = ALIGN(4);
.sdata : {
*(.sdata*)
@@ -67,18 +67,55 @@ SECTIONS
#include <u-boot.lst>
}
- uboot_end_data = .;
+ . = ALIGN(4);
+ __image_copy_end = .;
- num_got_entries = (__got_end - __got_start) >> PTR_COUNT_SHIFT;
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel.dyn)
+ __rel_dyn_end = .;
+ }
- . = ALIGN(4);
- .sbss : {
- *(.sbss*)
+ .deadcode : {
+ /*
+ * Workaround for a binutils feature (or bug?).
+ *
+ * The GNU ld from binutils puts the dynamic relocation
+ * entries into the .rel.dyn section. Sometimes it
+ * allocates more dynamic relocation entries than it needs
+ * and the unused slots are set to R_MIPS_NONE entries.
+ *
+ * However the size of the .rel.dyn section in the ELF
+ * section header does not cover the unused entries, so
+ * objcopy removes those during stripping.
+ *
+ * Create a small section here to avoid that.
+ */
+ LONG(0xffffffff);
}
- .bss : {
- *(.bss*)
+ .dynsym : {
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.sbss.*)
+ *(.bss.*)
+ *(COMMON)
. = ALIGN(4);
+ __bss_end = .;
+ }
+
+ /DISCARD/ : {
+ *(.dynbss)
+ *(.dynstr)
+ *(.dynamic)
+ *(.interp)
+ *(.hash)
+ *(.gnu.*)
+ *(.plt)
+ *(.got.plt)
+ *(.rel.plt)
}
- uboot_end = .;
}
diff --git a/arch/mips/cpu/xburst/jz4740.c b/arch/mips/cpu/xburst/jz4740.c
index c0b9817..b2d8f4d 100644
--- a/arch/mips/cpu/xburst/jz4740.c
+++ b/arch/mips/cpu/xburst/jz4740.c
@@ -201,10 +201,10 @@ void calc_clocks(void)
pllout = __cpm_get_pllout();
gd->cpu_clk = pllout / div[__cpm_get_cdiv()];
- gd->sys_clk = pllout / div[__cpm_get_hdiv()];
- gd->per_clk = pllout / div[__cpm_get_pdiv()];
+ gd->arch.sys_clk = pllout / div[__cpm_get_hdiv()];
+ gd->arch.per_clk = pllout / div[__cpm_get_pdiv()];
gd->mem_clk = pllout / div[__cpm_get_mdiv()];
- gd->dev_clk = CONFIG_SYS_EXTAL;
+ gd->arch.dev_clk = CONFIG_SYS_EXTAL;
}
void rtc_init(void)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S
index 50b7fb1..d2c064b 100644
--- a/arch/mips/cpu/xburst/start.S
+++ b/arch/mips/cpu/xburst/start.S
@@ -67,7 +67,7 @@ relocate_code:
sub t6, a2, t0 # t6 <-- relocation offset
la t3, in_ram
- lw t2, -12(t3) # t2 <-- uboot_end_data
+ lw t2, -12(t3) # t2 <-- __image_copy_end
move t1, a2
add gp, t6 # adjust gp
@@ -116,9 +116,10 @@ relocate_code:
jr t0
nop
+ .word __rel_dyn_end
+ .word __rel_dyn_start
+ .word __image_copy_end
.word _GLOBAL_OFFSET_TABLE_
- .word uboot_end_data
- .word uboot_end
.word num_got_entries
in_ram:
@@ -129,7 +130,7 @@ in_ram:
* generated by GNU ld. Skip these reserved entries from relocation.
*/
lw t3, -4(t0) # t3 <-- num_got_entries
- lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
+ lw t4, -8(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
add t4, t6 # t4 now holds relocated _G_O_T_
addi t4, t4, 8 # skipping first two entries
li t2, 2
@@ -143,16 +144,45 @@ in_ram:
blt t2, t3, 1b
addi t4, 4
- /* Clear BSS */
- lw t1, -12(t0) # t1 <-- uboot_end_data
- lw t2, -8(t0) # t2 <-- uboot_end
- add t1, t6 # adjust pointers
- add t2, t6
+ /* Update dynamic relocations */
+ lw t1, -16(t0) # t1 <-- __rel_dyn_start
+ lw t2, -20(t0) # t2 <-- __rel_dyn_end
- sub t1, 4
-1: addi t1, 4
- bltl t1, t2, 1b
- sw zero, 0(t1)
+ b 2f # skip first reserved entry
+ addi t1, 8
+
+1:
+ lw t3, -4(t1) # t3 <-- relocation info
+
+ sub t3, 3
+ bnez t3, 2f # skip non R_MIPS_REL32 entries
+ nop
+
+ lw t3, -8(t1) # t3 <-- location to fix up in FLASH
+
+ lw t4, 0(t3) # t4 <-- original pointer
+ add t4, t6 # t4 <-- adjusted pointer
+
+ add t3, t6 # t3 <-- location to fix up in RAM
+ sw t4, 0(t3)
+
+2:
+ blt t1, t2, 1b
+ addi t1, 8 # each rel.dyn entry is 8 bytes
+
+ /*
+ * Clear BSS
+ *
+ * GOT is now relocated. Thus __bss_start and __bss_end can be
+ * accessed directly via $gp.
+ */
+ la t1, __bss_start # t1 <-- __bss_start
+ la t2, __bss_end # t2 <-- __bss_end
+
+1:
+ sw zero, 0(t1)
+ blt t1, t2, 1b
+ addi t1, 4
move a0, a1 # a0 <-- gd
la t9, board_init_r
generated by cgit v1.1 at 2024-10-30 06:41:18 +0000