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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/include/asm/arch-stm32f4/stm32.h10
2 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7383975..75d6bbc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -697,6 +697,8 @@ config ARCH_UNIPHIER
config TARGET_STM32F429_DISCOVERY
bool "Support STM32F429 Discovery"
select CPU_V7M
+ select DM
+ select DM_SERIAL
config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h
index 7ca6dc3..6b64d03 100644
--- a/arch/arm/include/asm/arch-stm32f4/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
@@ -3,7 +3,7 @@
* Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
*
* (C) Copyright 2015
- * Kamil Lulko, <rev13@wp.pl>
+ * Kamil Lulko, <kamil.lulko@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -106,6 +106,14 @@ struct stm32_flash_regs {
#define STM32_FLASH_CR_SNB_OFFSET 3
#define STM32_FLASH_CR_SNB_MASK (15 << STM32_FLASH_CR_SNB_OFFSET)
+/*
+ * Peripheral base addresses
+ */
+#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
+#define STM32_USART2_BASE (STM32_APB1PERIPH_BASE + 0x4400)
+#define STM32_USART3_BASE (STM32_APB1PERIPH_BASE + 0x4800)
+#define STM32_USART6_BASE (STM32_APB2PERIPH_BASE + 0x1400)
+
enum clock {
CLOCK_CORE,
CLOCK_AHB,