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-rw-r--r--arch/arm/cpu/armv7/socfpga/spl.c3
-rw-r--r--arch/arm/cpu/armv7/socfpga/system_manager.c9
-rw-r--r--arch/arm/include/asm/arch-socfpga/system_manager.h1
3 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c
index 95992f0..787ad7f 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -154,6 +154,9 @@ void spl_board_init(void)
/* reconfigure the PLLs */
cm_basic_init(&cm_default_cfg);
+ /* Enable bootrom to configure IOs. */
+ sysmgr_enable_warmrstcfgio();
+
/* configure the IOCSR / IO buffer settings */
if (scan_mgr_configure_iocsr())
hang();
diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c b/arch/arm/cpu/armv7/socfpga/system_manager.c
index 11f7bad..8126e0d 100644
--- a/arch/arm/cpu/armv7/socfpga/system_manager.c
+++ b/arch/arm/cpu/armv7/socfpga/system_manager.c
@@ -66,3 +66,12 @@ void sysmgr_pinmux_init(void)
populate_sysmgr_fpgaintf_module();
}
+
+/*
+ * This bit allows the bootrom to configure the IOs after a warm reset.
+ */
+void sysmgr_enable_warmrstcfgio(void)
+{
+ setbits_le32(&sysmgr_regs->romcodegrp_ctrl,
+ SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
+}
diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h b/arch/arm/include/asm/arch-socfpga/system_manager.h
index 071ec4f..51d9815 100644
--- a/arch/arm/include/asm/arch-socfpga/system_manager.h
+++ b/arch/arm/include/asm/arch-socfpga/system_manager.h
@@ -10,6 +10,7 @@
#ifndef __ASSEMBLY__
void sysmgr_pinmux_init(void);
+void sysmgr_enable_warmrstcfgio(void);
/* declaration for handoff table type */
extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];