diff options
Diffstat (limited to 'arch/arm/mach-mvebu/include/mach')
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/cpu.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/soc.h | 11 |
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index 4bdb633..8bcdef6 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -125,7 +125,7 @@ int serdes_phy_config(void); /* * DDR3 init / training code ported from Marvell bin_hdr. Now * available in mainline U-Boot in: - * drivers/ddr/mvebu/ + * drivers/ddr/marvell */ int ddr3_init(void); #endif /* __ASSEMBLY__ */ diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 1aaea67..125b5f2 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -28,7 +28,17 @@ /* SOC specific definations */ #define INTREG_BASE 0xd0000000 #define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080) +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYS_MVEBU_DDR_A38X) +/* + * On A38x switching the regs base address without running from + * SDRAM doesn't seem to work. So let the SPL still use the + * default base address and switch to the new address in the + * main u-boot later. + */ +#define SOC_REGS_PHY_BASE 0xd0000000 +#else #define SOC_REGS_PHY_BASE 0xf1000000 +#endif #define MVEBU_REGISTER(x) (SOC_REGS_PHY_BASE + x) #define MVEBU_SDRAM_SCRATCH (MVEBU_REGISTER(0x01504)) @@ -52,6 +62,7 @@ #define MVEBU_USB20_BASE (MVEBU_REGISTER(0x58000)) #define MVEBU_EGIGA0_BASE (MVEBU_REGISTER(0x70000)) #define MVEBU_EGIGA1_BASE (MVEBU_REGISTER(0x74000)) +#define MVEBU_AXP_SATA_BASE (MVEBU_REGISTER(0xa0000)) #define MVEBU_SATA0_BASE (MVEBU_REGISTER(0xa8000)) #define MVEBU_SDIO_BASE (MVEBU_REGISTER(0xd8000)) |