diff options
Diffstat (limited to 'arch/arm/include/asm/arch-mx6/mx6q_pins.h')
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/mx6q_pins.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/mx6q_pins.h b/arch/arm/include/asm/arch-mx6/mx6q_pins.h index 437ea31..ec1bbdd 100644 --- a/arch/arm/include/asm/arch-mx6/mx6q_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6q_pins.h @@ -132,6 +132,7 @@ enum { MX6_PAD_EIM_D19__ECSPI1_SS1 = IOMUX_PAD(0x03B0, 0x009C, 1, 0x0804, 0, 0), MX6_PAD_EIM_D19__IPU1_DI0_PIN08 = IOMUX_PAD(0x03B0, 0x009C, 2, 0x0000, 0, 0), MX6_PAD_EIM_D19__IPU2_CSI1_DATA16 = IOMUX_PAD(0x03B0, 0x009C, 3, 0x08C8, 0, 0), + MX6_PAD_EIM_D19__UART1_CTS_B = IOMUX_PAD(0x03B0, 0x009C, 4, 0x0000, 0, 0), MX6_PAD_EIM_D19__UART1_RTS_B = IOMUX_PAD(0x03B0, 0x009C, 4, 0x091C, 0, 0), MX6_PAD_EIM_D19__GPIO3_IO19 = IOMUX_PAD(0x03B0, 0x009C, 5, 0x0000, 0, 0), MX6_PAD_EIM_D19__EPIT1_OUT = IOMUX_PAD(0x03B0, 0x009C, 6, 0x0000, 0, 0), @@ -162,6 +163,7 @@ enum { MX6_PAD_EIM_D22__PL301MX6QPER1_HWRITE = IOMUX_PAD(0x03BC, 0x00A8, 7, 0x0000, 0, 0), MX6_PAD_EIM_D23__EIM_DATA23 = IOMUX_PAD(0x03C0, 0x00AC, 0, 0x0000, 0, 0), MX6_PAD_EIM_D23__IPU1_DI0_D0_CS = IOMUX_PAD(0x03C0, 0x00AC, 1, 0x0000, 0, 0), + MX6_PAD_EIM_D23__UART3_CTS_B = IOMUX_PAD(0x03C0, 0x00AC, 2, 0x0000, 0, 0), MX6_PAD_EIM_D23__UART3_RTS_B = IOMUX_PAD(0x03C0, 0x00AC, 2, 0x092C, 0, 0), MX6_PAD_EIM_D23__UART1_DCD_B = IOMUX_PAD(0x03C0, 0x00AC, 3, 0x0000, 0, 0), MX6_PAD_EIM_D23__IPU2_CSI1_DATA_EN = IOMUX_PAD(0x03C0, 0x00AC, 4, 0x08D8, 0, 0), @@ -188,6 +190,7 @@ enum { MX6_PAD_EIM_D24__UART1_DTR_B = IOMUX_PAD(0x03C8, 0x00B4, 7, 0x0000, 0, 0), MX6_PAD_EIM_D25__EIM_DATA25 = IOMUX_PAD(0x03CC, 0x00B8, 0, 0x0000, 0, 0), MX6_PAD_EIM_D25__ECSPI4_SS3 = IOMUX_PAD(0x03CC, 0x00B8, 1, 0x0000, 0, 0), + MX6_PAD_EIM_D25__UART3_TX_DATA = IOMUX_PAD(0x03CC, 0x00B8, 2, 0x0000, 0, 0), MX6_PAD_EIM_D25__UART3_RX_DATA = IOMUX_PAD(0x03CC, 0x00B8, 2, 0x0930, 1, 0), MX6_PAD_EIM_D25__ECSPI1_SS3 = IOMUX_PAD(0x03CC, 0x00B8, 3, 0x080C, 0, 0), MX6_PAD_EIM_D25__ECSPI2_SS3 = IOMUX_PAD(0x03CC, 0x00B8, 4, 0x0000, 0, 0), @@ -207,6 +210,7 @@ enum { MX6_PAD_EIM_D27__IPU1_DI1_PIN13 = IOMUX_PAD(0x03D4, 0x00C0, 1, 0x0000, 0, 0), MX6_PAD_EIM_D27__IPU1_CSI0_DATA00 = IOMUX_PAD(0x03D4, 0x00C0, 2, 0x0000, 0, 0), MX6_PAD_EIM_D27__IPU2_CSI1_DATA13 = IOMUX_PAD(0x03D4, 0x00C0, 3, 0x08BC, 0, 0), + MX6_PAD_EIM_D27__UART2_TX_DATA = IOMUX_PAD(0x03D4, 0x00C0, 4, 0x0000, 0, 0), MX6_PAD_EIM_D27__UART2_RX_DATA = IOMUX_PAD(0x03D4, 0x00C0, 4, 0x0928, 1, 0), MX6_PAD_EIM_D27__GPIO3_IO27 = IOMUX_PAD(0x03D4, 0x00C0, 5, 0x0000, 0, 0), MX6_PAD_EIM_D27__IPU1_SISG3 = IOMUX_PAD(0x03D4, 0x00C0, 6, 0x0000, 0, 0), @@ -216,6 +220,7 @@ enum { MX6_PAD_EIM_D28__ECSPI4_MOSI = IOMUX_PAD(0x03D8, 0x00C4, 2, 0x0000, 0, 0), MX6_PAD_EIM_D28__IPU2_CSI1_DATA12 = IOMUX_PAD(0x03D8, 0x00C4, 3, 0x08B8, 0, 0), MX6_PAD_EIM_D28__UART2_DTE_CTS_B = IOMUX_PAD(0x03D8, 0x00C4, 4, 0x0924, 0, 0), + MX6_PAD_EIM_D28__UART2_DTE_RTS_B = IOMUX_PAD(0x03D8, 0x00C4, 4, 0x0000, 0, 0), MX6_PAD_EIM_D28__GPIO3_IO28 = IOMUX_PAD(0x03D8, 0x00C4, 5, 0x0000, 0, 0), MX6_PAD_EIM_D28__IPU1_EXT_TRIG = IOMUX_PAD(0x03D8, 0x00C4, 6, 0x0000, 0, 0), MX6_PAD_EIM_D28__IPU1_DI0_PIN13 = IOMUX_PAD(0x03D8, 0x00C4, 7, 0x0000, 0, 0), @@ -231,6 +236,7 @@ enum { MX6_PAD_EIM_D30__IPU1_DISP1_DATA21 = IOMUX_PAD(0x03E0, 0x00CC, 1, 0x0000, 0, 0), MX6_PAD_EIM_D30__IPU1_DI0_PIN11 = IOMUX_PAD(0x03E0, 0x00CC, 2, 0x0000, 0, 0), MX6_PAD_EIM_D30__IPU1_CSI0_DATA03 = IOMUX_PAD(0x03E0, 0x00CC, 3, 0x0000, 0, 0), + MX6_PAD_EIM_D30__UART3_CTS_B = IOMUX_PAD(0x03E0, 0x00CC, 4, 0x0000, 0, 0), MX6_PAD_EIM_D30__UART3_RTS_B = IOMUX_PAD(0x03E0, 0x00CC, 4, 0x092C, 2, 0), MX6_PAD_EIM_D30__GPIO3_IO30 = IOMUX_PAD(0x03E0, 0x00CC, 5, 0x0000, 0, 0), MX6_PAD_EIM_D30__USB_H1_OC = IOMUX_PAD(0x03E0, 0x00CC, 6, 0x0948, 0, 0), @@ -726,6 +732,7 @@ enum { MX6_PAD_ENET_REF_CLK__GPIO1_IO23 = IOMUX_PAD(0x04E8, 0x01D4, 5, 0x0000, 0, 0), MX6_PAD_ENET_REF_CLK__SPDIF_SR_CLK = IOMUX_PAD(0x04E8, 0x01D4, 6, 0x0000, 0, 0), MX6_PAD_ENET_REF_CLK__USBPHY1_RX_SQH = IOMUX_PAD(0x04E8, 0x01D4, 7, 0x0000, 0, 0), + MX6_PAD_ENET_RX_ER__USB_OTG_ID = IOMUX_PAD(0x04EC, 0x01D8, 0, 0x0000, 0, 0), MX6_PAD_ENET_RX_ER__ENET_RX_ER = IOMUX_PAD(0x04EC, 0x01D8, 1, 0x0000, 0, 0), MX6_PAD_ENET_RX_ER__ESAI_RX_HF_CLK = IOMUX_PAD(0x04EC, 0x01D8, 2, 0x0864, 0, 0), MX6_PAD_ENET_RX_ER__SPDIF_IN = IOMUX_PAD(0x04EC, 0x01D8, 3, 0x0914, 1, 0), @@ -840,6 +847,7 @@ enum { MX6_PAD_KEY_ROW0__ENET_TX_DATA3 = IOMUX_PAD(0x05CC, 0x01FC, 1, 0x0000, 0, 0), MX6_PAD_KEY_ROW0__AUD5_TXD = IOMUX_PAD(0x05CC, 0x01FC, 2, 0x07D0, 1, 0), MX6_PAD_KEY_ROW0__KEY_ROW0 = IOMUX_PAD(0x05CC, 0x01FC, 3, 0x0000, 0, 0), + MX6_PAD_KEY_ROW0__UART4_TX_DATA = IOMUX_PAD(0x05CC, 0x01FC, 4, 0x0000, 0, 0), MX6_PAD_KEY_ROW0__UART4_RX_DATA = IOMUX_PAD(0x05CC, 0x01FC, 4, 0x0938, 1, 0), MX6_PAD_KEY_ROW0__GPIO4_IO07 = IOMUX_PAD(0x05CC, 0x01FC, 5, 0x0000, 0, 0), MX6_PAD_KEY_ROW0__DCIC2_OUT = IOMUX_PAD(0x05CC, 0x01FC, 6, 0x0000, 0, 0), @@ -857,6 +865,7 @@ enum { MX6_PAD_KEY_ROW1__ENET_COL = IOMUX_PAD(0x05D4, 0x0204, 1, 0x0000, 0, 0), MX6_PAD_KEY_ROW1__AUD5_RXD = IOMUX_PAD(0x05D4, 0x0204, 2, 0x07CC, 1, 0), MX6_PAD_KEY_ROW1__KEY_ROW1 = IOMUX_PAD(0x05D4, 0x0204, 3, 0x0000, 0, 0), + MX6_PAD_KEY_ROW1__UART5_TX_DATA = IOMUX_PAD(0x05D4, 0x0204, 4, 0x0000, 0, 0), MX6_PAD_KEY_ROW1__UART5_RX_DATA = IOMUX_PAD(0x05D4, 0x0204, 4, 0x0940, 1, 0), MX6_PAD_KEY_ROW1__GPIO4_IO09 = IOMUX_PAD(0x05D4, 0x0204, 5, 0x0000, 0, 0), MX6_PAD_KEY_ROW1__SD2_VSELECT = IOMUX_PAD(0x05D4, 0x0204, 6, 0x0000, 0, 0), @@ -906,6 +915,7 @@ enum { MX6_PAD_KEY_ROW4__IPU1_SISG5 = IOMUX_PAD(0x05EC, 0x021C, 1, 0x0000, 0, 0), MX6_PAD_KEY_ROW4__USB_OTG_PWR = IOMUX_PAD(0x05EC, 0x021C, 2, 0x0000, 0, 0), MX6_PAD_KEY_ROW4__KEY_ROW4 = IOMUX_PAD(0x05EC, 0x021C, 3, 0x0000, 0, 0), + MX6_PAD_KEY_ROW4__UART5_CTS_B = IOMUX_PAD(0x05EC, 0x021C, 4, 0x0000, 0, 0), MX6_PAD_KEY_ROW4__UART5_RTS_B = IOMUX_PAD(0x05EC, 0x021C, 4, 0x093C, 1, 0), MX6_PAD_KEY_ROW4__GPIO4_IO15 = IOMUX_PAD(0x05EC, 0x021C, 5, 0x0000, 0, 0), MX6_PAD_KEY_ROW4__MMDC_DEBUG_50 = IOMUX_PAD(0x05EC, 0x021C, 6, 0x0000, 0, 0), @@ -986,6 +996,7 @@ enum { MX6_PAD_GPIO_8__XTALOSC_REF_CLK_32K = IOMUX_PAD(0x0614, 0x0244, 1, 0x0000, 0, 0), MX6_PAD_GPIO_8__EPIT2_OUT = IOMUX_PAD(0x0614, 0x0244, 2, 0x0000, 0, 0), MX6_PAD_GPIO_8__FLEXCAN1_RX = IOMUX_PAD(0x0614, 0x0244, 3, 0x07E4, 1, 0), + MX6_PAD_GPIO_8__UART2_TX_DATA = IOMUX_PAD(0x0614, 0x0244, 4, 0x0000, 0, 0), MX6_PAD_GPIO_8__UART2_RX_DATA = IOMUX_PAD(0x0614, 0x0244, 4, 0x0928, 3, 0), MX6_PAD_GPIO_8__GPIO1_IO08 = IOMUX_PAD(0x0614, 0x0244, 5, 0x0000, 0, 0), MX6_PAD_GPIO_8__SPDIF_SR_CLK = IOMUX_PAD(0x0614, 0x0244, 6, 0x0000, 0, 0), @@ -1108,6 +1119,7 @@ enum { MX6_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 = IOMUX_PAD(0x0654, 0x0284, 0, 0x0000, 0, 0), MX6_PAD_CSI0_DAT11__AUD3_RXFS = IOMUX_PAD(0x0654, 0x0284, 1, 0x0000, 0, 0), MX6_PAD_CSI0_DAT11__ECSPI2_SS0 = IOMUX_PAD(0x0654, 0x0284, 2, 0x081C, 2, 0), + MX6_PAD_CSI0_DAT11__UART1_TX_DATA = IOMUX_PAD(0x0654, 0x0284, 3, 0x0000, 0, 0), MX6_PAD_CSI0_DAT11__UART1_RX_DATA = IOMUX_PAD(0x0654, 0x0284, 3, 0x0920, 1, 0), MX6_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5 = IOMUX_PAD(0x0654, 0x0284, 4, 0x0000, 0, 0), MX6_PAD_CSI0_DAT11__GPIO5_IO29 = IOMUX_PAD(0x0654, 0x0284, 5, 0x0000, 0, 0), @@ -1125,6 +1137,7 @@ enum { MX6_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 = IOMUX_PAD(0x065C, 0x028C, 0, 0x0000, 0, 0), MX6_PAD_CSI0_DAT13__EIM_DATA09 = IOMUX_PAD(0x065C, 0x028C, 1, 0x0000, 0, 0), MX6_PAD_CSI0_DAT13__PCIE_CTRL_MUX_17 = IOMUX_PAD(0x065C, 0x028C, 2, 0x0000, 0, 0), + MX6_PAD_CSI0_DAT13__UART4_TX_DATA = IOMUX_PAD(0x065C, 0x028C, 3, 0x0000, 0, 0), MX6_PAD_CSI0_DAT13__UART4_RX_DATA = IOMUX_PAD(0x065C, 0x028C, 3, 0x0938, 3, 0), MX6_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7 = IOMUX_PAD(0x065C, 0x028C, 4, 0x0000, 0, 0), MX6_PAD_CSI0_DAT13__GPIO5_IO31 = IOMUX_PAD(0x065C, 0x028C, 5, 0x0000, 0, 0), @@ -1142,6 +1155,7 @@ enum { MX6_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 = IOMUX_PAD(0x0664, 0x0294, 0, 0x0000, 0, 0), MX6_PAD_CSI0_DAT15__EIM_DATA11 = IOMUX_PAD(0x0664, 0x0294, 1, 0x0000, 0, 0), MX6_PAD_CSI0_DAT15__PCIE_CTRL_MUX_19 = IOMUX_PAD(0x0664, 0x0294, 2, 0x0000, 0, 0), + MX6_PAD_CSI0_DAT15__UART5_TX_DATA = IOMUX_PAD(0x0664, 0x0294, 3, 0x0000, 0, 0), MX6_PAD_CSI0_DAT15__UART5_RX_DATA = IOMUX_PAD(0x0664, 0x0294, 3, 0x0940, 3, 0), MX6_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9 = IOMUX_PAD(0x0664, 0x0294, 4, 0x0000, 0, 0), MX6_PAD_CSI0_DAT15__GPIO6_IO01 = IOMUX_PAD(0x0664, 0x0294, 5, 0x0000, 0, 0), @@ -1159,6 +1173,7 @@ enum { MX6_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 = IOMUX_PAD(0x066C, 0x029C, 0, 0x0000, 0, 0), MX6_PAD_CSI0_DAT17__EIM_DATA13 = IOMUX_PAD(0x066C, 0x029C, 1, 0x0000, 0, 0), MX6_PAD_CSI0_DAT17__PCIE_CTRL_MUX_21 = IOMUX_PAD(0x066C, 0x029C, 2, 0x0000, 0, 0), + MX6_PAD_CSI0_DAT17__UART4_CTS_B = IOMUX_PAD(0x066C, 0x029C, 3, 0x0000, 0, 0), MX6_PAD_CSI0_DAT17__UART4_RTS_B = IOMUX_PAD(0x066C, 0x029C, 3, 0x0934, 1, 0), MX6_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11 = IOMUX_PAD(0x066C, 0x029C, 4, 0x0000, 0, 0), MX6_PAD_CSI0_DAT17__GPIO6_IO03 = IOMUX_PAD(0x066C, 0x029C, 5, 0x0000, 0, 0), @@ -1176,6 +1191,7 @@ enum { MX6_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 = IOMUX_PAD(0x0674, 0x02A4, 0, 0x0000, 0, 0), MX6_PAD_CSI0_DAT19__EIM_DATA15 = IOMUX_PAD(0x0674, 0x02A4, 1, 0x0000, 0, 0), MX6_PAD_CSI0_DAT19__PCIE_CTRL_MUX_23 = IOMUX_PAD(0x0674, 0x02A4, 2, 0x0000, 0, 0), + MX6_PAD_CSI0_DAT19__UART5_CTS_B = IOMUX_PAD(0x0674, 0x02A4, 3, 0x0000, 0, 0), MX6_PAD_CSI0_DAT19__UART5_RTS_B = IOMUX_PAD(0x0674, 0x02A4, 3, 0x093C, 3, 0), MX6_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13 = IOMUX_PAD(0x0674, 0x02A4, 4, 0x0000, 0, 0), MX6_PAD_CSI0_DAT19__GPIO6_IO05 = IOMUX_PAD(0x0674, 0x02A4, 5, 0x0000, 0, 0), @@ -1197,6 +1213,7 @@ enum { MX6_PAD_SD3_DAT7__MIPI_CORE_DPHY_IN_12 = IOMUX_PAD(0x0690, 0x02A8, 6, 0x0000, 0, 0), MX6_PAD_SD3_DAT7__USBPHY2_CLK20DIV = IOMUX_PAD(0x0690, 0x02A8, 7, 0x0000, 0, 0), MX6_PAD_SD3_DAT6__SD3_DATA6 = IOMUX_PAD(0x0694, 0x02AC, 0, 0x0000, 0, 0), + MX6_PAD_SD3_DAT6__UART1_TX_DATA = IOMUX_PAD(0x0694, 0x02AC, 1, 0x0000, 0, 0), MX6_PAD_SD3_DAT6__UART1_RX_DATA = IOMUX_PAD(0x0694, 0x02AC, 1, 0x0920, 3, 0), MX6_PAD_SD3_DAT6__PCIE_CTRL_MUX_25 = IOMUX_PAD(0x0694, 0x02AC, 2, 0x0000, 0, 0), MX6_PAD_SD3_DAT6__USBOH3_UH3_DFD_OUT_1 = IOMUX_PAD(0x0694, 0x02AC, 3, 0x0000, 0, 0), @@ -1214,6 +1231,7 @@ enum { MX6_PAD_SD3_DAT5__MIPI_CORE_DPHY_IN_14 = IOMUX_PAD(0x0698, 0x02B0, 6, 0x0000, 0, 0), MX6_PAD_SD3_DAT5__ANATOP_TESTO_11 = IOMUX_PAD(0x0698, 0x02B0, 7, 0x0000, 0, 0), MX6_PAD_SD3_DAT4__SD3_DATA4 = IOMUX_PAD(0x069C, 0x02B4, 0, 0x0000, 0, 0), + MX6_PAD_SD3_DAT4__UART2_TX_DATA = IOMUX_PAD(0x069C, 0x02B4, 1, 0x0000, 0, 0), MX6_PAD_SD3_DAT4__UART2_RX_DATA = IOMUX_PAD(0x069C, 0x02B4, 1, 0x0928, 5, 0), MX6_PAD_SD3_DAT4__PCIE_CTRL_MUX_27 = IOMUX_PAD(0x069C, 0x02B4, 2, 0x0000, 0, 0), MX6_PAD_SD3_DAT4__USBOH3_UH3_DFD_OUT_3 = IOMUX_PAD(0x069C, 0x02B4, 3, 0x0000, 0, 0), @@ -1222,6 +1240,7 @@ enum { MX6_PAD_SD3_DAT4__MIPI_CORE_DPHY_IN_15 = IOMUX_PAD(0x069C, 0x02B4, 6, 0x0000, 0, 0), MX6_PAD_SD3_DAT4__ANATOP_TESTO_12 = IOMUX_PAD(0x069C, 0x02B4, 7, 0x0000, 0, 0), MX6_PAD_SD3_CMD__SD3_CMD = IOMUX_PAD(0x06A0, 0x02B8, 16, 0x0000, 0, 0), + MX6_PAD_SD3_CMD__UART2_CTS_B = IOMUX_PAD(0x06A0, 0x02B8, 1, 0x0000, 0, 0), MX6_PAD_SD3_CMD__UART2_RTS_B = IOMUX_PAD(0x06A0, 0x02B8, 1, 0x0924, 2, 0), MX6_PAD_SD3_CMD__FLEXCAN1_TX = IOMUX_PAD(0x06A0, 0x02B8, 2, 0x0000, 0, 0), MX6_PAD_SD3_CMD__USBOH3_UH3_DFD_OUT_4 = IOMUX_PAD(0x06A0, 0x02B8, 3, 0x0000, 0, 0), @@ -1239,6 +1258,7 @@ enum { MX6_PAD_SD3_CLK__MIPI_CORE_DPHY_IN_17 = IOMUX_PAD(0x06A4, 0x02BC, 6, 0x0000, 0, 0), MX6_PAD_SD3_CLK__ANATOP_TESTO_14 = IOMUX_PAD(0x06A4, 0x02BC, 7, 0x0000, 0, 0), MX6_PAD_SD3_DAT0__SD3_DATA0 = IOMUX_PAD(0x06A8, 0x02C0, 0, 0x0000, 0, 0), + MX6_PAD_SD3_DAT0__UART1_CTS_B = IOMUX_PAD(0x06A8, 0x02C0, 1, 0x0000, 0, 0), MX6_PAD_SD3_DAT0__UART1_RTS_B = IOMUX_PAD(0x06A8, 0x02C0, 1, 0x091C, 2, 0), MX6_PAD_SD3_DAT0__FLEXCAN2_TX = IOMUX_PAD(0x06A8, 0x02C0, 2, 0x0000, 0, 0), MX6_PAD_SD3_DAT0__USBOH3_UH3_DFD_OUT_6 = IOMUX_PAD(0x06A8, 0x02C0, 3, 0x0000, 0, 0), @@ -1263,6 +1283,7 @@ enum { MX6_PAD_SD3_DAT2__MIPI_CORE_DPHY_IN_20 = IOMUX_PAD(0x06B0, 0x02C8, 6, 0x0000, 0, 0), MX6_PAD_SD3_DAT2__ANATOP_TESTI_1 = IOMUX_PAD(0x06B0, 0x02C8, 7, 0x0000, 0, 0), MX6_PAD_SD3_DAT3__SD3_DATA3 = IOMUX_PAD(0x06B4, 0x02CC, 0, 0x0000, 0, 0), + MX6_PAD_SD3_DAT3__UART3_CTS_B = IOMUX_PAD(0x06B4, 0x02CC, 1, 0x0000, 0, 0), MX6_PAD_SD3_DAT3__UART3_RTS_B = IOMUX_PAD(0x06B4, 0x02CC, 1, 0x092C, 4, 0), MX6_PAD_SD3_DAT3__PCIE_CTRL_MUX_29 = IOMUX_PAD(0x06B4, 0x02CC, 2, 0x0000, 0, 0), MX6_PAD_SD3_DAT3__USBOH3_UH3_DFD_OUT_9 = IOMUX_PAD(0x06B4, 0x02CC, 3, 0x0000, 0, 0), @@ -1346,6 +1367,7 @@ enum { MX6_PAD_SD4_CMD__TPSMP_HDATA_DIR = IOMUX_PAD(0x06DC, 0x02F4, 7, 0x0000, 0, 0), MX6_PAD_SD4_CLK__SD4_CLK = IOMUX_PAD(0x06E0, 0x02F8, 0, 0x0000, 0, 0), MX6_PAD_SD4_CLK__NAND_WE_B = IOMUX_PAD(0x06E0, 0x02F8, 1, 0x0000, 0, 0), + MX6_PAD_SD4_CLK__UART3_TX_DATA = IOMUX_PAD(0x06E0, 0x02F8, 2, 0x0000, 0, 0), MX6_PAD_SD4_CLK__UART3_RX_DATA = IOMUX_PAD(0x06E0, 0x02F8, 2, 0x0930, 3, 0), MX6_PAD_SD4_CLK__PCIE_CTRL_MUX_6 = IOMUX_PAD(0x06E0, 0x02F8, 4, 0x0000, 0, 0), MX6_PAD_SD4_CLK__GPIO7_IO10 = IOMUX_PAD(0x06E0, 0x02F8, 5, 0x0000, 0, 0), @@ -1446,6 +1468,7 @@ enum { MX6_PAD_SD4_DAT3__IPU2_IPU_DIAG_BUS_11 = IOMUX_PAD(0x0710, 0x0328, 7, 0x0000, 0, 0), MX6_PAD_SD4_DAT4__RAWNAND_D12 = IOMUX_PAD(0x0714, 0x032C, 0, 0x0000, 0, 0), MX6_PAD_SD4_DAT4__SD4_DATA4 = IOMUX_PAD(0x0714, 0x032C, 1, 0x0000, 0, 0), + MX6_PAD_SD4_DAT4__UART2_TX_DATA = IOMUX_PAD(0x0714, 0x032C, 2, 0x0000, 0, 0), MX6_PAD_SD4_DAT4__UART2_RX_DATA = IOMUX_PAD(0x0714, 0x032C, 2, 0x0928, 6, 0), MX6_PAD_SD4_DAT4__USBOH3_UH2_DFD_OUT28 = IOMUX_PAD(0x0714, 0x032C, 3, 0x0000, 0, 0), MX6_PAD_SD4_DAT4__USBOH3_UH3_DFD_OUT28 = IOMUX_PAD(0x0714, 0x032C, 4, 0x0000, 0, 0), @@ -1463,6 +1486,7 @@ enum { MX6_PAD_SD4_DAT5__IPU2_IPU_DIAG_BUS_13 = IOMUX_PAD(0x0718, 0x0330, 7, 0x0000, 0, 0), MX6_PAD_SD4_DAT6__RAWNAND_D14 = IOMUX_PAD(0x071C, 0x0334, 0, 0x0000, 0, 0), MX6_PAD_SD4_DAT6__SD4_DATA6 = IOMUX_PAD(0x071C, 0x0334, 1, 0x0000, 0, 0), + MX6_PAD_SD4_DAT6__UART2_CTS_B = IOMUX_PAD(0x071C, 0x0334, 2, 0x0000, 0, 0), MX6_PAD_SD4_DAT6__UART2_RTS_B = IOMUX_PAD(0x071C, 0x0334, 2, 0x0924, 5, 0), MX6_PAD_SD4_DAT6__USBOH3_UH2_DFD_OUT30 = IOMUX_PAD(0x071C, 0x0334, 3, 0x0000, 0, 0), MX6_PAD_SD4_DAT6__USBOH3_UH3_DFD_OUT30 = IOMUX_PAD(0x071C, 0x0334, 4, 0x0000, 0, 0), |