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-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c19
1 files changed, 12 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index bdd41b0..f29901f 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -328,13 +328,18 @@ int arch_cpu_init(void)
*/
init_bandgap();
- /*
- * When low freq boot is enabled, ROM will not set AHB
- * freq, so we need to ensure AHB freq is 132MHz in such
- * scenario.
- */
- if (mxc_get_clock(MXC_ARM_CLK) == 396000000)
- set_ahb_rate(132000000);
+ if (!IS_ENABLED(CONFIG_MX6UL)) {
+ /*
+ * When low freq boot is enabled, ROM will not set AHB
+ * freq, so we need to ensure AHB freq is 132MHz in such
+ * scenario.
+ *
+ * To i.MX6UL, when power up, default ARM core and
+ * AHB rate is 396M and 132M.
+ */
+ if (mxc_get_clock(MXC_ARM_CLK) == 396000000)
+ set_ahb_rate(132000000);
+ }
/* Set perclk to source from OSC 24MHz */
#if defined(CONFIG_MX6SL)