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-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
index fe3444a..f73092a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
@@ -13,6 +13,9 @@
#ifdef CONFIG_SYS_FSL_SRDS_1
static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
+#endif
int is_serdes_configured(enum srds_prtcl device)
{
@@ -21,6 +24,9 @@ int is_serdes_configured(enum srds_prtcl device)
#ifdef CONFIG_SYS_FSL_SRDS_1
ret |= serdes1_prtcl_map[device];
#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+ ret |= serdes2_prtcl_map[device];
+#endif
return !!ret;
}
@@ -38,6 +44,12 @@ int serdes_get_first_lane(u32 sd, enum srds_prtcl device)
cfg >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
break;
#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+ case FSL_SRDS_2:
+ cfg &= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK;
+ cfg >>= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT;
+ break;
+#endif
default:
printf("invalid SerDes%d\n", sd);
break;
@@ -114,4 +126,11 @@ void fsl_serdes_init(void)
FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT,
serdes1_prtcl_map);
#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+ serdes_init(FSL_SRDS_2,
+ CONFIG_SYS_FSL_SERDES_ADDR,
+ FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK,
+ FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT,
+ serdes2_prtcl_map);
+#endif
}