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-rw-r--r--Makefile16
-rw-r--r--arch/x86/Kconfig13
-rw-r--r--arch/x86/cpu/Makefile1
-rw-r--r--arch/x86/cpu/ivybridge/microcode_intel.c27
-rw-r--r--arch/x86/cpu/ivybridge/sdram.c2
-rw-r--r--arch/x86/cpu/queensbay/Kconfig79
-rw-r--r--arch/x86/cpu/queensbay/Makefile9
-rw-r--r--arch/x86/cpu/queensbay/fsp_configs.c2
-rw-r--r--arch/x86/cpu/queensbay/fsp_support.c255
-rw-r--r--arch/x86/cpu/queensbay/tnc.c72
-rw-r--r--arch/x86/cpu/queensbay/tnc_car.S124
-rw-r--r--arch/x86/cpu/queensbay/tnc_dram.c78
-rw-r--r--arch/x86/cpu/queensbay/tnc_pci.c61
-rw-r--r--arch/x86/cpu/queensbay/topcliff.c47
-rw-r--r--arch/x86/dts/coreboot.dtsi2
-rw-r--r--arch/x86/dts/crownbay.dts7
-rw-r--r--arch/x86/dts/link.dts4
-rw-r--r--arch/x86/dts/m12206a7_00000028.dtsi622
-rw-r--r--arch/x86/dts/m12306a9_00000017.dtsi750
-rw-r--r--arch/x86/dts/microcode/m0220661105_cv.dtsi368
-rw-r--r--arch/x86/dts/microcode/m12206a7_00000029.dtsi686
-rw-r--r--arch/x86/dts/microcode/m12306a9_0000001b.dtsi814
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h18
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h28
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h14
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h112
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h6
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h8
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h63
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h17
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h8
-rw-r--r--arch/x86/include/asm/arch-queensbay/gpio.h13
-rw-r--r--arch/x86/include/asm/arch-queensbay/tnc.h15
-rw-r--r--arch/x86/include/asm/gpio.h4
-rw-r--r--arch/x86/include/asm/ibmpc.h3
-rw-r--r--arch/x86/lib/cmd_hob.c22
-rw-r--r--board/coreboot/coreboot/coreboot.c2
-rw-r--r--board/google/chromebook_link/link.c2
-rw-r--r--board/intel/crownbay/Kconfig20
-rw-r--r--board/intel/crownbay/MAINTAINERS6
-rw-r--r--board/intel/crownbay/Makefile7
-rw-r--r--board/intel/crownbay/crownbay.c32
-rw-r--r--board/intel/crownbay/start.S9
-rw-r--r--configs/crownbay_defconfig6
-rw-r--r--doc/README.x86126
-rw-r--r--drivers/gpio/intel_ich6_gpio.c20
-rw-r--r--drivers/serial/Makefile2
-rw-r--r--drivers/serial/serial_x86.c (renamed from drivers/serial/serial_coreboot.c)12
-rw-r--r--include/configs/chromebook_link.h6
-rw-r--r--include/configs/coreboot.h2
-rw-r--r--include/configs/crownbay.h61
-rw-r--r--tools/Makefile1
-rw-r--r--tools/ifdtool.c161
l---------tools/microcode-tool1
-rwxr-xr-xtools/microcode-tool.py253
55 files changed, 3381 insertions, 1718 deletions
diff --git a/Makefile b/Makefile
index 1560bff..397edc1 100644
--- a/Makefile
+++ b/Makefile
@@ -947,7 +947,9 @@ ifneq ($(CONFIG_X86_RESET_VECTOR),)
rom: u-boot.rom FORCE
IFDTOOL=$(objtree)/tools/ifdtool
-IFDTOOL_FLAGS = -w $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-dtb.bin
+IFDTOOL_FLAGS = -f 0:$(objtree)/u-boot.dtb
+IFDTOOL_FLAGS += -m 0x$(shell $(NM) u-boot |grep _dt_ucode_base_size |cut -d' ' -f1)
+IFDTOOL_FLAGS += -U $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot.bin
IFDTOOL_FLAGS += -w $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin
ifneq ($(CONFIG_HAVE_INTEL_ME),)
@@ -956,11 +958,19 @@ IFDTOOL_ME_FLAGS += -i ME:$(srctree)/board/$(BOARDDIR)/me.bin
endif
ifneq ($(CONFIG_HAVE_MRC),)
-IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_START):$(srctree)/board/$(BOARDDIR)/mrc.bin
+IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_ADDR):$(srctree)/board/$(BOARDDIR)/mrc.bin
+endif
+
+ifneq ($(CONFIG_HAVE_FSP),)
+IFDTOOL_FLAGS += -w $(CONFIG_FSP_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_FSP_FILE)
+endif
+
+ifneq ($(CONFIG_HAVE_CMC),)
+IFDTOOL_FLAGS += -w $(CONFIG_CMC_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_CMC_FILE)
endif
ifneq ($(CONFIG_X86_OPTION_ROM_ADDR),)
-IFDTOOL_FLAGS += -w $(CONFIG_X86_OPTION_ROM_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_X86_OPTION_ROM_FILENAME)
+IFDTOOL_FLAGS += -w $(CONFIG_X86_OPTION_ROM_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_X86_OPTION_ROM_FILE)
endif
quiet_cmd_ifdtool = IFDTOOL $@
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index fdfb618..ebf72b3 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -32,6 +32,15 @@ config TARGET_CHROMEBOOK_LINK
and it provides a 2560x1700 high resolution touch-enabled LCD
display.
+config TARGET_CROWNBAY
+ bool "Support Intel Crown Bay CRB"
+ help
+ This is the Intel Crown Bay Customer Reference Board. It contains
+ the Intel Atom Processor E6xx populated on the COM Express module
+ with 1GB DDR2 soldered down memory and a carrier board with the
+ Intel Platform Controller Hub EG20T, other system components and
+ peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
+
endchoice
config RAMBASE
@@ -310,8 +319,12 @@ endmenu
source "arch/x86/cpu/ivybridge/Kconfig"
+source "arch/x86/cpu/queensbay/Kconfig"
+
source "board/coreboot/coreboot/Kconfig"
source "board/google/chromebook_link/Kconfig"
+source "board/intel/crownbay/Kconfig"
+
endmenu
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 7f09db5..5033d2b 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -15,6 +15,7 @@ obj-y += interrupts.o cpu.o call64.o
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
+obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
obj-y += lapic.o
obj-$(CONFIG_PCI) += pci.o
obj-y += turbo.o
diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c
index 8c11a63..0817751 100644
--- a/arch/x86/cpu/ivybridge/microcode_intel.c
+++ b/arch/x86/cpu/ivybridge/microcode_intel.c
@@ -40,6 +40,8 @@ static int microcode_decode_node(const void *blob, int node,
update->data = fdt_getprop(blob, node, "data", &update->size);
if (!update->data)
return -EINVAL;
+ update->data += 48;
+ update->size -= 48;
update->header_version = fdtdec_get_int(blob, node,
"intel,header-version", 0);
@@ -48,17 +50,17 @@ static int microcode_decode_node(const void *blob, int node,
update->date_code = fdtdec_get_int(blob, node,
"intel,date-code", 0);
update->processor_signature = fdtdec_get_int(blob, node,
- "intel.processor-signature", 0);
+ "intel,processor-signature", 0);
update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
update->loader_revision = fdtdec_get_int(blob, node,
- "loader-revision", 0);
+ "intel,loader-revision", 0);
update->processor_flags = fdtdec_get_int(blob, node,
- "processor-flags", 0);
+ "intel,processor-flags", 0);
return 0;
}
-static uint32_t microcode_read_rev(void)
+static inline uint32_t microcode_read_rev(void)
{
/*
* Some Intel CPUs can be very finicky about the CPUID sequence used.
@@ -114,6 +116,7 @@ int microcode_update_intel(void)
{
struct microcode_update cpu, update;
const void *blob = gd->fdt_blob;
+ int skipped;
int count;
int node;
int ret;
@@ -121,12 +124,13 @@ int microcode_update_intel(void)
microcode_read_cpu(&cpu);
node = 0;
count = 0;
+ skipped = 0;
do {
node = fdtdec_next_compatible(blob, node,
COMPAT_INTEL_MICROCODE);
if (node < 0) {
debug("%s: Found %d updates\n", __func__, count);
- return count ? 0 : -ENOENT;
+ return count ? 0 : skipped ? -EEXIST : -ENOENT;
}
ret = microcode_decode_node(blob, node, &update);
@@ -135,12 +139,15 @@ int microcode_update_intel(void)
ret);
return ret;
}
- if (update.processor_signature == cpu.processor_signature &&
- (update.processor_flags & cpu.processor_flags)) {
- debug("%s: Update already exists\n", __func__);
- return -EEXIST;
+ if (!(update.processor_signature == cpu.processor_signature &&
+ (update.processor_flags & cpu.processor_flags))) {
+ debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
+ __func__, update.processor_signature,
+ update.processor_flags);
+ skipped++;
+ continue;
}
-
+ ret = microcode_read_rev();
wrmsr(0x79, (ulong)update.data, 0);
debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
microcode_read_rev(), update.date_code & 0xffff,
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index df2b990..b95e781 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -177,7 +177,7 @@ int sdram_initialise(struct pei_data *pei_data)
debug("PEI data at %p, size %x:\n", pei_data, sizeof(*pei_data));
- data = (char *)CONFIG_X86_MRC_START;
+ data = (char *)CONFIG_X86_MRC_ADDR;
if (data) {
int rv;
int (*func)(struct pei_data *);
diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
new file mode 100644
index 0000000..f6b5201
--- /dev/null
+++ b/arch/x86/cpu/queensbay/Kconfig
@@ -0,0 +1,79 @@
+#
+# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+config INTEL_QUEENSBAY
+ bool
+ select HAVE_FSP
+ select HAVE_CMC
+
+if INTEL_QUEENSBAY
+
+config HAVE_FSP
+ bool "Add an Firmware Support Package binary"
+ help
+ Select this option to add an Firmware Support Package binary to
+ the resulting U-Boot image. It is a binary blob which U-Boot uses
+ to set up SDRAM and other chipset specific initialization.
+
+ Note: Without this binary U-Boot will not be able to set up its
+ SDRAM so will not boot.
+
+config FSP_FILE
+ string "Firmware Support Package binary filename"
+ depends on HAVE_FSP
+ default "fsp.bin"
+ help
+ The filename of the file to use as Firmware Support Package binary
+ in the board directory.
+
+config FSP_ADDR
+ hex "Firmware Support Package binary location"
+ depends on HAVE_FSP
+ default 0xfffc0000
+ help
+ FSP is not Position Independent Code (PIC) and the whole FSP has to
+ be rebased if it is placed at a location which is different from the
+ perferred base address specified during the FSP build. Use Intel's
+ Binary Configuration Tool (BCT) to do the rebase.
+
+ The default base address of 0xfffc0000 indicates that the binary must
+ be located at offset 0xc0000 from the beginning of a 1MB flash device.
+
+config FSP_TEMP_RAM_ADDR
+ hex
+ default 0x2000000
+ help
+ Stack top address which is used in FspInit after DRAM is ready and
+ CAR is disabled.
+
+config HAVE_CMC
+ bool "Add a Chipset Micro Code state machine binary"
+ help
+ Select this option to add a Chipset Micro Code state machine binary
+ to the resulting U-Boot image. It is a 64K data block of machine
+ specific code which must be put in the flash for the processor to
+ access when powered up before system BIOS is executed.
+
+config CMC_FILE
+ string "Chipset Micro Code state machine filename"
+ depends on HAVE_CMC
+ default "cmc.bin"
+ help
+ The filename of the file to use as Chipset Micro Code state machine
+ binary in the board directory.
+
+config CMC_ADDR
+ hex "Chipset Micro Code state machine binary location"
+ depends on HAVE_CMC
+ default 0xfffb0000
+ help
+ The location of the CMC binary is determined by a strap. It must be
+ put in flash at a location matching the strap-determined base address.
+
+ The default base address of 0xfffb0000 indicates that the binary must
+ be located at offset 0xb0000 from the beginning of a 1MB flash device.
+
+endif
diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile
new file mode 100644
index 0000000..2c2ec01
--- /dev/null
+++ b/arch/x86/cpu/queensbay/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += tnc_car.o tnc_dram.o tnc.o topcliff.o
+obj-y += fsp_configs.o fsp_support.o
+obj-$(CONFIG_PCI) += tnc_pci.o
diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c
index aef18fc..af28e45 100644
--- a/arch/x86/cpu/queensbay/fsp_configs.c
+++ b/arch/x86/cpu/queensbay/fsp_configs.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <asm/arch/fsp/fsp_support.h>
-void update_fsp_upd(struct upd_region_t *fsp_upd)
+void update_fsp_upd(struct upd_region *fsp_upd)
{
/* Override any UPD setting if required */
diff --git a/arch/x86/cpu/queensbay/fsp_support.c b/arch/x86/cpu/queensbay/fsp_support.c
index df3bbd0..ef1916b 100644
--- a/arch/x86/cpu/queensbay/fsp_support.c
+++ b/arch/x86/cpu/queensbay/fsp_support.c
@@ -10,67 +10,48 @@
#include <asm/post.h>
/**
- * Reads a 64-bit value from memory that may be unaligned.
- *
- * This function returns the 64-bit value pointed to by buf. The function
- * guarantees that the read operation does not produce an alignment fault.
- *
- * If the buf is NULL, then ASSERT().
- *
- * @buf: Pointer to a 64-bit value that may be unaligned.
- *
- * @return: The 64-bit value read from buf.
- */
-static u64 read_unaligned64(const u64 *buf)
-{
- ASSERT(buf != NULL);
-
- return *buf;
-}
-
-/**
* Compares two GUIDs
*
- * If the GUIDs are identical then TRUE is returned.
- * If there are any bit differences in the two GUIDs, then FALSE is returned.
- *
- * If guid1 is NULL, then ASSERT().
- * If guid2 is NULL, then ASSERT().
+ * If the GUIDs are identical then true is returned.
+ * If there are any bit differences in the two GUIDs, then false is returned.
*
* @guid1: A pointer to a 128 bit GUID.
* @guid2: A pointer to a 128 bit GUID.
*
- * @retval TRUE: guid1 and guid2 are identical.
- * @retval FALSE: guid1 and guid2 are not identical.
+ * @retval true: guid1 and guid2 are identical.
+ * @retval false: guid1 and guid2 are not identical.
*/
-static unsigned char compare_guid(const struct efi_guid_t *guid1,
- const struct efi_guid_t *guid2)
+static bool compare_guid(const struct efi_guid *guid1,
+ const struct efi_guid *guid2)
{
- u64 guid1_low;
- u64 guid2_low;
- u64 guid1_high;
- u64 guid2_high;
-
- guid1_low = read_unaligned64((const u64 *)guid1);
- guid2_low = read_unaligned64((const u64 *)guid2);
- guid1_high = read_unaligned64((const u64 *)guid1 + 1);
- guid2_high = read_unaligned64((const u64 *)guid2 + 1);
-
- return (unsigned char)(guid1_low == guid2_low && guid1_high == guid2_high);
+ if (memcmp(guid1, guid2, sizeof(struct efi_guid)) == 0)
+ return true;
+ else
+ return false;
}
u32 __attribute__((optimize("O0"))) find_fsp_header(void)
{
+ /*
+ * This function may be called before the a stack is established,
+ * so special care must be taken. First, it cannot declare any local
+ * variable using stack. Only register variable can be used here.
+ * Secondly, some compiler version will add prolog or epilog code
+ * for the C function. If so the function call may not work before
+ * stack is ready.
+ *
+ * GCC 4.8.1 has been verified to be working for the following codes.
+ */
volatile register u8 *fsp asm("eax");
/* Initalize the FSP base */
- fsp = (u8 *)CONFIG_FSP_LOCATION;
+ fsp = (u8 *)CONFIG_FSP_ADDR;
/* Check the FV signature, _FVH */
- if (((struct fv_header_t *)fsp)->sign == 0x4856465F) {
+ if (((struct fv_header *)fsp)->sign == EFI_FVH_SIGNATURE) {
/* Go to the end of the FV header and align the address */
- fsp += ((struct fv_header_t *)fsp)->ext_hdr_off;
- fsp += ((struct fv_ext_header_t *)fsp)->ext_hdr_size;
+ fsp += ((struct fv_header *)fsp)->ext_hdr_off;
+ fsp += ((struct fv_ext_header *)fsp)->ext_hdr_size;
fsp = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8);
} else {
fsp = 0;
@@ -78,20 +59,27 @@ u32 __attribute__((optimize("O0"))) find_fsp_header(void)
/* Check the FFS GUID */
if (fsp &&
- (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[0] == 0x912740BE) &&
- (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[1] == 0x47342284) &&
- (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[2] == 0xB08471B9) &&
- (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[3] == 0x0C3F3527)) {
+ ((struct ffs_file_header *)fsp)->name.data1 == FSP_GUID_DATA1 &&
+ ((struct ffs_file_header *)fsp)->name.data2 == FSP_GUID_DATA2 &&
+ ((struct ffs_file_header *)fsp)->name.data3 == FSP_GUID_DATA3 &&
+ ((struct ffs_file_header *)fsp)->name.data4[0] == FSP_GUID_DATA4_0 &&
+ ((struct ffs_file_header *)fsp)->name.data4[1] == FSP_GUID_DATA4_1 &&
+ ((struct ffs_file_header *)fsp)->name.data4[2] == FSP_GUID_DATA4_2 &&
+ ((struct ffs_file_header *)fsp)->name.data4[3] == FSP_GUID_DATA4_3 &&
+ ((struct ffs_file_header *)fsp)->name.data4[4] == FSP_GUID_DATA4_4 &&
+ ((struct ffs_file_header *)fsp)->name.data4[5] == FSP_GUID_DATA4_5 &&
+ ((struct ffs_file_header *)fsp)->name.data4[6] == FSP_GUID_DATA4_6 &&
+ ((struct ffs_file_header *)fsp)->name.data4[7] == FSP_GUID_DATA4_7) {
/* Add the FFS header size to find the raw section header */
- fsp += sizeof(struct ffs_file_header_t);
+ fsp += sizeof(struct ffs_file_header);
} else {
fsp = 0;
}
if (fsp &&
- ((struct raw_section_t *)fsp)->type == EFI_SECTION_RAW) {
+ ((struct raw_section *)fsp)->type == EFI_SECTION_RAW) {
/* Add the raw section header size to find the FSP header */
- fsp += sizeof(struct raw_section_t);
+ fsp += sizeof(struct raw_section);
} else {
fsp = 0;
}
@@ -99,7 +87,7 @@ u32 __attribute__((optimize("O0"))) find_fsp_header(void)
return (u32)fsp;
}
-void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list)
+void fsp_continue(struct shared_data *shared_data, u32 status, void *hob_list)
{
u32 stack_len;
u32 stack_base;
@@ -107,18 +95,18 @@ void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list)
post_code(POST_MRC);
- ASSERT(status == 0);
+ assert(status == 0);
/* Get the migrated stack in normal memory */
- stack_base = (u32)get_bootloader_tmp_mem(hob_list, &stack_len);
- ASSERT(stack_base != 0);
+ stack_base = (u32)fsp_get_bootloader_tmp_mem(hob_list, &stack_len);
+ assert(stack_base != 0);
stack_top = stack_base + stack_len - sizeof(u32);
/*
* Old stack base is stored at the very end of the stack top,
* use it to calculate the migrated shared data base
*/
- shared_data = (struct shared_data_t *)(stack_base +
+ shared_data = (struct shared_data *)(stack_base +
((u32)shared_data - *(u32 *)stack_top));
/* The boot loader main function entry */
@@ -127,50 +115,50 @@ void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list)
void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
{
- struct shared_data_t shared_data;
+ struct shared_data shared_data;
fsp_init_f init;
- struct fsp_init_params_t params;
- struct fspinit_rtbuf_t rt_buf;
- struct vpd_region_t *fsp_vpd;
- struct fsp_header_t *fsp_hdr;
- struct fsp_init_params_t *params_ptr;
- struct upd_region_t *fsp_upd;
-
- fsp_hdr = (struct fsp_header_t *)find_fsp_header();
+ struct fsp_init_params params;
+ struct fspinit_rtbuf rt_buf;
+ struct vpd_region *fsp_vpd;
+ struct fsp_header *fsp_hdr;
+ struct fsp_init_params *params_ptr;
+ struct upd_region *fsp_upd;
+
+ fsp_hdr = (struct fsp_header *)find_fsp_header();
if (fsp_hdr == NULL) {
/* No valid FSP info header was found */
- ASSERT(FALSE);
+ panic("Invalid FSP header");
}
- fsp_upd = (struct upd_region_t *)&shared_data.fsp_upd;
- memset((void *)&rt_buf, 0, sizeof(struct fspinit_rtbuf_t));
+ fsp_upd = (struct upd_region *)&shared_data.fsp_upd;
+ memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf));
/* Reserve a gap in stack top */
rt_buf.common.stack_top = (u32 *)stack_top - 32;
rt_buf.common.boot_mode = boot_mode;
- rt_buf.common.upd_data = (struct upd_region_t *)fsp_upd;
+ rt_buf.common.upd_data = (struct upd_region *)fsp_upd;
/* Get VPD region start */
- fsp_vpd = (struct vpd_region_t *)(fsp_hdr->img_base +
+ fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base +
fsp_hdr->cfg_region_off);
/* Verifify the VPD data region is valid */
- ASSERT((fsp_vpd->img_rev == VPD_IMAGE_REV) &&
+ assert((fsp_vpd->img_rev == VPD_IMAGE_REV) &&
(fsp_vpd->sign == VPD_IMAGE_ID));
/* Copy default data from Flash */
memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset),
- sizeof(struct upd_region_t));
+ sizeof(struct upd_region));
/* Verifify the UPD data region is valid */
- ASSERT(fsp_upd->terminator == 0x55AA);
+ assert(fsp_upd->terminator == UPD_TERMINATOR);
/* Override any UPD setting if required */
update_fsp_upd(fsp_upd);
- memset((void *)&params, 0, sizeof(struct fsp_init_params_t));
+ memset(&params, 0, sizeof(struct fsp_init_params));
params.nvs_buf = nvs_buf;
- params.rt_buf = (struct fspinit_rtbuf_t *)&rt_buf;
+ params.rt_buf = (struct fspinit_rtbuf *)&rt_buf;
params.continuation = (fsp_continuation_f)asm_continuation;
init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init);
@@ -199,32 +187,28 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
/*
* Should never get here.
- * Control will continue from romstage_main_continue_asm.
+ * Control will continue from fsp_continue.
* This line below is to prevent the compiler from optimizing
* structure intialization.
+ *
+ * DO NOT REMOVE!
*/
init(&params);
-
- /*
- * Should never return.
- * Control will continue from ContinuationFunc
- */
- ASSERT(FALSE);
}
-u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase)
+u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase)
{
fsp_notify_f notify;
- struct fsp_notify_params_t params;
- struct fsp_notify_params_t *params_ptr;
+ struct fsp_notify_params params;
+ struct fsp_notify_params *params_ptr;
u32 status;
if (!fsp_hdr)
- fsp_hdr = (struct fsp_header_t *)find_fsp_header();
+ fsp_hdr = (struct fsp_header *)find_fsp_header();
if (fsp_hdr == NULL) {
/* No valid FSP info header */
- ASSERT(FALSE);
+ panic("Invalid FSP header");
}
notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify);
@@ -245,9 +229,9 @@ u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase)
return status;
}
-u32 get_usable_lowmem_top(const void *hob_list)
+u32 fsp_get_usable_lowmem_top(const void *hob_list)
{
- union hob_pointers_t hob;
+ union hob_pointers hob;
phys_addr_t phys_start;
u32 top;
@@ -255,26 +239,26 @@ u32 get_usable_lowmem_top(const void *hob_list)
hob.raw = (void *)hob_list;
/* * Collect memory ranges */
- top = 0x100000;
- while (!END_OF_HOB(hob)) {
- if (hob.hdr->type == HOB_TYPE_RES_DESC) {
+ top = FSP_LOWMEM_BASE;
+ while (!end_of_hob(hob)) {
+ if (get_hob_type(hob) == HOB_TYPE_RES_DESC) {
if (hob.res_desc->type == RES_SYS_MEM) {
phys_start = hob.res_desc->phys_start;
/* Need memory above 1MB to be collected here */
- if (phys_start >= 0x100000 &&
- phys_start < (phys_addr_t)0x100000000)
+ if (phys_start >= FSP_LOWMEM_BASE &&
+ phys_start < (phys_addr_t)FSP_HIGHMEM_BASE)
top += (u32)(hob.res_desc->len);
}
}
- hob.raw = GET_NEXT_HOB(hob);
+ hob.raw = get_next_hob(hob);
}
return top;
}
-u64 get_usable_highmem_top(const void *hob_list)
+u64 fsp_get_usable_highmem_top(const void *hob_list)
{
- union hob_pointers_t hob;
+ union hob_pointers hob;
phys_addr_t phys_start;
u64 top;
@@ -282,33 +266,33 @@ u64 get_usable_highmem_top(const void *hob_list)
hob.raw = (void *)hob_list;
/* Collect memory ranges */
- top = 0x100000000;
- while (!END_OF_HOB(hob)) {
- if (hob.hdr->type == HOB_TYPE_RES_DESC) {
+ top = FSP_HIGHMEM_BASE;
+ while (!end_of_hob(hob)) {
+ if (get_hob_type(hob) == HOB_TYPE_RES_DESC) {
if (hob.res_desc->type == RES_SYS_MEM) {
phys_start = hob.res_desc->phys_start;
/* Need memory above 1MB to be collected here */
- if (phys_start >= (phys_addr_t)0x100000000)
+ if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE)
top += (u32)(hob.res_desc->len);
}
}
- hob.raw = GET_NEXT_HOB(hob);
+ hob.raw = get_next_hob(hob);
}
return top;
}
-u64 get_fsp_reserved_mem_from_guid(const void *hob_list, u64 *len,
- struct efi_guid_t *guid)
+u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len,
+ struct efi_guid *guid)
{
- union hob_pointers_t hob;
+ union hob_pointers hob;
/* Get the HOB list for processing */
hob.raw = (void *)hob_list;
/* Collect memory ranges */
- while (!END_OF_HOB(hob)) {
- if (hob.hdr->type == HOB_TYPE_RES_DESC) {
+ while (!end_of_hob(hob)) {
+ if (get_hob_type(hob) == HOB_TYPE_RES_DESC) {
if (hob.res_desc->type == RES_MEM_RESERVED) {
if (compare_guid(&hob.res_desc->owner, guid)) {
if (len)
@@ -318,99 +302,100 @@ u64 get_fsp_reserved_mem_from_guid(const void *hob_list, u64 *len,
}
}
}
- hob.raw = GET_NEXT_HOB(hob);
+ hob.raw = get_next_hob(hob);
}
return 0;
}
-u32 get_fsp_reserved_mem(const void *hob_list, u32 *len)
+u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len)
{
- const struct efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
+ const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
u64 length;
u32 base;
- base = (u32)get_fsp_reserved_mem_from_guid(hob_list,
- &length, (struct efi_guid_t *)&guid);
+ base = (u32)fsp_get_reserved_mem_from_guid(hob_list,
+ &length, (struct efi_guid *)&guid);
if ((len != 0) && (base != 0))
*len = (u32)length;
return base;
}
-u32 get_tseg_reserved_mem(const void *hob_list, u32 *len)
+u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len)
{
- const struct efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID;
+ const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID;
u64 length;
u32 base;
- base = (u32)get_fsp_reserved_mem_from_guid(hob_list,
- &length, (struct efi_guid_t *)&guid);
+ base = (u32)fsp_get_reserved_mem_from_guid(hob_list,
+ &length, (struct efi_guid *)&guid);
if ((len != 0) && (base != 0))
*len = (u32)length;
return base;
}
-void *get_next_hob(u16 type, const void *hob_list)
+void *fsp_get_next_hob(u16 type, const void *hob_list)
{
- union hob_pointers_t hob;
+ union hob_pointers hob;
- ASSERT(hob_list != NULL);
+ assert(hob_list != NULL);
hob.raw = (u8 *)hob_list;
/* Parse the HOB list until end of list or matching type is found */
- while (!END_OF_HOB(hob)) {
- if (hob.hdr->type == type)
+ while (!end_of_hob(hob)) {
+ if (get_hob_type(hob) == type)
return hob.raw;
- hob.raw = GET_NEXT_HOB(hob);
+ hob.raw = get_next_hob(hob);
}
return NULL;
}
-void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list)
+void *fsp_get_next_guid_hob(const struct efi_guid *guid, const void *hob_list)
{
- union hob_pointers_t hob;
+ union hob_pointers hob;
hob.raw = (u8 *)hob_list;
- while ((hob.raw = get_next_hob(HOB_TYPE_GUID_EXT,
+ while ((hob.raw = fsp_get_next_hob(HOB_TYPE_GUID_EXT,
hob.raw)) != NULL) {
if (compare_guid(guid, &hob.guid->name))
break;
- hob.raw = GET_NEXT_HOB(hob);
+ hob.raw = get_next_hob(hob);
}
return hob.raw;
}
-void *get_guid_hob_data(const void *hob_list, u32 *len, struct efi_guid_t *guid)
+void *fsp_get_guid_hob_data(const void *hob_list, u32 *len,
+ struct efi_guid *guid)
{
u8 *guid_hob;
- guid_hob = get_next_guid_hob(guid, hob_list);
+ guid_hob = fsp_get_next_guid_hob(guid, hob_list);
if (guid_hob == NULL) {
return NULL;
} else {
if (len)
- *len = GET_GUID_HOB_DATA_SIZE(guid_hob);
+ *len = get_guid_hob_data_size(guid_hob);
- return GET_GUID_HOB_DATA(guid_hob);
+ return get_guid_hob_data(guid_hob);
}
}
-void *get_fsp_nvs_data(const void *hob_list, u32 *len)
+void *fsp_get_nvs_data(const void *hob_list, u32 *len)
{
- const struct efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+ const struct efi_guid guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
- return get_guid_hob_data(hob_list, len, (struct efi_guid_t *)&guid);
+ return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid);
}
-void *get_bootloader_tmp_mem(const void *hob_list, u32 *len)
+void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len)
{
- const struct efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID;
+ const struct efi_guid guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID;
- return get_guid_hob_data(hob_list, len, (struct efi_guid_t *)&guid);
+ return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid);
}
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
new file mode 100644
index 0000000..8637cdc
--- /dev/null
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/pci.h>
+#include <asm/post.h>
+#include <asm/arch/tnc.h>
+#include <asm/arch/fsp/fsp_support.h>
+#include <asm/processor.h>
+
+static void unprotect_spi_flash(void)
+{
+ u32 bc;
+
+ bc = pci_read_config32(PCH_LPC_DEV, 0xd8);
+ bc |= 0x1; /* unprotect the flash */
+ pci_write_config32(PCH_LPC_DEV, 0xd8, bc);
+}
+
+int arch_cpu_init(void)
+{
+ struct pci_controller *hose;
+ int ret;
+
+ post_code(POST_CPU_INIT);
+#ifdef CONFIG_SYS_X86_TSC_TIMER
+ timer_set_base(rdtsc());
+#endif
+
+ ret = x86_cpu_init_f();
+ if (ret)
+ return ret;
+
+ ret = pci_early_init_hose(&hose);
+ if (ret)
+ return ret;
+
+ unprotect_spi_flash();
+
+ return 0;
+}
+
+int print_cpuinfo(void)
+{
+ post_code(POST_CPU_INFO);
+ return default_print_cpuinfo();
+}
+
+void reset_cpu(ulong addr)
+{
+ /* cold reset */
+ outb(0x06, PORT_RESET);
+}
+
+void board_final_cleanup(void)
+{
+ u32 status;
+
+ /* call into FspNotify */
+ debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
+ status = fsp_notify(NULL, INIT_PHASE_BOOT);
+ if (status != FSP_SUCCESS)
+ debug("fail, error code %x\n", status);
+ else
+ debug("OK\n");
+
+ return;
+}
diff --git a/arch/x86/cpu/queensbay/tnc_car.S b/arch/x86/cpu/queensbay/tnc_car.S
new file mode 100644
index 0000000..5e09568
--- /dev/null
+++ b/arch/x86/cpu/queensbay/tnc_car.S
@@ -0,0 +1,124 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/post.h>
+
+.globl car_init
+car_init:
+ /*
+ * Note: ebp holds the BIST value (built-in self test) so far, but ebp
+ * will be destroyed through the FSP call, thus we have to test the
+ * BIST value here before we call into FSP.
+ */
+ test %ebp, %ebp
+ jz car_init_start
+ post_code(POST_BIST_FAILURE)
+ jmp die
+
+car_init_start:
+ post_code(POST_CAR_START)
+ lea find_fsp_header_romstack, %esp
+ jmp find_fsp_header
+
+find_fsp_header_ret:
+ /* EAX points to FSP_INFO_HEADER */
+ mov %eax, %ebp
+
+ /* sanity test */
+ cmp $CONFIG_FSP_ADDR, %eax
+ jb die
+
+ /* calculate TempRamInitEntry address */
+ mov 0x30(%ebp), %eax
+ add 0x1c(%ebp), %eax
+
+ /* call FSP TempRamInitEntry to setup temporary stack */
+ lea temp_ram_init_romstack, %esp
+ jmp *%eax
+
+temp_ram_init_ret:
+ addl $4, %esp
+ cmp $0, %eax
+ jnz car_init_fail
+
+ post_code(POST_CAR_CPU_CACHE)
+
+ /*
+ * The FSP TempRamInit initializes the ecx and edx registers to
+ * point to a temporary but writable memory range (Cache-As-RAM).
+ * ecx: the start of this temporary memory range,
+ * edx: the end of this range.
+ */
+
+ /* stack grows down from top of CAR */
+ movl %edx, %esp
+
+ /*
+ * TODO:
+ *
+ * According to FSP architecture spec, the fsp_init() will not return
+ * to its caller, instead it requires the bootloader to provide a
+ * so-called continuation function to pass into the FSP as a parameter
+ * of fsp_init, and fsp_init() will call that continuation function
+ * directly.
+ *
+ * The call to fsp_init() may need to be moved out of the car_init()
+ * to cpu_init_f() with the help of some inline assembly codes.
+ * Note there is another issue that fsp_init() will setup another stack
+ * using the fsp_init parameter stack_top after DRAM is initialized,
+ * which means any data on the previous stack (on the CAR) gets lost
+ * (ie: U-Boot global_data). FSP is supposed to support such scenario,
+ * however it does not work. This should be revisited in the future.
+ */
+ movl $CONFIG_FSP_TEMP_RAM_ADDR, %eax
+ xorl %edx, %edx
+ xorl %ecx, %ecx
+ call fsp_init
+
+.global fsp_init_done
+fsp_init_done:
+ /*
+ * We come here from FspInit with eax pointing to the HOB list.
+ * Save eax to esi temporarily.
+ */
+ movl %eax, %esi
+ /*
+ * Re-initialize the ebp (BIST) to zero, as we already reach here
+ * which means we passed BIST testing before.
+ */
+ xorl %ebp, %ebp
+ jmp car_init_ret
+
+car_init_fail:
+ post_code(POST_CAR_FAILURE)
+
+die:
+ hlt
+ jmp die
+ hlt
+
+ /*
+ * The function call before CAR initialization is tricky. It cannot
+ * be called using the 'call' instruction but only the 'jmp' with
+ * the help of a handcrafted stack in the ROM. The stack needs to
+ * contain the function return address as well as the parameters.
+ */
+ .balign 4
+find_fsp_header_romstack:
+ .long find_fsp_header_ret
+
+ .balign 4
+temp_ram_init_romstack:
+ .long temp_ram_init_ret
+ .long temp_ram_init_params
+temp_ram_init_params:
+_dt_ucode_base_size:
+ /* These next two fields are filled in by ifdtool */
+ .long 0 /* microcode base */
+ .long 0 /* microcode size */
+ .long CONFIG_SYS_MONITOR_BASE /* code region base */
+ .long CONFIG_SYS_MONITOR_LEN /* code region size */
diff --git a/arch/x86/cpu/queensbay/tnc_dram.c b/arch/x86/cpu/queensbay/tnc_dram.c
new file mode 100644
index 0000000..8e97c9b
--- /dev/null
+++ b/arch/x86/cpu/queensbay/tnc_dram.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/fsp/fsp_support.h>
+#include <asm/e820.h>
+#include <asm/post.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ phys_size_t ram_size = 0;
+ union hob_pointers hob;
+
+ hob.raw = gd->arch.hob_list;
+ while (!end_of_hob(hob)) {
+ if (get_hob_type(hob) == HOB_TYPE_RES_DESC) {
+ if (hob.res_desc->type == RES_SYS_MEM ||
+ hob.res_desc->type == RES_MEM_RESERVED) {
+ ram_size += hob.res_desc->len;
+ }
+ }
+ hob.raw = get_next_hob(hob);
+ }
+
+ gd->ram_size = ram_size;
+ post_code(POST_DRAM);
+
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = 0;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+/*
+ * This function looks for the highest region of memory lower than 4GB which
+ * has enough space for U-Boot where U-Boot is aligned on a page boundary.
+ * It overrides the default implementation found elsewhere which simply
+ * picks the end of ram, wherever that may be. The location of the stack,
+ * the relocation address, and how far U-Boot is moved by relocation are
+ * set in the global data structure.
+ */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ return fsp_get_usable_lowmem_top(gd->arch.hob_list);
+}
+
+unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+{
+ unsigned num_entries = 0;
+
+ union hob_pointers hob;
+
+ hob.raw = gd->arch.hob_list;
+
+ while (!end_of_hob(hob)) {
+ if (get_hob_type(hob) == HOB_TYPE_RES_DESC) {
+ entries[num_entries].addr = hob.res_desc->phys_start;
+ entries[num_entries].size = hob.res_desc->len;
+
+ if (hob.res_desc->type == RES_SYS_MEM)
+ entries[num_entries].type = E820_RAM;
+ else if (hob.res_desc->type == RES_MEM_RESERVED)
+ entries[num_entries].type = E820_RESERVED;
+ }
+ hob.raw = get_next_hob(hob);
+ num_entries++;
+ }
+
+ return num_entries;
+}
diff --git a/arch/x86/cpu/queensbay/tnc_pci.c b/arch/x86/cpu/queensbay/tnc_pci.c
new file mode 100644
index 0000000..39bff49
--- /dev/null
+++ b/arch/x86/cpu/queensbay/tnc_pci.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <asm/pci.h>
+#include <asm/arch/fsp/fsp_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_pci_setup_hose(struct pci_controller *hose)
+{
+ hose->first_busno = 0;
+ hose->last_busno = 0;
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 0,
+ CONFIG_PCI_MEM_BUS,
+ CONFIG_PCI_MEM_PHYS,
+ CONFIG_PCI_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 1,
+ CONFIG_PCI_IO_BUS,
+ CONFIG_PCI_IO_PHYS,
+ CONFIG_PCI_IO_SIZE,
+ PCI_REGION_IO);
+
+ pci_set_region(hose->regions + 2,
+ CONFIG_PCI_PREF_BUS,
+ CONFIG_PCI_PREF_PHYS,
+ CONFIG_PCI_PREF_SIZE,
+ PCI_REGION_PREFETCH);
+
+ pci_set_region(hose->regions + 3,
+ 0,
+ 0,
+ gd->ram_size,
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+
+ hose->region_count = 4;
+}
+
+int board_pci_post_scan(struct pci_controller *hose)
+{
+ u32 status;
+
+ /* call into FspNotify */
+ debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
+ status = fsp_notify(NULL, INIT_PHASE_PCI);
+ if (status != FSP_SUCCESS)
+ debug("fail, error code %x\n", status);
+ else
+ debug("OK\n");
+
+ return 0;
+}
diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c
new file mode 100644
index 0000000..b01422a
--- /dev/null
+++ b/arch/x86/cpu/queensbay/topcliff.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <pci.h>
+#include <pci_ids.h>
+#include <sdhci.h>
+
+static struct pci_device_id mmc_supported[] = {
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
+ { }
+};
+
+int cpu_mmc_init(bd_t *bis)
+{
+ struct sdhci_host *mmc_host;
+ pci_dev_t devbusfn;
+ u32 iobase;
+ int ret;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(mmc_supported); i++) {
+ devbusfn = pci_find_devices(mmc_supported, i);
+ if (devbusfn == -1)
+ return -ENODEV;
+
+ mmc_host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+ if (!mmc_host)
+ return -ENOMEM;
+
+ mmc_host->name = "Topcliff SDHCI";
+ pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase);
+ mmc_host->ioaddr = (void *)iobase;
+ mmc_host->quirks = 0;
+ ret = add_sdhci(mmc_host, 0, 0);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/arch/x86/dts/coreboot.dtsi b/arch/x86/dts/coreboot.dtsi
index c8dc4ce..65a93ac 100644
--- a/arch/x86/dts/coreboot.dtsi
+++ b/arch/x86/dts/coreboot.dtsi
@@ -6,7 +6,7 @@
};
serial {
- compatible = "coreboot-uart";
+ compatible = "x86-uart";
reg = <0x3f8 0x10>;
reg-shift = <0>;
io-mapped = <1>;
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 399dafb..3f43f3c 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -50,4 +50,11 @@
memory-map = <0xffe00000 0x00200000>;
};
};
+
+ microcode {
+ update@0 {
+#include "microcode/m0220661105_cv.dtsi"
+ };
+ };
+
};
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index 592af16..a739080 100644
--- a/arch/x86/dts/link.dts
+++ b/arch/x86/dts/link.dts
@@ -214,10 +214,10 @@
microcode {
update@0 {
-#include "m12206a7_00000028.dtsi"
+#include "microcode/m12206a7_00000029.dtsi"
};
update@1 {
-#include "m12306a9_00000017.dtsi"
+#include "microcode/m12306a9_0000001b.dtsi"
};
};
diff --git a/arch/x86/dts/m12206a7_00000028.dtsi b/arch/x86/dts/m12206a7_00000028.dtsi
deleted file mode 100644
index bcd5248..0000000
--- a/arch/x86/dts/m12206a7_00000028.dtsi
+++ /dev/null
@@ -1,622 +0,0 @@
-/*
- * Copyright (c) <1995-2013>, Intel Corporation.
- * All rights reserved.
- *
- * Redistribution. Redistribution and use in binary form, without modification, are
- * permitted provided that the following conditions are met:
- * .Redistributions must reproduce the above copyright notice and the following
- * disclaimer in the documentation and/or other materials provided with the
- * distribution.
- * Neither the name of Intel Corporation nor the names of its suppliers may be used
- * to endorse or promote products derived from this software without specific prior
- * written permission.
- * .No reverse engineering, decompilation, or disassembly of this software is
- * permitted.
- * ."Binary form" includes any format commonly used for electronic conveyance
- * which is a reversible, bit-exact translation of binary representation to ASCII or
- * ISO text, for example, "uuencode."
- *
- * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
- * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
- * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *---
- * This is a device tree fragment. Use #include to add these properties to a
- * node.
- */
-
-compatible = "intel,microcode";
-intel,header-version = <1>;
-intel,update-revision = <0x28>;
-intel,date-code = <0x04242012>;
-intel,processor-signature = <0x000206a7>;
-intel,checksum = <0xf3e9935d>;
-intel,loader-revision = <1>;
-intel,processor-flags = <0x12>;
-
-/* The 48-byte public header is omitted. */
-data = <
- 0x00000000 0x000000a1 0x00020001 0x00000028
- 0x00000000 0x00000000 0x20120423 0x000008f1
- 0x00000001 0x000206a7 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000000 0x000008f1 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000000 0x00000000
- 0x52b813ac 0xdb8994c7 0x70e9f6bb 0x9d6db2ff
- 0xf4d70f5d 0x5b1eccf6 0xac59106f 0x0ae2e2c1
- 0x1a7bbeb1 0x355a1d62 0x2e7eb594 0x09f8dea9
- 0x432a49e4 0xbf520253 0xdafa4010 0x893a858a
- 0x766e0efb 0xd91e196d 0x838bd2ef 0xe5146494
- 0xd515f413 0x29704828 0xe85598b6 0xdcbe6c51
- 0x88eabbfa 0xa1e8909f 0xd8931721 0x35386554
- 0x089a78a7 0xd9914775 0xd4644748 0x1556a4dc
- 0xf44448f6 0xd054d7db 0xf30f2b7d 0x5ae223d0
- 0xcbbb48b0 0x5c8b0383 0x177de157 0x9c1e5f73
- 0x2ec28289 0xd72a7b6c 0x823b6eb2 0x35e02171
- 0xba8deae4 0x06f4d468 0x13dbafaa 0x72b419f1
- 0x033385b5 0x05806920 0x4c6034cf 0x9bd117dc
- 0x976e2d04 0x250330f0 0x7250b5e1 0x184980c2
- 0x12a9d7d6 0x1bc808f9 0xae79994f 0xc6f87901
- 0xc0e3132f 0x671491c5 0x236cad39 0x37889d9c
- 0x67f7c3f3 0x964a6be5 0xbcced7da 0x57eeaa6e
- 0x7bca1522 0x654fee4c 0x2a1ca5d9 0xa1803cf3
- 0x00000011 0x8c316d2c 0x17603b7e 0x32e42981
- 0xc26c1400 0xf0fbccb6 0xeab6b43a 0x11d456a5
- 0x5b912d46 0x15195fe0 0x542f6db3 0x0b7f212e
- 0x47718dd9 0x7c41b108 0x06c21111 0x4445d5ea
- 0xb4fb8128 0xe07404a6 0x8d503da4 0x78fc7e44
- 0xb9919656 0x9968c797 0x87f26ab0 0x23bb1af7
- 0x1ec5d761 0x26f30d2c 0x7cdb747c 0xe4d42033
- 0x8a5d4801 0x768aff57 0xbcfd5d11 0x7c853c2d
- 0x231e6207 0x8b1988a6 0xd68fdb75 0x58dcb417
- 0x44422ef9 0x2a186ebb 0x7d27e85f 0x36ac31f7
- 0x1e487e77 0x2b0b8c37 0xd8ba682f 0x2cba791b
- 0xe6d3dece 0x1b2c2a99 0x4e5decab 0xfbd313a3
- 0xdbc78294 0x5a80cce7 0x2d8e0f0b 0xcf564f71
- 0x073d1f37 0x25162870 0x96cdb85b 0x9c553048
- 0x24eba740 0xfc0f352e 0x0c83be68 0x89b5076c
- 0xc39c4355 0x6a4cf25c 0x2bbd2682 0xc524fdb9
- 0x7ea19bae 0x191ad6f1 0xd3fbf3bf 0x21bf77fa
- 0x8f77fec4 0x0f90f635 0xe55e165c 0x868d58c0
- 0x966bc0ad 0x6c276364 0x9d8f7eff 0x4b7925d4
- 0x8b2f9326 0x4ab7b47e 0x33a9087c 0xf31ab949
- 0x69831dfb 0x4711a215 0x8128c1fa 0x8481c213
- 0x7401b01b 0xfdcfdc50 0xd6b55266 0xae9b23ac
- 0xfa2ad275 0xa225bb45 0x4dd720c4 0x760a20e6
- 0x5f1223c9 0x2f334372 0x6e1dcdab 0xe8ee8638
- 0x1c19ba8a 0xef9341c4 0x360aaa9d 0x90452ea9
- 0x65852446 0xe9398fa3 0xbba6a631 0x1a3e90b9
- 0xe2a73a56 0x6e8c0747 0x35c7c53d 0xcc1ac842
- 0x183356af 0xb6e98608 0x987b43c2 0xa8a3cfd2
- 0xc2c5fce0 0xcc3af64a 0xd6d3a291 0xe59ad1f5
- 0x124ca513 0x9522b50a 0x25150477 0xa2eb5797
- 0x7fc63626 0x648c48e3 0x9f5797ff 0x2307b84d
- 0x980625a4 0xabc05983 0x24980807 0x773c4f99
- 0x3407b872 0x07c3657a 0xa2cd9e48 0x49c1e6a8
- 0xa881b84c 0xf804d72c 0xb5319d2a 0x3e39780f
- 0x97518822 0x0acd54c2 0x0721a9ff 0x10e1d2fd
- 0xa7b6db77 0x845b1a56 0xef00160e 0x6b41bfd5
- 0xc994df0d 0xcf44a5ca 0x794b36a4 0xf9fdb127
- 0x922a1366 0x822aa8a9 0x4b137bd5 0x5722a49f
- 0x8933719a 0x17edc1a9 0x079d9538 0x21fae7d5
- 0xe534fd73 0x9d3038d5 0x48c3a056 0x5b22d58a
- 0x6f142866 0xf1d767cd 0xb51ad5a6 0x34a0ef85
- 0x0111703e 0xca4b3a30 0xa0f3c34d 0x9d48775a
- 0x3f2059f9 0xf2fe2c36 0x588861a9 0xed5bd9fe
- 0x8231f7cb 0x8c115969 0x3f82ba00 0x21b3730c
- 0xba757997 0x3ec0bb2c 0x16f11def 0x5d4356c6
- 0xdc2e0bc2 0x58c1eb6e 0x313ede0c 0xb68fcc52
- 0x84d3e1b5 0xcc6d9201 0x95046196 0x276b527b
- 0x80a4a729 0xe782916d 0x5cf09e0b 0x98aaf9fa
- 0x1de6dd43 0xab4f1962 0x49ece734 0x81455488
- 0xc2597b61 0x5b22af85 0x646f7b94 0x09213a1f
- 0x08edf7e4 0x963d343c 0x059ba888 0xb4e804ed
- 0xe7cc826c 0xf87bafc7 0xeecaec10 0x8e60919c
- 0xbf14c996 0xd3dcaee3 0xb8fa0b7e 0x81563c6e
- 0x7f59a258 0x2f344446 0x374d8aa6 0x9b6de5c9
- 0xbf992857 0xbc5b94fc 0x28adb080 0x17e41044
- 0xb87b469e 0xda504d12 0xf21bef8b 0xce75c1e3
- 0xdbd92c83 0x58bba0af 0x77b42977 0x506cfd75
- 0x1139e875 0x6ce5fe43 0xc6a5d7b3 0x87f9e628
- 0x7b5c500b 0x130066b3 0x789b611f 0xec8c1ba9
- 0xb7e6872d 0xaf828cd6 0xc28d3316 0x2a91f6d0
- 0xc725f063 0x065ac531 0x4f9ef4b8 0x2b9d927e
- 0xaf54f3f9 0x7c924f72 0xda1d77ad 0xff00db67
- 0xaf4f03c0 0xb4f4ee64 0x169e64e5 0x04653ac0
- 0xed51cb70 0xfeaff0e5 0x51dbf346 0x072a2407
- 0x23fb74f4 0x9a906eef 0x5d6fc3f0 0xbc3c374c
- 0x1cf9f063 0x919015d9 0x5b3e9d07 0xd6209d8b
- 0xa3710b3d 0x90ad23b8 0x420ceedc 0x58e8371f
- 0x5d419d1f 0xb8acd13f 0x7d100d6d 0x210c10d1
- 0xcd0a697e 0x5023db4b 0x33e6d8e7 0x44bbe6b4
- 0x827e859f 0x6ca4cc81 0x661bb2c3 0x71209ee8
- 0xb8c3ffaf 0xd1075f51 0xba1eae10 0x728b0a6a
- 0xe4af7a2f 0xca9bcf2e 0xb249a631 0xdce6be47
- 0x5c910321 0x425c3c27 0x33083e43 0xdea067ae
- 0xea594a23 0x41b75c2c 0x3a401a95 0xd33cd88a
- 0xc295cad0 0x67f48045 0x1dc9ad4c 0x4bc48864
- 0x53991b6e 0x7aadde5f 0x2b0bf775 0x06ba5380
- 0x9eb874be 0x2c4b967a 0x1bcc342f 0xe875001b
- 0x15b5642d 0x5be99c9d 0xcb210ace 0x1b4924ad
- 0x3793ed81 0x8b983114 0x3ec33981 0x75ec71e7
- 0x8b5b7df3 0x834756f4 0x100fad01 0x70037fdf
- 0x0cef9a36 0x3d9e3a2d 0x38b48efd 0xfc4034b6
- 0xa32e29dd 0x388944bc 0xc1c15614 0x3877e9c7
- 0xa5e733fa 0xa621bd53 0x4b651df6 0xce082970
- 0x85f30d6f 0x729a5c87 0x31dd7ba9 0xdb495828
- 0x7b12c698 0x953495c9 0x6b5f99e7 0x2cc42fa8
- 0x697ac512 0x1be679de 0xc116d305 0x94a36606
- 0x9e5e141e 0x874affed 0x58d40b0b 0x5e3cf5e5
- 0x5d05e9a9 0x06840efc 0xd2f98b21 0xa1e83ab2
- 0x4f726202 0xa6394535 0x62a02403 0x9f2167ec
- 0x4f9fc77b 0x98073be4 0x2bc781fa 0xfc8e4c89
- 0xc7179b97 0x692cf793 0x708ff7bb 0x12ecba93
- 0xacd06e21 0x202bef76 0x03852241 0xe84e02a1
- 0xf1f9ac8d 0xcee61aef 0x61a4f235 0xd22991eb
- 0x67a81345 0x375a15c6 0xe8fae8a3 0xb4ff2b37
- 0x339ee4ea 0x14ffadc3 0xf49340dd 0xf285e568
- 0x00fc6970 0x369c52d1 0x4f55368f 0x3f4d75f1
- 0x6a73b603 0x963c1f59 0x171e2bdc 0x72bac76b
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- 0xc6d447c2 0xe0694d4e 0x967febab 0xc13f631d
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- 0xcb93beca 0xe1c34035 0x34de740d 0xbb151baa
- 0x71f5942f 0x1eaac228 0x0c68331b 0x3d2a1dd0
- 0xe7a3d41a 0x7253acae 0xfd4de230 0x79988d80
- 0x4468f19b 0xac4440fd 0x6e8a6ef3 0x5736adf8
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- 0x1293ab28 0xc2ba53c2 0x729ff4cf 0x60218df8
- 0xc2870138 0x6127d844 0x89604e9e 0xd2b9ad4e
- 0x4f6ded9f 0xdd263849 0x1633bd92 0x64b03a24
- 0x96dabd4d 0x6e85d235 0x1ab69ad0 0x9aa80454
- 0x6b9041e0 0x106c7e9a 0x8f54812f 0xa274efe4
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- 0x6238fa4b 0x7d6cb06f 0x16d3b4a2 0xf3b04822
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- 0x9faba37b 0x209341ec 0x83c9061f 0x3387dfe8
- 0xc7f12ceb 0x2bef45d7 0x8f8acb47 0x35d9741b
- 0x7009f514 0xfd003802 0x6f9489c5 0xe2ea2504
- 0x910e996a 0xcc81d016 0x3280730d 0xdedfef59
- 0x5a7357cc 0x8fe8dd39 0x15543fe5 0x976c4207
- 0xe41cf62b 0x0ba6b4b5 0x5c3b7ced 0xa6c5b72b
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- 0x6ff0538a 0xe58ed1ac 0x81a311a5 0xefaa54b8
- 0xf04a797e 0xce6e69c7 0xdc810726 0x7bab7be3
- 0xdd5923e8 0x5a2413ed 0x31cef794 0x73dfd806
- 0x1b9223c1 0x0c370882 0x04fa3b68 0x87c50bc1
- 0x1d78c90f 0xf4e2cee6 0xebea941b 0x73e5838f
- 0xca8d39a6 0xe004296b 0x28cf8a0e 0x7c73e7ef
- 0x26a296c2 0x789d4c72 0xd1490265 0xd9a9e843
- 0xf03504c3 0xfae6dffb 0x7a48f00d 0x51e369c8
- 0xcb3eeee6 0x0625e936 0xe93d0d7d 0xfb15ba6b
- 0xec5c76da 0x8fdf44f1 0xa036653a 0x5730c4a3
- 0xe5bfe6dd 0x0b8c091f 0x3b51558c 0x403748f4
- 0xf4007f86 0x952b5db6 0x5524d8ba 0x8046409a
- 0xe3fc61a9 0x66f4ea56 0x5645150b 0xdb2bec15
- 0x50672218 0x7f40e87d 0x2b8359f8 0x438787dc
- 0x7f221597 0xf8b1590c 0x4f468251 0xff586d05
- 0xb9195380 0x0ee09e0b 0x2fa7dbd9 0xd197b327
- 0xa0dbad58 0xb485681f 0x5ef0937c 0x1e07ebb6
- 0xcb49fe3f 0xc2427cd9 0x6c2c5298 0x4a2e171a
- 0xa7f333a8 0xb3609ad6 0x94e374d6 0x0e1eb64d
- 0x22c3367d 0xcdf89975 0x647aceef 0x16727c9c
- 0xf476ae53 0x35a1212e 0x0db768b8 0xfff8b53d
- 0xbd4fe45e 0xab28a5a3 0x59cec0af 0x28bcd1ef
- 0x6f43ad69 0x2658a059 0x27aee0ec 0x4e8bbd15
- 0xa9fdcf04 0xc9aa329f 0x687f010f 0x5c968a07
- 0xb894e607 0x0e1cba22 0x2f00f203 0xe8e133ac
- 0x494a4746 0xe8bdff9a 0xf69791a2 0x64179ce2
- 0xbfd10dc6 0xc026f6d8 0x4871923a 0x8946b277
- 0x609f49a4 0x6466df1b 0xd8c3c131 0x46ef0291
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- 0xb8436b48 0x1b1c2391 0x1fda3395 0xa6cecbcb
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- 0x03ed670a 0x5f98be62 0xf27b7e2e 0x598cf22c
- 0x2e855591 0x879815fb 0x153799c6 0x3820faf6
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- 0x47894c03 0xe43661fe 0x7a6ee548 0xa5ca9779
- 0x6aa9e105 0xbc8505a3 0xa03b860a 0x448faeb9
- 0x367de4a9 0xc9779c7d 0x6535ad8c 0x4b7fcacc
- 0xb2db5c10 0x0ab41ec6 0xe528ab90 0x5e6f03da
- 0x98bc76d3 0xf38df42e 0xea59b039 0x1c2eaa28
- 0xca30dac5 0xdb0eb8c6 0x60063860 0x18823f8d
- 0x164e2f28 0x7cbbe080 0x70a12315 0xb08f44d9
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- 0xa9e973ae 0x624b73e7 0x4ef961db 0x95ede155
- 0xf2bb86ff 0x96bc79d9 0x95cd646b 0x1c3af453
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- 0x34cee6f0 0x990980db 0x18d8ace5 0xd4c87504
- 0x29515d32 0x2e5d9c04 0x87dffa60 0x12e815d1
- 0x021db8e9 0x2c5a42fd 0x6e3a1a13 0x88889ab5
- 0x3bc915a6 0x608919c5 0xd310a970 0xea8f3218
- 0x949f55bc 0x9ed7aadd 0x6d990157 0x181f1c2f
- 0xa940df64 0xf3be8c39 0x7ca2e699 0x7b4f07f9
- 0x89e83fee 0xe66b9493 0x54fc3d17 0xa63d2d46
- 0xd5e835d5 0x910e0144 0xecf67025 0x1fa6a93a
- 0xe692dbca 0x466af681 0xc2bc808c 0xbb4ebd60
- 0x74d5c729 0xa283ad25 0x1e66fa23 0x6d372988
- 0x753c9fcb 0x1742efdb 0x5b68cf15 0x372a0e33
- 0xaa3a7ebd 0xa0e944d5 0x95d5cbb4 0x4fb6020b
- 0xced927b0 0xb2afea78 0xd0646b72 0x1622fad4
- 0x4672c6b6 0x736ae4f8 0x8d46a4db 0x0e6a432e
- 0xe0a30a98 0x4c2bcf4f 0xd87acedd 0x19682d7a
- 0xf97c025c 0x55d8feb3 0xbcd4d2ff 0x236c6f9f
- 0x8ba0246d 0x42812f73 0x327636f5 0xc92cd30a
- 0x08a69d9d 0xc735a946 0x82eca01f 0xda0753a0
- 0x7077b1d1 0x17b05834 0xfa24bc02 0xf49f4473
- 0x8f9ac6b4 0xa880c630 0xf7457b4d 0xd5f829e4
- 0x25c49a99 0x1176a997 0xbb2d2009 0x61d35764
- 0xa322c752 0x6ef3ae02 0x5faae6f8 0x9a52acf1
- 0x19176f43 0x43843b07 0x14efc471 0xee474403
- 0x319c4857 0xa19adcf0 0xc0a466e1 0x02db14ad
- 0xb7f211f3 0x72aa6ca6 0x0eb9bffe 0x48a6d284
- 0x9a93a2ee 0xac09fc5f 0x92a62c4f 0xd34f0271
- 0xffb348c7 0xf229b6e2 0xc68ec1ca 0x19577dbc
- 0x069a10bf 0xf64ac347 0xf7c3c848 0x81975294
- 0x6376e550 0x93b53440 0x8bb17daa 0xc4c64c07
- 0xcaeff293 0xd51497b0 0x33da3565 0xa73d5def
- 0x4bf4dcde 0xfb470fcd 0xca7db864 0x7ef17022
- 0x47567363 0xd8fb8d74 0xa68c3c72 0x8202e4f3
- 0x75bf1798 0x16a70fd2 0xcc3b697f 0xab9a1075
- 0x13f56ef3 0x269d0302 0xcb655a43 0xc9a4de88
- 0xfb8363de 0xff40f36d 0xd2555489 0x647a7995
- 0xfd8eda6e 0xa3958c9a 0x20e029b4 0xbed3e225
- 0xa7df5f17 0x63bc3c1a 0x337ecc9d 0x6c329508
- 0x786aa47e 0x1db5b093 0xc0acd73b 0xf9587237
- 0x243e5d40 0xd3623c3a 0x338c4740 0xb672140e
- 0x43640a9b 0xb7ef3f6a 0x44151074 0x749bcc46
- 0xfa1f103b 0x0fefb19e 0x58855538 0x138ad276
- 0x2641fd80 0x297d99d0 0xfaa63ba2 0x00b6f11a
- 0x3793fb6b 0x124763a1 0x8b9419ac 0x56abf9eb
- 0xdbf83419 0x43570571 0x37299cd8 0x8b201e62
- 0xa4058fa5 0xb320e91b 0xbe7d40b7 0x4eca3b2d
- 0x8519c155 0xf4b17021 0x9e4c572a 0xdc1f9e16
- 0x39a589a3 0xa6cfc7a8 0x5b986910 0x64e150e7
- 0x60b6f2c1 0x02bacd3f 0x2f3b5a5c 0xc6f453a8
- 0x15a87a7e 0x76104a14 0xafa2ef63 0x2cd48dbe
- 0x3c7abddc 0xd786ea5a 0x4f65867a 0x355cda38
- 0x2ae03d9e 0x4f11f6be 0xfc0a0034 0xde4ea602
- 0x21ff83ea 0x0f12d913 0xedf4da28 0xc96d8fd1
- 0xd7e82c3c 0xfec63bdc 0x37a456d7 0x3007e18c
- 0x091a47b6 0x82f1c641 0x82219cce 0x3e7e6993
- 0x7b3a2115 0x0b8e1a02 0x40f88213 0xfa2f9c21
- >;
diff --git a/arch/x86/dts/m12306a9_00000017.dtsi b/arch/x86/dts/m12306a9_00000017.dtsi
deleted file mode 100644
index 299d663..0000000
--- a/arch/x86/dts/m12306a9_00000017.dtsi
+++ /dev/null
@@ -1,750 +0,0 @@
-/*
- * Copyright (c) <1995-2013>, Intel Corporation.
- * All rights reserved.
- *
- * Redistribution. Redistribution and use in binary form, without modification, are
- * permitted provided that the following conditions are met:
- * .Redistributions must reproduce the above copyright notice and the following
- * disclaimer in the documentation and/or other materials provided with the
- * distribution.
- * Neither the name of Intel Corporation nor the names of its suppliers may be used
- * to endorse or promote products derived from this software without specific prior
- * written permission.
- * .No reverse engineering, decompilation, or disassembly of this software is
- * permitted.
- * ."Binary form" includes any format commonly used for electronic conveyance
- * which is a reversible, bit-exact translation of binary representation to ASCII or
- * ISO text, for example, "uuencode."
- *
- * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
- * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
- * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *---
- * This is a device tree fragment. Use #include to add these properties to a
- * node.
- */
-
-compatible = "intel,microcode";
-intel,header-version = <1>;
-intel,update-revision = <0x17>;
-intel,date-code = <0x01092013>;
-intel,processor-signature = <0x000306a9>;
-intel,checksum = <0x3546450b>;
-intel,loader-revision = <1>;
-intel,processor-flags = <0x12>;
-
-/* The 48-byte public header is omitted. */
-data = <
- 0x00000000 0x000000a1 0x00020001 0x00000017
- 0x00000000 0x00000000 0x20130107 0x00000a61
- 0x00000001 0x000306a9 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000000 0x00000000
- 0x86c5b0d4 0xf6978804 0x7f4f5870 0x6319dc3c
- 0xbb3b7d61 0x33cf9075 0xe8424658 0xf611a357
- 0x5a3401db 0x42caecce 0xb4d8e75e 0xe6dbaf24
- 0x7861b35f 0x6bd717bc 0x23b9b731 0x82ec1ac8
- 0x20337b64 0x5396dbf1 0x59973bff 0x724bc7e9
- 0x5237193b 0x0b8647c1 0x6a0d0e16 0xbf9ddb5b
- 0xace2cc1c 0xad707638 0x056f102f 0xa37e60f8
- 0x76255642 0xfb86e030 0xb8069a40 0x367795f1
- 0x653fb05e 0xab7f14ad 0xb6e8a8e1 0xd2598d20
- 0x2eba3f68 0x78b372f1 0xba8d13f8 0x1f1de861
- 0x97f951d5 0x8097c728 0x27dbf904 0xb97906a8
- 0xffe7a4ac 0x4b947668 0xc1dbd726 0x2adcf777
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- 0x08870945 0x10c869de 0x19849613 0xdb35d3ed
- 0xd68ebd6e 0x1056fd48 0xf1a0e305 0xe3982ebd
- 0x6f7cc391 0x5956374a 0xf414a5a2 0x325119ab
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- 0xa2c77051 0x68f199e5 0xd36a9714 0x878f847b
- 0xec0394ae 0x86d0584b 0xf4df66b9 0x451cd039
- 0xf4de06ae 0x35dd0554 0x818a342f 0xeefdbfc9
- 0x5b4e9edd 0x22d9313a 0x3b710d60 0x6deaeb4c
- 0xa9e26512 0x98d31867 0x3c2c2d61 0x7eb5ce41
- 0x40890db6 0x7a3aa660 0x3ef4f306 0x7322881f
- 0x49dac4d5 0x96efe685 0x27bb7f49 0xbb955283
- 0x79c5f2b7 0xff599c28 0x28ee7f5e 0x9f324b73
- 0x45edb7cf 0x39a8b79c 0xd0919c6e 0xe149b29d
- 0x62f5f82e 0xebcfa23e 0xd4d68937 0x54270090
- 0x958af0d4 0xa1e4e799 0xaf68ac19 0x82a84f4e
- 0x50f67b84 0xd5e59629 0xf5fdf24c 0xab1d63c5
- 0x30835807 0x431fce5f 0xe5f96f4d 0x3f6b4802
- 0x14010be8 0xdca45ae5 0xc82709af 0xff76ce2c
- 0x8b222c22 0x73a2d948 0xa8d59cea 0x8c31849e
- 0x469c2e5f 0x3777ee84 0x5fdfa5da 0x02ef9bb2
- 0x792d3194 0xbed63f21 0x0b6dc5f1 0xc9d7fe08
- 0x6df7883d 0x366566cf 0xef772769 0x37826465
- 0x1cdc3086 0xa69ff7b6 0x235012ea 0x292f7e75
- 0x30bdd0fd 0xffdc9df1 0x95c6d570 0xec206204
- 0xc6cd42cb 0xc0d6dfd9 0xb7a16b71 0x17fa527e
- 0x295f2c79 0x990f9820 0x8b8f447d 0x193f9ad1
- 0xebddb2af 0x5dd532eb 0xf1bbd8e8 0x3444a3f4
- 0x18ccce93 0x05edeb4f 0xc4a6b935 0xba37aab0
- 0x96076ba4 0x250dc2f7 0xc4093548 0x030e777d
- 0x7ea40933 0x8da7b1dd 0x59c0b79f 0x807d437c
- 0xf5233ddf 0x54c1983f 0xfc18771b 0xe74b85f0
- 0xdbd725b5 0x70cdd153 0x4ffe300c 0xfda4bdae
- 0xf4ac75d2 0x91c4e15a 0x34d92b97 0x16356a79
- >;
diff --git a/arch/x86/dts/microcode/m0220661105_cv.dtsi b/arch/x86/dts/microcode/m0220661105_cv.dtsi
new file mode 100644
index 0000000..ada8bfc
--- /dev/null
+++ b/arch/x86/dts/microcode/m0220661105_cv.dtsi
@@ -0,0 +1,368 @@
+/*
+ * Copyright (c) <1995-2014>, Intel Corporation.
+ * All rights reserved.
+ * Redistribution. Redistribution and use in binary form, without modification, are
+ * permitted provided that the following conditions are met:
+ * .Redistributions must reproduce the above copyright notice and the following
+ * disclaimer in the documentation and/or other materials provided with the
+ * distribution.
+ * .Neither the name of Intel Corporation nor the names of its suppliers may be used
+ * to endorse or promote products derived from this software without specific prior
+ * written permission.
+ * .No reverse engineering, decompilation, or disassembly of this software is
+ * permitted.
+ * ."Binary form" includes any format commonly used for electronic conveyance
+ * which is a reversible, bit-exact translation of binary representation to ASCII or
+ * ISO text, for example, "uuencode."
+ * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ *
+ * Date: Sat Sep 13 22:51:38 CST 2014
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <1>;
+intel,update-revision = <0x105>;
+intel,date-code = <0x7182011>;
+intel,processor-signature = <0x20661>;
+intel,checksum = <0x52558795>;
+intel,loader-revision = <1>;
+intel,processor-flags = <0x2>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <
+ 0x01000000 0x05010000 0x11201807 0x61060200
+ 0x95875552 0x01000000 0x02000000 0xd0130000
+ 0x00140000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xa1000000 0x01000200 0x05010000
+ 0x19000000 0x00010500 0x15071120 0x01040000
+ 0x01000000 0x61060200 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x9557a557 0x7d7a0fe3 0x8e2fbe53 0x0db9e346
+ 0xd35c00d6 0x21bb34b7 0x662b6406 0xa0425035
+ 0x3d028208 0xcb843695 0xee06be0a 0x9817efa7
+ 0xb86c0d16 0x45f70c93 0x79fdc3af 0xd5f30da7
+ 0x460f62b0 0x238a0470 0xf0ec95bf 0x97b9c176
+ 0x6d612851 0x69b9b4b6 0x1df769cc 0xe11674df
+ 0x1b579adf 0xc8bcc050 0xcdb3e285 0x327592c1
+ 0xbeb6047a 0x977f6be5 0xc4854052 0x27f38b66
+ 0x4ca5eab3 0xf806decc 0x2be4b409 0x460a3b03
+ 0xde2f6e0f 0x53ce08b3 0x3ef0ef93 0x4e013088
+ 0x226f8a5c 0x57f7d291 0x8d640bf7 0x8a998907
+ 0x40464dd8 0x804ef3e5 0x647e35f3 0xeabee2d1
+ 0x3a5ce9c7 0x4d7ee530 0x564321ec 0x9e85107e
+ 0xd595581d 0xcbf6efde 0xed3010ed 0x3d607e82
+ 0xe32d4b6b 0xd06fec83 0xf39240a6 0xe487988d
+ 0xddbefcbe 0xefaf1121 0x96bf9acb 0xacce795c
+ 0x7fa5f89b 0xbe440e5d 0xb6d3a3dc 0xcad17290
+ 0x503ae748 0x04c80b8d 0xd394ea6a 0x3e4072c3
+ 0x11000000 0x0b0ae65d 0xc6c53cbd 0xd52a6c2d
+ 0x84cc192f 0x89498e7d 0x89270686 0xe68105e0
+ 0x4073a570 0xd3338d8e 0x51193152 0x7266182f
+ 0x980553fa 0x51b89c90 0xd13b6151 0xe6e40a91
+ 0x0ab997d8 0x2d0a443b 0x9d3d566d 0x820402d1
+ 0xdbe79fcc 0x7c5e0b45 0xaf94216d 0xbf717950
+ 0x520b3dd4 0x566a3396 0x0b6f794f 0xc5dfeda5
+ 0x71ba0f02 0x4839a5ed 0x39a4e4a6 0xe567c652
+ 0x0e044997 0x84a0effd 0x09c67178 0x89a815c8
+ 0xac821555 0xd6719303 0x582b964e 0xfe3a53f6
+ 0x241b9b8b 0xc6e65457 0x623a4e0a 0x590d7d03
+ 0xe50e7ce1 0x4bca4700 0xf24f5eff 0x1f1b20d9
+ 0x77e3227e 0x699b5e5d 0x9aa5f621 0xff08bba0
+ 0xf17ce716 0x0f5336f5 0xbce055a7 0x8cea9dac
+ 0x8e09d26c 0x66c3ddf0 0xbec71660 0x75248cd2
+ 0x29afcf8d 0xa5ade5ce 0xf68bace5 0x63b513cd
+ 0x4736a842 0x4dbf80df 0x4e85fbdf 0x4dce3d56
+ 0xf2150fdc 0xc4232709 0xffdc3e3a 0x92b72a3d
+ 0x9ffce715 0x682959d1 0x091ba33c 0x0f1dc729
+ 0x2f29a924 0x1df72429 0x19b0365d 0x2d5a3cd8
+ 0x20617351 0x109074f9 0xf232874a 0x40d79569
+ 0x97dbe4c6 0xa3b66845 0xa04d2faa 0x6dce9a96
+ 0xd4963c67 0xd4516f76 0x64a0b04d 0x0b87ddfe
+ 0xd8a5305d 0x717ecf67 0x77189035 0x40542ed4
+ 0x5a180ff1 0xb2042e2c 0x6639819b 0x0f0756c3
+ 0xf939bd70 0x25efe0d6 0x3eb65ae9 0x39a057d2
+ 0xb2595655 0xf808b4fd 0xe22d0593 0x76256500
+ 0x0eeee6ee 0x6895d1cf 0x9fc117a7 0xd19e5f15
+ 0xf677f085 0x1ecdb30d 0x704d0975 0x9099f42e
+ 0x421be0b2 0xd02548bd 0x3a16e675 0x7d8b051d
+ 0x9d24480f 0xbc006432 0x184da9ec 0xbad7abef
+ 0x299f58aa 0xc1a249fa 0x8d9d31f3 0xe73cda17
+ 0xf41ac993 0x7b88d3bb 0xf349c676 0xb8341361
+ 0x1b69bc01 0x98e0bfd2 0xf31db8d9 0xeb49b275
+ 0xabc40133 0xfb7d0701 0xcd5ff353 0x4eaceb8d
+ 0x67aac555 0x6d81693b 0xe81c555d 0x5d7f3688
+ 0xd4347083 0xcd861b1d 0xd332f2cb 0x43130028
+ 0x7f1a1c51 0xe2ce3af2 0xdff5076e 0x6ef21237
+ 0xf65fc8c4 0xbd28ff14 0xd70f49a3 0x4f559249
+ 0xd6fe7530 0x1fe89b4a 0xc1cc8975 0x2fd705c5
+ 0xf2993d77 0x60f2e3da 0xe3ca3c44 0xbd0f70b1
+ 0x0d333d10 0xa29a6aa1 0x43b5a6d4 0x30d15a08
+ 0x6df9564a 0xea09045d 0x54ca3f5a 0xfbcfa037
+ 0x6dd64d1b 0xa4a8995c 0x1f4298f0 0x3f4d9a86
+ 0x924ee146 0xc2e3f464 0xc247747f 0x8bf5c7d7
+ 0xf8f0b05d 0xf65a115f 0x4b1ae4e5 0xe131e187
+ 0xfaf713c1 0x5ff88660 0xcd4916b0 0x448028e0
+ 0x140711ca 0xffe77575 0x8b7740bd 0x82b6ed95
+ 0xd94d9647 0x2623c011 0xd54fba11 0x30a7050b
+ 0x28fe4069 0x70b8bf7d 0xf786eb6d 0xe39db734
+ 0xa3290669 0x8747e1d6 0x35804a42 0x1c26ed60
+ 0x30a8880f 0x8170a277 0xa1d97657 0x6ebcb3ed
+ 0x3bb6ce89 0xff808c1b 0xc919fd1e 0x911d8b14
+ 0xcbf41a24 0x82abc738 0xfb5e988e 0x328aa123
+ 0xf19146e3 0x587baa80 0xd105e811 0x83b09389
+ 0xa29fc554 0xe3831a28 0x183f8de7 0x4ef5656e
+ 0xcc940baf 0x938bf4b4 0x90627bae 0x14fc3cdb
+ 0x75e45681 0xf912c1b3 0x7a5b8a0f 0x3b970524
+ 0x6a74d34a 0xb3da9fe6 0x847a3bd8 0xfc4f7dd6
+ 0x88fd7f3b 0xbcd74a15 0x3afed836 0x17e31cd0
+ 0x5d866dcb 0x0ab69608 0xe334f0fb 0x7181d4a3
+ 0x8dc87560 0xd9c94d6f 0x491c2c91 0xca295ed6
+ 0xfb8dcd79 0xeb4d3f89 0xec581071 0x0457ebc6
+ 0x6b63590b 0x9dde4b79 0x3dc0a0aa 0x41ec8a1e
+ 0xfb2ab80e 0x07adc629 0xb8534a4f 0xd0d23901
+ 0xcfd024da 0x47c4163a 0xc89d26bb 0xe5cac48c
+ 0x17c7fbba 0xd992f42e 0x466f5e35 0xce48304e
+ 0x394683c8 0xef6e6b7a 0xb9d1242d 0xb961debd
+ 0x432a3dff 0xa4931ea7 0xd9f03907 0xc29e9ce6
+ 0x4fccf4c9 0xbf234555 0x0b6a6771 0xb29f29ef
+ 0x7edc4bfd 0x781dcf74 0x4ae31020 0x1ab72d9b
+ 0x0ac457e2 0xf9291e09 0xd4084918 0xa540d999
+ 0x223408d3 0x0bd039aa 0xaf0dd904 0x9cfd6a01
+ 0x826c6bca 0x8e41a96d 0xa56fc4ee 0x6a7509fb
+ 0x5cd2e6fc 0xb89aa158 0xb1e5d3f5 0x92ccd05e
+ 0x995d5acb 0x5ed1dc08 0x75038dac 0x4377c835
+ 0x265d66d8 0x3692096f 0xcd69ee59 0x310df351
+ 0x087e3133 0xe89e2d58 0x137fd054 0x00f3562b
+ 0x2ae304e5 0x9db0316d 0x6868cec6 0xb249ccec
+ 0x9f602c90 0xd3715e7c 0x3fcc8a62 0xa1c1e065
+ 0x5b4281d4 0x124dfd7e 0xe9d21462 0x77cbc940
+ 0xf915f2a5 0x66df82fc 0xa8c67c56 0xac4d461b
+ 0x836deb52 0x95fbb48d 0x3454b6bd 0xd87d7a64
+ 0xe64d32b8 0xc44c2aa0 0x3e213c1f 0x4d31b94d
+ 0x4640be5e 0xe127234b 0x9ca54856 0xac7d093f
+ 0x03d0508b 0x30f5121d 0x6e347d91 0x47772312
+ 0x318ea26e 0xad3f6902 0xb5598746 0x8be3b65b
+ 0xc8bbd31d 0x24691564 0xee77d2e8 0x3581944e
+ 0xeff8eed5 0xa29ea86c 0xc2597492 0x23c1c118
+ 0x7810c079 0xb966ee47 0x823e9954 0x9e558c0a
+ 0x74759c12 0x193c6b4e 0x7544597d 0x65c9bf8a
+ 0x68f5e263 0x718c679b 0xc8dc50ba 0x5f5ab841
+ 0xc3eaf579 0xc2072358 0x62481939 0xffe7e686
+ 0x201f3215 0x1d88dc8e 0x28fb4002 0x40c56ec5
+ 0xb7bcce00 0xd52f5042 0x84498e04 0xcc97fb7d
+ 0x64035e93 0xcd3478a4 0x15d63309 0xa9e47b85
+ 0xe835e45f 0x9de598b7 0x94f569f7 0x56689b0c
+ 0x381f9173 0x708b3e52 0xc81f0649 0x12113041
+ 0x4694aae2 0x69040fc0 0xe4ba7bf4 0xfadc5729
+ 0xc168381f 0x1985f118 0xab0ca720 0xf0150799
+ 0x42690e4a 0x71af3be9 0x9325f3b8 0x36575996
+ 0x4dc1dca7 0x7e534c37 0x01830a21 0x221eef4f
+ 0x18698322 0x57a80837 0x483ae2d8 0xef905b54
+ 0xe01827de 0xae9a8ff1 0x0058be7b 0x052632ad
+ 0x9df5c90b 0xb763fc7a 0x5535c95c 0x8eb5916a
+ 0x75fde5cc 0x57d8eeab 0x0dcc35c6 0xbf11c88f
+ 0x69142118 0x4f35c928 0x7966066c 0xb2d13b4b
+ 0xdad06d34 0xb5d8f5c7 0xe0bb11e6 0x8a36325d
+ 0xc1122d64 0xcf07a1a5 0xfe7ce9b1 0x176b624b
+ 0x4de883fd 0x00a9024b 0x3d3f7271 0x5072895d
+ 0x2634e158 0x2f3c9a35 0x95e374d1 0x65e66528
+ 0x47766433 0x4cb805ff 0xbc8f0319 0x6d5055a5
+ 0x4932e8c2 0xa93fbb4d 0x87f08bd9 0xf5e5706e
+ 0x409af40e 0x017edf5c 0xc5394c71 0x6fb97b6d
+ 0x7b5ddb6b 0x0256adfe 0x76d337e2 0xa3327113
+ 0xfbb4cb29 0xea68ca27 0xa76a865e 0x8cdb2dd3
+ 0x902642bd 0x16772269 0xb2341eaf 0x858fa943
+ 0xb087fac9 0xd17de85b 0x3d9c248a 0x0bdcf2d0
+ 0x874fc03c 0xf19f2591 0x190c06a9 0xc6b5c3ea
+ 0x472b6245 0xdb9f8201 0x46d27a0d 0x52218ffe
+ 0xece78c44 0x3ef6e38a 0xfcf19b65 0x536c840c
+ 0x86d363e8 0xaa852826 0xde17e3ec 0xa9c3b45b
+ 0xd322302a 0x48f03728 0x2f60d01a 0x3b356752
+ 0x8a869fd4 0x055d04f4 0x765074fb 0xb0b5c2d1
+ 0x865ad360 0x0cb6c6e8 0x5de9cf99 0x863938d3
+ 0xd4d9aeea 0x0babfa86 0x172cfb57 0x972d8f4f
+ 0xe9aeeb95 0x6acbe297 0xf2459e42 0x415fdd12
+ 0x84b2e67b 0x47d2d466 0x44bc85a4 0x1a55b957
+ 0xe4d01142 0xbf4ea387 0x5651e1a2 0x19124703
+ 0x8aaed1b2 0x841f3ecd 0xc6d6cc4f 0x1f2d8565
+ 0xba08e74a 0x68e5ecf4 0x07af5ef4 0xdd5a43a9
+ 0x6086c705 0x37ced045 0x0fb05ca6 0x35f39f3b
+ 0xda1ecbef 0x1daf6d76 0x5481d7ed 0xc51e8385
+ 0xa705e11e 0x127d2a7f 0x654d4710 0x1a34370e
+ 0xf8496ea4 0x4392b6ec 0x2f209933 0x9c5ab017
+ 0xa4f7b837 0x33e0a7d0 0x98fb0635 0xdefc042a
+ 0xc7a1f6b5 0x47107766 0xd06acfba 0xb8ac2a93
+ 0xe21cca44 0xf0150492 0xd4de2e01 0xe0d6e9a5
+ 0xa758b5df 0x2e1c31c0 0xc4794495 0x3d9cc157
+ 0xf94aa4f7 0xc2325855 0xcf9ddd12 0xaa70e611
+ 0x2b2404b8 0x75d87f38 0xa2a6f772 0x61abfa04
+ 0x23b61fb0 0x87f4067f 0x355abf99 0x2c4e6c48
+ 0x2dc8a3b2 0x119b08b5 0x3f1f6d09 0x374372f0
+ 0x24d79d32 0xef2b58be 0x461ab91c 0x1d31267e
+ 0x8b1b2c7e 0x27a4f103 0x1686c7c3 0x55af0d87
+ 0x61c2503b 0x9ffcca7f 0xc3cbdd07 0xd49a4f3c
+ 0x9ddc2ac9 0x335e1b2a 0xd8dcfc08 0x6e83f11c
+ 0x53de9e30 0x7b774670 0x15a97571 0x1ecacf66
+ 0x26581520 0xeee3496b 0x1fdf8174 0x4ddd3c61
+ 0xaa504fc2 0x0b09792e 0x9b81d1c7 0x10765c95
+ 0xd3e7b9d1 0xefdb38f9 0x4c44d38e 0xaaf8fd08
+ 0xceb22e7c 0x5ac74242 0x6baee02d 0x5c7eaa5b
+ 0x27265dca 0x614c3b5e 0x2994874d 0x486d48a3
+ 0x5945c4f9 0xe465f343 0x934e55de 0x633199a2
+ 0x147222cc 0x9bbb0c16 0x6a7e7ef1 0xb7bce9b5
+ 0x13413d18 0x628231af 0x0fd2d58c 0x4cbafba0
+ 0xa930fae6 0x91733823 0xe06f99c3 0xda3b57b7
+ 0x04b8a9dd 0x53451e33 0x11fde5fd 0x0e35bcb8
+ 0x3a5799d4 0x3893f9c0 0x6b9d0e1d 0xf8d948ce
+ 0xa33a6628 0x7d09792d 0xd74b3719 0x0afb4de0
+ 0xfaa5a685 0xecf7f8ac 0xcf34b855 0x89453b4d
+ 0x12f028c3 0x45edc3fd 0x792c43fc 0x2b054962
+ 0xb8799a92 0x0ab38d61 0xa6c6a76d 0x7670cdbd
+ 0xf878b511 0x9a3474ba 0x478673f0 0x7398bba8
+ 0x4fa10ff5 0xf0a1931c 0xd5938e03 0xe9a23c28
+ 0x7bea2a5b 0xf7a8db22 0xb94ae0e3 0x2abe6385
+ 0x0ef2cc36 0x6b997544 0x1e8cc4f1 0x69a5b182
+ 0x54f9b7c7 0x8fe56cba 0xc7c12fcc 0x8d689865
+ 0x2d6ef011 0xc6a1b740 0x66af0a76 0x76018cdd
+ 0x30661377 0xcf1fcf93 0x08046423 0xdf9371c8
+ 0x1795ec3e 0xf5ea09c6 0xe462de69 0xd7da78a1
+ 0xd8bda1eb 0x1179f53a 0x2b394767 0x3ba153a7
+ 0xf9c85bd7 0x5700c827 0x8478ac99 0x080a2f52
+ 0xdd1c18f1 0x579cea67 0x345c56ce 0x4563f16a
+ 0xfa1a5b74 0x0b6e233e 0xadc7bd9a 0xbee6d2f0
+ 0xa249f3ef 0xcdea9b77 0xeaaed82e 0xcc4448a7
+ 0x34f7cafb 0x7621bb44 0x4965b0eb 0xe6d6b8bf
+ 0x3c683b25 0x33bcb5fe 0x3f376249 0x5b40dc67
+ 0x658bf6aa 0x7f0c5d0d 0x61514591 0xeb3bb83f
+ 0xc2e208dd 0xe82f08f2 0x6ef75ae5 0x9c11bc0d
+ 0x289c0553 0x1578ce5d 0xb7f05c0e 0x818c5ebd
+ 0xe566ec9b 0xc6995b3f 0x0c02aac3 0x2b4264b3
+ 0xf9cad304 0x5b0479fb 0xf8ce8d6f 0xb7d80d8b
+ 0x41a0d223 0x71ec8a7a 0xc9d74d41 0x245c5988
+ 0xf607fc59 0xf1c7b6ab 0x142ef712 0xbf607800
+ 0x281e5911 0xad9a3e63 0x87b59384 0x7ebdc04c
+ 0x6f47867b 0xb6a304ac 0x289f65e7 0x335fc866
+ 0x77eb11b3 0xb70c25b2 0x70b43d52 0x684d46c0
+ 0x0940459b 0xde739ede 0x0b438a29 0xb713e77e
+ 0x71f539b7 0x8b2f0f7b 0x8d8ab95d 0x42cde8c9
+ 0x08c259d1 0x021eda69 0x2af81ddc 0xc7d13028
+ 0x05abfa20 0x6a61008b 0xfc62557f 0xd6d731b2
+ 0xb080aca3 0x6acae4a3 0xab33d2bc 0x7983c177
+ 0xdf0c357d 0xb8dcb956 0x9c214460 0xfeb75d75
+ 0x9b3d468b 0xd2c3106c 0xb1bd118e 0xf26df6a8
+ 0x11b9c4d2 0x031357f9 0xf7af8a12 0x70fef26c
+ 0xe5d8b8d5 0xf6746fd8 0xd6cc3266 0x4158e59f
+ 0xa38fbfcb 0x01c61ff6 0x44c7c4e6 0xf26db3aa
+ 0x46bb6d84 0x0a794535 0x1d5eab72 0x42345de7
+ 0x0c7e6d47 0x8bacc223 0xb7334b8d 0x3d9d951b
+ 0x18f4afc4 0x9c0cb708 0x53b71b82 0x603e8350
+ 0x6f2df978 0x0c6f3f0f 0x661ebca9 0x30788bd0
+ 0x982959c0 0x50aa1351 0x672297c1 0xa490a756
+ 0x21c9e911 0x977e172e 0x0446db50 0x49b711c1
+ 0xbc6d54c7 0x0fe0adb4 0xc4ec0fe4 0xae6d09b6
+ 0x316cfa53 0xba68cc8b 0x104bdbe9 0xc31639a3
+ 0x812a97fb 0xa1c6884b 0xc884d473 0xe3057c15
+ 0x5ee879a3 0x5abe8262 0xb906bbde 0xfd98fcbd
+ 0x6ae15c96 0x44a17e0e 0x28acfa15 0xb345122c
+ 0x6ddc4244 0x005eb369 0x22d038bc 0x0d226e4f
+ 0x64c7ed6c 0x7964b8d9 0xbc5d668d 0x99155e56
+ 0x9979151c 0x65312a00 0x0271d338 0x64867293
+ 0xed0d26fb 0xe69c5f02 0x93fd6871 0xf5702656
+ 0x4fad1c2b 0x20f8c272 0x438b964a 0x87ff3fa2
+ 0x6706537a 0x437b5709 0x6fb797dd 0x85679fab
+ 0x00da6b51 0xeecc5540 0x2998791c 0xc36d40ef
+ 0xb545e334 0x9ace5e06 0x8a9e6c54 0xc341d0cd
+ 0x1478a2d4 0xb81413bd 0x80601f72 0xa1b250b9
+ 0x1cb7f5ce 0xefad630c 0x32325fcc 0x29e3474d
+ 0x6a7ae043 0x879ee630 0xdc1e8a55 0x7ae794a8
+ 0x4ee38039 0x2ff4947a 0x53bb84b1 0x8f0b077d
+ 0xaa4c543b 0x9aa88443 0xeb31a017 0xf3485983
+ 0xe53b855c 0x6e17aec6 0x726458a6 0x5acf4345
+ 0xa1b95c5a 0x30668c67 0x47fb5dc7 0x8aafbff4
+ 0x4b94ef01 0x07bd6231 0x544afcf3 0xfdffca2f
+ 0xce847471 0xe90abc6e 0xf05e3cc1 0xf602a9c8
+ 0x8f104b51 0x1ae3da07 0xd07dfc04 0x561d9373
+ 0x6f6cc833 0xac982489 0x3c0f8afd 0xfab974d0
+ 0x397e135e 0x8edb3eb4 0x452b9509 0x3972829d
+ 0x639e3981 0x1c758ec1 0x11428fa5 0xe8308fa7
+ 0x571d71b9 0x94e40c2b 0x1aaaa397 0xce9283ae
+ 0x599bbb93 0x51c04bf7 0x556bc74f 0xf6e6e799
+ 0xc34191e0 0x5f06bce6 0x9f63ecd1 0x54437905
+ 0xf8f9bd50 0xde82cbf6 0xe11a9949 0x9d312bfa
+ 0xe712e3db 0xb57eabc9 0x57682068 0xc91c2e3c
+ 0x681e4fbd 0x0ecd3452 0xcc893248 0xf13f0600
+ 0x9a8a9194 0xb4c1cd29 0xd504d8f2 0xee6c5b8a
+ 0x211c9958 0x7a4f9c30 0x32775708 0xda97bf03
+ 0xf7035e57 0xbe77d547 0x37accd1e 0x6c537775
+ 0x8d63b752 0x7fec4a3c 0x94211d9e 0x60bfeb2a
+ 0xebd47130 0x747d52fc 0x8434f487 0xac9091cc
+ 0x8f8b228f 0xb77f96a1 0xc21fede9 0xa9e2678a
+ 0xbc815194 0x54d677ac 0x66c11faf 0xfb666595
+ 0x01e5e973 0x5c990d0c 0xf2cea425 0x5b516ff8
+ 0x8c932784 0xd18feb32 0xb5acd3d3 0x1703b89a
+ 0x34fb512c 0x0ac83386 0xd58c5728 0x5c018ed6
+ 0xbe0908a0 0xd490b0e9 0x0ec94527 0x2f281499
+ 0x471df723 0x03eddc08 0x9b99d975 0x11535b70
+ 0x5802288c 0xb3512d42 0x415a9c0d 0x52dbd146
+ 0x8b0c59bf 0xd8160cc7 0xe37dee6e 0xfd5211cc
+ 0x5635ff4d 0x8d783398 0xc11f5d62 0x54ca73b4
+ 0xc3ebdf96 0x835e7883 0x9cd03137 0xe4b4f709
+ 0xdbde6d86 0x2b562b2d 0xfecc0df5 0x172a5ec2
+ 0x568b52b9 0xf542957c 0xd738b325 0x49c49aaf
+ 0x6eb4c9ad 0x363f4978 0xac4b0cb3 0x4ec8dca8
+ 0x7a2ec2ba 0x10ff39bc 0x8b8748d5 0x6a86e67b
+ 0x0d81e2b6 0xf4bde138 0x02249333 0xab0c7acf
+ 0x4ce5e894 0x1656dad7 0x46c59329 0xa849fea0
+ 0x3d0400be 0x6898c4f7 0xd866ff9a 0x84a5b170
+ 0xc997009e 0x80524f6e 0xc80fb5dd 0x5bde0181
+ 0x0bb0c8a8 0xe5a6b9e4 0xd4753f0a 0xda9bf0c6
+ 0xd6dd041b 0x4c7338f0 0xa223bd71 0x23b58f4a
+ 0xf6e127dc 0x1777033d 0x5b057a0f 0xe08af0bf
+ 0x17c07032 0xbbc3f27f 0xac6dc98b 0x921e2f12
+ 0xcf32236d 0x6cb700a8 0xa3b4e5cc 0xe9b65d73
+ 0xca7d6f44 0x7b5917f6 0x7b80dd21 0x5ee87e45
+ 0x86799f71 0x0667e036 0x8f97dcca 0xc4bfd5d9
+ 0x90737eed 0x41b5a457 0xc6c96301 0xf8933e95
+ 0xe51c2456 0x00c661f4 0x8a0e1aaa 0x92aa4181
+ 0x1e3f8638 0xd481a14a 0xaf637189 0x91622fb3
+ 0x4450865d 0x4202b431 0x5248342b 0x01ff713b
+ 0xe33b5ec5 0x912d6856 0x10deb2ac 0x9072c180
+ 0x24d792af 0xa39c5dfd 0xb4c94140 0xfeb32004
+ 0xa174dae8 0x49da7dfc 0xa4db1090 0x7d2a998b
+ 0xb7eba69b 0x9b824871 0x3557bd1d 0xd3a73d9b
+ 0xf225310b 0xad1ffcf6 0x2d5f075b 0x592de6f4
+ 0x69e438f4 0x4ed8cac4 0xa79c947f 0xb95f9590
+ 0xb8ede5c9 0x0b1c9229 0x85a4b30e 0x65149920
+ 0x433461a8 0x186fda4f 0xbaee7097 0xd3cac1bd
+ 0x8bc32ca2 0x914f1512 0x9b619478 0x582a53c9
+ 0x4e624a00 0x77e445ec 0x6f823159 0xa9c4766b
+ 0x0dd6ad28 0xfabdadc5 0x704bfd95 0x08645056
+ 0xe1939821 0x76650b62 0x8876941a 0xf812239f
+ 0x2869ce13 0xa4d292c7 0xecba40fd 0x83d2fd8f
+ 0xdd45ccc0 0x7c12b7cb 0xdc0a20bb 0x0d9be34d
+ 0x4dd16a9d 0x25835446 0xb94d8c21 0x97ca8010
+ 0xddd09324 0x95ffe31f 0xa86136c9 0x828ac571
+ 0x9aa7fc00 0x382cc48c 0x015f7186 0xc3fd040d
+ 0x505408e0 0x21cdc34c 0xbd266059 0x6e2f673e
+ 0xe4523c1b 0x3ba56bb3 0x1c343938 0xabc0df54
+ 0x8ba4f1e8 0xfbd4c592 0xb678c884 0xff3be2f1
+ 0xca013570 0xfb0598df 0x3cb9cc1d 0xe3ba8ca3
+ 0xc3d7ecee 0x0ae84a0b 0x0d70f0c3 0x963110ff
+ >;
diff --git a/arch/x86/dts/microcode/m12206a7_00000029.dtsi b/arch/x86/dts/microcode/m12206a7_00000029.dtsi
new file mode 100644
index 0000000..fe888bf
--- /dev/null
+++ b/arch/x86/dts/microcode/m12206a7_00000029.dtsi
@@ -0,0 +1,686 @@
+/*
+ * Copyright (c) <1995-2014>, Intel Corporation.
+ * All rights reserved.
+ * Redistribution. Redistribution and use in binary form, without modification, are
+ * permitted provided that the following conditions are met:
+ * .Redistributions must reproduce the above copyright notice and the following
+ * disclaimer in the documentation and/or other materials provided with the
+ * distribution.
+ * .Neither the name of Intel Corporation nor the names of its suppliers may be used
+ * to endorse or promote products derived from this software without specific prior
+ * written permission.
+ * .No reverse engineering, decompilation, or disassembly of this software is
+ * permitted.
+ * ."Binary form" includes any format commonly used for electronic conveyance
+ * which is a reversible, bit-exact translation of binary representation to ASCII or
+ * ISO text, for example, "uuencode."
+ * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <1>;
+intel,update-revision = <0x29>;
+intel,date-code = <0x6122013>;
+intel,processor-signature = <0x206a7>;
+intel,checksum = <0xc9c91df0>;
+intel,loader-revision = <1>;
+intel,processor-flags = <0x12>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <
+ 0x01000000 0x29000000 0x13201206 0xa7060200
+ 0xf01dc9c9 0x01000000 0x12000000 0xd0270000
+ 0x00280000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xa1000000 0x01000200 0x29000000
+ 0x00000000 0x00000000 0x11061320 0xd1090000
+ 0x01000000 0xa7060200 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xd1090000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0xfd2a2f68 0x82ac7ebb 0xa4916328 0x7480b81b
+ 0xd329a777 0x25750339 0x9a8f7a9b 0xf1da9cb8
+ 0xb1be7b1a 0x621d5a35 0x94b57e2e 0xa9def809
+ 0xe4492a43 0x530252bf 0x1040fada 0x8a853a89
+ 0xfb0e6e76 0x6d191ed9 0xefd28b83 0x946414e5
+ 0x13f415d5 0x28487029 0xb69855e8 0x516cbedc
+ 0xfabbea88 0x9f90e8a1 0x211793d8 0x54653835
+ 0xa7789a08 0x754791d9 0x484764d4 0xdca45615
+ 0xf64844f4 0xdbd754d0 0x7d2b0ff3 0xd023e25a
+ 0xb048bbcb 0x83038b5c 0x57e17d17 0x735f1e9c
+ 0x8982c22e 0x6c7b2ad7 0xb26e3b82 0x7121e035
+ 0xe4ea8dba 0x68d4f406 0xaaafdb13 0xf119b472
+ 0xb5853303 0x20698005 0xcf34604c 0xdc17d19b
+ 0x042d6e97 0xf0300325 0xe1b55072 0xc2804918
+ 0xd6d7a912 0xf908c81b 0x4f9979ae 0x0179f8c6
+ 0x2f13e3c0 0xc5911467 0x39ad6c23 0x9c9d8837
+ 0xf3c3f767 0xe56b4a96 0xdad7cebc 0x6eaaee57
+ 0x2215ca7b 0x4cee4f65 0xd9a51c2a 0xf33c80a1
+ 0x11000000 0x0b468bda 0x0b57c7cb 0x885fad4b
+ 0x8a37307a 0x68cc7d5b 0xb6395b55 0x583626b8
+ 0x21efe98d 0xa516cc42 0xf5b978b1 0x585d8a11
+ 0xdd5f2ee4 0x17b1c7eb 0xb6f005ea 0x9ecc6ac6
+ 0x82c0f1b2 0x25a114fb 0xa6086296 0x93da75f4
+ 0x0695ff88 0xd413dd65 0xccf7609e 0xb7718aa8
+ 0x334406dd 0x28de253f 0xfb43ca83 0xa4674656
+ 0x7392e05f 0x9b062c62 0x17571892 0xb5811cbf
+ 0x9d64666b 0xa01c1500 0x5893e418 0x07ba6ed1
+ 0x0eebedd8 0x299a52bf 0xdfdb6191 0x4e846b26
+ 0x298b7431 0x576f4479 0xf5317e04 0xc9492745
+ 0x167c42e3 0x0c0cd705 0x82756ce5 0xe81ba860
+ 0x536c357c 0xc27433fa 0x41c8078f 0x1ff779d0
+ 0x73ddd76d 0xe606c66c 0xe0ad45bf 0xfebdc310
+ 0xcb2aa836 0x39903a79 0xe53d5dc1 0x0cb6a1ff
+ 0xe6091d08 0xcb2961d8 0xd38987ff 0x2bd624fd
+ 0xfb4e484a 0x8c60efbb 0x0ed088b5 0x5a142b04
+ 0xa737bab1 0x44da29a2 0xc046ecb1 0xe7ccefdc
+ 0x81895d2d 0x41266fa8 0x52a5e25e 0xcfeac133
+ 0x252b0737 0xec54b6c8 0xe1c9ebf6 0x25180c1a
+ 0xea65b9e2 0x5e9ada96 0x08559e07 0x414fcece
+ 0xdb4927f7 0xa229106d 0x6a7db273 0x8ac6a901
+ 0x00a87e4d 0x14fd1e2a 0x63a5fa87 0x5ca223c5
+ 0xc0c980c1 0x42c447ef 0x5b274187 0x75bd6279
+ 0xdb44dae2 0x60856af1 0x777caf5f 0x298e810a
+ 0x93f4f418 0x9e1ddf3f 0x6f589046 0x18ea149c
+ 0x4a5ce4b0 0x529db285 0x3c2dde59 0x1d680e51
+ 0x3a62d819 0xdf4c01d2 0x432a8f06 0x70a37043
+ 0x4a0d4baf 0x0d3395be 0xfce0391f 0x5228aac2
+ 0x9dd9b00e 0x6149f393 0x6fee1d85 0x1d3628cb
+ 0x107076de 0xd99fe940 0xa227eec2 0xc97d8119
+ 0xcf2fa8b2 0x821dac93 0x518875f2 0xd18d1d47
+ 0x3e27fdcb 0x47823f98 0x20d42c1e 0x9a58812b
+ 0xe0987435 0x1426f12f 0x61d6f627 0x5c58d415
+ 0xe5ca80de 0x9e11e526 0xbccc0f94 0xb49cec4d
+ 0x357f947c 0xbef0e2f2 0x5b9b2596 0xddc87ff7
+ 0x5f2705f8 0xa25f2be7 0xbb45a165 0xe49ef6d5
+ 0xe76e250a 0x75584c7d 0x7900da7b 0xee0e3360
+ 0x6988740c 0x4aa56944 0x2d485383 0xef45f5d5
+ 0x0df4b0f7 0x48199182 0x5b33c21c 0x8f2483c1
+ 0x8aae6c50 0xaf406ccb 0xb7522bda 0xeafb64de
+ 0x9a9b1fd7 0x3ab46c34 0x0ec5f025 0xe5bc9668
+ 0xdb108e78 0xd6152ac8 0xc382ec93 0x5abc2565
+ 0x4f256030 0x856f6eb5 0xb589dc96 0x3de80942
+ 0x49d20a05 0x8e3ac21b 0x0262ecc7 0x5f1bce89
+ 0xec50198c 0x0115b078 0xf67d94e3 0x1cc3682b
+ 0xfb2d4ab0 0x4d6ce252 0x1d7aace9 0xf7e99257
+ 0xc1235e85 0x8129ee72 0xb6cfbb13 0x6b851ab5
+ 0x430633d1 0xe9ed33e9 0xfe85a42a 0xb4583c0a
+ 0x35a65f5e 0x5fb0bc81 0xe16db440 0x7d022cf2
+ 0x8f832920 0x20ed9ad4 0x6a4ace8b 0xf4c85869
+ 0xf17dd57b 0x277ae0d5 0xb5f59c50 0x35d099a5
+ 0x9ce955ae 0xcb200000 0xcedc4073 0x2a2ba8b2
+ 0xa1b53439 0x46ced775 0x59069604 0x6488f5d8
+ 0x2bc0af55 0x643178a2 0x36f62be3 0x2606f0a1
+ 0x3057cf8a 0xc28f4a3d 0x708e8020 0xb3fccf9a
+ 0x29b79fa7 0x35622d93 0x85eb0e68 0x80fa3b59
+ 0x143f340f 0x20e17166 0x169fe55d 0x698f3655
+ 0x0bc8b45b 0xde3aaf6c 0xbd597266 0x75505401
+ 0x44d0095d 0x4c00f346 0xfb9ef2c6 0xee70ef96
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+ 0xe772e14e 0x3ca4e729 0x6973e751 0x764f244e
+ 0xca8d1621 0x6c4fb15c 0xae972e6d 0x3d26c6d3
+ 0x5ca8f450 0x6328d65c 0x2e7cd88c 0x87dddcc1
+ 0xcbbdefc6 0x1ab8c0cc 0xd21e503a 0x20c11d27
+ 0x2f0adc1d 0xc24240d2 0xc73aa069 0x99afc53e
+ 0xcab27e40 0xbe107ccb 0x8ad5f0ae 0x9024c188
+ 0xe02bb39d 0xdb784309 0xf91acb54 0x4d15b75d
+ 0xd339c237 0x3b556619 0xf69f91f6 0xca6fcfd4
+ 0xb5ddf471 0x0698490e 0xb0855c30 0xe2b34b13
+ 0x3c979248 0xc0484a59 0xb4cf9f4f 0x7975f2ac
+ 0x602259d3 0x89364c24 0x37f29913 0x0b4c88a0
+ 0x23f0b663 0x309c13d2 0x80a3d12c 0x4c866e87
+ 0xea7e29c0 0xbc33db6e 0x3c3af584 0x63da0de7
+ 0x9bc6bf5f 0x3b948269 0x4d41b09b 0x5724dd20
+ 0x4e16618b 0x5917781f 0x4bdec762 0x562cc3fd
+ 0x50e59d92 0xb3edea05 0xa6ceaa68 0x60af473d
+ 0x78a99aca 0xd60ba313 0xe502992c 0x0c25c2ba
+ 0x476eebd4 0xe7e23958 0xc4ac2757 0x0d6695ec
+ 0x7664b4f0 0xb87ed0a5 0xdcf23b2a 0x76d38802
+ 0x21699284 0x87b80e7c 0xf0e34f45 0x4bb84bc8
+ 0x0316744a 0x26de0ed4 0xb25ff5e3 0x31445bb1
+ 0xaccc5b87 0x271b976a 0xcdf5663b 0xe142d271
+ 0x1af28339 0x7d304ca4 0x11ee6243 0xdf70fbc3
+ 0xb8d88f25 0x4c2d9626 0x8eb72c77 0xceee1817
+ 0x4e1b35f7 0x6c261f67 0xa32a2801 0x67ace2af
+ 0x7c87f8c1 0xca6f2505 0x982269dc 0x137080a9
+ 0xe40fa78a 0x3897a66a 0xdc5d0ff7 0x58016e44
+ 0x21bcc988 0xf2a4df15 0x9fb021d4 0xca59e882
+ 0x3673d08e 0x7cf5d500 0xd41ab9df 0xc17b4a58
+ 0x2cb85aa3 0x01103427 0x5a8fac5b 0x7ac856b2
+ 0xb1532563 0x1b94b518 0xadea3bfa 0x597109a9
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+ 0xa4a38e9d 0xa9fdc597 0xf990f2f1 0x00466640
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+ 0x4ec8a6a4 0x11201430 0xb44e2b28 0x5bd018b0
+ 0x444ba2bf 0xa63031eb 0x147f9826 0x3fc56ac1
+ 0xd3a75ad3 0xc3f71815 0x340bd72b 0x3e5a488d
+ 0x0cd8fb05 0x17791534 0x68e7321c 0x1489c701
+ 0xa39f2d71 0x7cbbd9f9 0x42cba365 0x024f7d9a
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+ 0x5fd3003d 0x7f0793b9 0x497b6ef4 0x3af648f2
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+ 0xb0efd82e 0x8e60452d 0xd86ed85f 0xc1ae73d1
+ 0x633d83dd 0x7dbee7f6 0x46ef5590 0x027f2d50
+ 0x3c81bcf1 0x37a3940d 0xc92d0a8f 0x270cd02d
+ 0xaeed9d1c 0xb6d76bcd 0xda27f251 0x1625a683
+ 0xf2d1302d 0x3f95bc0e 0xdb4b36e0 0x96fe1e6e
+ 0x1dcbca54 0x57d44867 0x14aada62 0xf20f5444
+ 0x9ccf560e 0xb8d178af 0x9affe58e 0x8e3bd741
+ 0x7dff29e9 0x3c1998e5 0x9909e1df 0x1bbbd50f
+ 0xfda14fdb 0xb66fb65e 0xe646d5f3 0x71f41791
+ 0xbca50c12 0x57c6d2a2 0x8f5c750f 0x48f87301
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+ 0x211dc2ac 0xa61925bb 0x20bfb41a 0x98253e77
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+ 0x396ed0b1 0xa23e63da 0xea20cb1b 0xb2bb359b
+ 0xb5df6ff5 0xdbc470b4 0xa6fd8d97 0x9458f6d0
+ 0x97434866 0x2c9521c4 0xc51f6ad2 0xa33fb3b5
+ 0xb26915d7 0x3ef363da 0x9ff9f5c7 0xfa236e60
+ 0xa12b879d 0x2f98bd3b 0x95282ca8 0x64f90513
+ 0xc03d2962 0xb13b82f8 0xfdc2eb41 0xc39dcf3b
+ 0x95a409af 0xbaba6e7e 0x0d028543 0xc5b9426b
+ 0x35f5727b 0x8f3b9f8c 0x6e7b85d8 0x2cfa9b2e
+ 0x2a7117cb 0xa41f3fe5 0xbe17ff18 0x0f4a8be4
+ 0x20b9003a 0xebce04ff 0xd6f276d6 0x9fc66d07
+ 0x83f40250 0x560eaffe 0x92be2ddd 0xdb0ff83e
+ 0x424f0605 0xb3cf76a4 0x167725c5 0xe3b513e2
+ 0xc31a1a72 0x9f7161a4 0x25707dd1 0xdb5f2a91
+ 0x85db06af 0x78443bf6 0xebbd8e7d 0x7909e5fe
+ 0x618237a6 0xe6dea70c 0xcd3299c2 0x7736d40a
+ 0x044cda94 0x6cec190e 0xb9652583 0x51946c01
+ 0xcba67203 0x0dae0f1d 0x6d0dff0d 0x85756bf7
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+ 0xb5f0cefc 0x5359534d 0x6de87cf9 0x94a78727
+ 0x15c17557 0x398876df 0x2f85f258 0xa0284d4b
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+ 0xbb6b7fb4 0xbc02ca0f 0x1b03bd1f 0xdd1a59d6
+ 0x5d48f10b 0x35e35688 0x1411d34a 0x6131c664
+ 0xc1b8b277 0x1bc8afd3 0x886f0c09 0xc1b6b517
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+ 0xbfb3920a 0xd25aa79c 0x67d87d44 0xf612df60
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+ 0x3368a90d 0x39c8bd81 0xf4ba5ead 0x6fe656ad
+ 0x93b946dc 0x2181219e 0x7b98805d 0x675af3fd
+ 0x59760289 0x934b4803 0x4189f27d 0x9503a5fd
+ 0x42aaa076 0x6b4bd024 0x86c826e9 0xe0370ff4
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+ 0x0f50f2de 0xbb548368 0xc48273d4 0xf27b6798
+ 0x9a6b5231 0x68491e7b 0x3f482179 0x89ea3b35
+ 0xa7525ffd 0xf8f1f616 0x07859572 0x738cb4b3
+ 0x8937c6dd 0xf5988c71 0x4874905e 0x677a8c17
+ 0xd58df987 0xc4210078 0xe6b1c480 0x7a91e14d
+ 0xa1228a7a 0x09057467 0x6cd59ec7 0x6ba93248
+ 0xb8e263cb 0xd3305730 0xaec36ee6 0xc773d0b5
+ 0x2895f8ec 0x6c9f5fb5 0xd32a21a5 0xcea9d058
+ 0xfa97282f 0x5559ceb4 0x5a0bf57c 0xf3cd99b5
+ 0x2771f6c4 0xfcc9a35d 0x5143417e 0x7c6f9db7
+ 0xb47cb7df 0xe7dde37b 0x70a07531 0xe25e06a2
+ 0x3bbb7d30 0xaf41b085 0xe664f973 0xee2c7ab7
+ 0xef8eb1b5 0xfba67f7d 0xd71568dc 0xbbff3339
+ 0xdf49725d 0xbc0e7edc 0x5361e6d3 0xb0978c73
+ 0x1320540a 0xa9843a06 0x34099c74 0x4bdddd23
+ 0x18680496 0x44f9cc19 0x6de71a34 0xe4eae858
+ 0x3349a819 0x28400571 0x10a55fe9 0x05672399
+ 0xb376eadd 0xed4b1a35 0xe79d0a4f 0xca8d0601
+ 0x78a7b066 0x8ea59a40 0x7be112a2 0xe99ea438
+ 0x44bd9efa 0x6e5227a1 0x70325aef 0x777282e9
+ 0xb579c189 0x4ee92bc9 0x0d0236dd 0xb57cf232
+ 0xb815e184 0xd05823e4 0x0c9490b8 0x70a5fa56
+ 0xdf0f178a 0x99d27374 0x1aba9e05 0x18378c3d
+ 0x86991118 0x3a199a70 0x90b2a2cf 0x67a6923b
+ 0x0975e5f2 0xf50fb0a3 0xbffbd67a 0xce6371e7
+ 0x203564ef 0xb1d7a395 0x201cb1c4 0x30085e3c
+ 0xfb2c66b4 0xf80ae969 0x1d407625 0x0bca1a0f
+ 0xb62c078f 0x83efbf38 0xbd7b0a69 0x7d9bb66a
+ 0x46b5c885 0xb256d753 0x0b5d008e 0x1756d5bf
+ 0xa9ffdaf6 0x01231fcb 0x8c69e461 0xbb2ad661
+ 0x29dee8f7 0xf1f23d56 0xd5e90ffa 0x48d9d93e
+ 0x77b26e95 0x49c47953 0x7565da8e 0x41a6124a
+ 0xfce69643 0x55f99554 0xa5501d6e 0x5738b726
+ 0x4c989c96 0x93cbe27e 0x20ff3d38 0xf4787a09
+ 0xfa3520e4 0x26b2dc11 0xb701c94b 0xcd8857ee
+ 0xb4b07229 0x0bbcf1a7 0x3d31cd32 0x08ced413
+ 0x3da04c1d 0x7bdf1787 0x344f510d 0x53a02e8e
+ 0x7e295418 0xa5ed24b3 0x3a5a2c98 0x34947e44
+ 0xb398bfcb 0x7c0ea498 0x18db3289 0xec646beb
+ 0x2e8ed766 0x5aff9ee3 0x497dc7fa 0xa70c3be4
+ 0xfc9306c4 0x729f532c 0xd87d61d0 0x635fadbd
+ 0x1efb1234 0x66fdb543 0xf5b86d07 0x3a4836fd
+ 0x9caf7dd3 0x8a9d9e5b 0x179529ac 0xa9a3fee8
+ 0x4cfa4495 0x791b8b7a 0xc503fc2b 0x1e07d0e5
+ 0x0561cfae 0xb5e7c403 0x0809744a 0xea84c654
+ 0x23614fd6 0x23ae773f 0x545be2c5 0x3585b8b4
+ 0xcad8b6ed 0x088a56c0 0x81054caf 0xecb13d9f
+ 0x44bd49f7 0x90a3da4a 0xf4b04300 0x32a2b69f
+ 0x44bed501 0x85cb54ef 0x85dde589 0xe410132b
+ 0x1c2e41c7 0x3d28cc9b 0x4df948de 0xaa058c37
+ 0xb82cf615 0xfa0574f8 0xd0391f5d 0xfb2b98b3
+ 0x3ce5585d 0x80ca4d6a 0x4b138f75 0x721ccc65
+ 0x496a3e37 0x4a8dd025 0x2d77b3db 0x65800ff3
+ 0x1d2df03e 0xb4b12a59 0x4c6a5b9b 0x17413fda
+ 0x4e938a09 0x7e3aa03a 0xf86cc8f3 0x972cd7b7
+ 0x871849b1 0x0c0879d2 0xc7c652a9 0xe9531ae1
+ 0x541142d9 0x4f731afa 0x9c43e538 0x866b695d
+ 0x4a4c4076 0x1e8aa293 0x51bc1eaa 0x5f57d28a
+ 0x142eb7f5 0x14096954 0xae0e9eb3 0xef732983
+ 0x70187474 0x3569b88a 0xfd3a3c61 0x54f0e2d0
+ 0x7afff032 0xa89cd23d 0x658114ec 0x434ccbc9
+ 0xc25f33c7 0x1b6e9a7a 0xd97bd017 0x3b7489d7
+ 0x67129c97 0x333ee180 0x04bf73ae 0x4731105f
+ 0x09d589f9 0x7d5a67a3 0x3e8fcb8c 0x2090c536
+ 0x14a623c0 0x21a247fb 0xe117bbe6 0xe98bbd1c
+ 0x09e23674 0x02f09f22 0xba7f9f45 0xd18573b6
+ 0xa6eb18fb 0xe01a7904 0xa8869f58 0x82ec81ee
+ 0xf4549f1a 0xfa0f6085 0x1cf809e9 0xe603d078
+ 0x13525306 0xd5611c7a 0x2c92b32b 0x5fdc0c0a
+ 0x0b3aaced 0xa40059b7 0x27c42499 0xcc619db5
+ 0x9f9b7841 0xfdca5eb2 0x2d3e833a 0x2830a6a0
+ 0x4c81f3b0 0x3ec8a8bd 0x50b95605 0x33a9d515
+ 0x7fe14795 0x4ff1d83d 0xef92fbfe 0x87f4faed
+ 0x35d5fc69 0xd8764a49 0xec81abfe 0x634a2ed8
+ 0x9635825a 0x0943624c 0x5eea8464 0x578e2344
+ 0x551bd5af 0xca02915b 0xea419d8c 0x9d0fa00e
+ 0xf3633f48 0xc6ad62ae 0x1eeef6ab 0x21ab106a
+ 0xe325954d 0x60457916 0x6ac9168c 0xea8a9d6f
+ 0x14772361 0x7630452f 0x8795e1de 0x21144d8d
+ 0xe7996dd2 0x45aff64a 0xfa62c37f 0x3f5a04cf
+ 0x250f988b 0x7985d243 0x1f717008 0x7908d22f
+ 0x4fc0d5d5 0x856d9819 0xccfab84e 0x3fec2a74
+ 0xe75c1af6 0xe2682ac3 0x2f08e560 0x7133d2a0
+ 0x63e5fcca 0x3a17438f 0x9cb826c8 0x06a2f3cd
+ 0x4bac2001 0x50596ba4 0xe74758d4 0x64d17e0a
+ 0x08fc5b67 0xb0d62f6e 0x95eb8e15 0xd51bfa64
+ 0x421c68b9 0xdd1526a8 0xfb7ea10e 0xab21193a
+ 0x4b1186dc 0x77bbfd82 0x1ab08e9f 0x871659a5
+ 0x1658fd5f 0xa04f322d 0xf50ed273 0xb8d411a7
+ 0x8056489c 0xfbd858ae 0xd70f7d88 0x3c5cbc78
+ 0xf53ec2be 0x1d2228e2 0x8b53aace 0x212454d9
+ 0x76ea1d2e 0x9ca66373 0x9f6679c2 0x51c48b56
+ 0x47348811 0x8abc0a27 0x60050980 0x5d290483
+ 0x7ea8504f 0xde186466 0x91219d4c 0xa73144ed
+ 0xb5f36fa4 0xa37912b8 0x02625bd3 0x3bc2d9ed
+ 0x2e623844 0xa9a751af 0xf0ba18af 0x4433e06e
+ 0xca7cda24 0x686c9163 0x86a437c1 0xf8c17120
+ 0xed50542e 0x62b61fa1 0x600e47b6 0xdff86df8
+ 0x77502dd5 0xea5d75ac 0x095a06e4 0xa18efafd
+ 0xfbd01eaa 0x27a1cb0a 0x3dfcab8e 0x07be7250
+ 0x086cb680 0x2c1ddcf4 0x6fa79784 0xcd874edb
+ 0xa383d520 0xa5c0d1cd 0x2e09cd9a 0x34d645c4
+ 0xf6b9b98d 0xe8e80ab0 0x39b78c60 0x6098b6f2
+ 0xc3c13e53 0x88c9fd83 0x60c9e766 0xf49c4c2d
+ 0x79e3d3d3 0xbfade7d5 0x6ba57dc1 0x3069e3ad
+ 0x59632e2b 0xb86e871e 0x2dd63287 0x9704b283
+ 0x343a6cb3 0x37d7950d 0x283f262d 0xd49d5f75
+ 0xdacc49b7 0x5952e045 0xc0fefa19 0x69effce3
+ 0x5b2a3c0b 0x3757339f 0x18584f8a 0x77a80760
+ 0x5fcdadc0 0xc9b4df80 0xfa521be0 0xbcfc8ecb
+ 0xfd3f8eb8 0xbee4739a 0x139caf94 0xbdea1cd7
+ 0xab158240 0x233fd8dc 0x8ec63274 0x34eee6d8
+ 0x4603b2f8 0xae544fc5 0xcd444551 0x2b2b349a
+ 0x0a562524 0xb2e02518 0x577b1125 0x8b3c1ff9
+ 0xfd27d88c 0x2ad77d04 0x1f82a54e 0x20254fdc
+ 0xee8e63cf 0x8df3fa2f 0x9ffc7c43 0x421ae12f
+ 0x9b166441 0xb74a5a4f 0xdad0511e 0x0a8ee5e9
+ 0x8fe86041 0x37ef90ea 0x3fcf8380 0x87288691
+ 0x384b8b8a 0x98d8a45f 0x995443d7 0x6c617236
+ 0x9a40f76f 0x9f30733f 0xfdbf3927 0x7b4c0281
+ 0x9e87e64f 0x9802938c 0x65f9de31 0x829c3eda
+ 0x0a1d2f4a 0x22e0e854 0x30045b70 0xbf84a44f
+ 0xc2c30b57 0x47c5ff90 0xaea87e93 0x99c69ae5
+ 0x1080e89f 0xc2896e80 0x09ba0cb2 0xd16ee263
+ 0xe05337b0 0xef1d8359 0xc1d4b102 0x08620117
+ 0x2e4ab2bf 0x05dc3af8 0xc7ab866b 0xeee05983
+ 0xd0a00c19 0x96996791 0x75ac6042 0x29001ada
+ 0x13440a23 0x2b1eca42 0x4cddfd68 0x81a98384
+ 0x6bcda226 0xa8594443 0x92f26e53 0x434de4ec
+ 0x07596ee2 0x4c8ea6ed 0x5596054d 0xaffe0ef4
+ 0x6dc1ab64 0x20bc006b 0xad4e3933 0xe6df0d3f
+ 0xfb3ca9ee 0xc2895a4e 0x8fed0d43 0xa5ed7985
+ 0xc364f083 0xc397a806 0x7b651ff9 0x1d7e22e5
+ 0xfd02f57d 0x5f16a429 0x8612177a 0xd36b8983
+ 0xd87b0303 0xeaa632b0 0x57dff2b2 0x19772dd0
+ 0x51317bfc 0x28404b1f 0x9e35d818 0x9c771bb7
+ 0x6d42a5c1 0xa6030578 0x9c844d5f 0x95d5eb7f
+ 0xdf15f5ec 0xf0f8c86e 0xf8ebfd20 0xae32d9b5
+ 0x4ce2b066 0x776f0149 0xda8a429f 0x0e895a79
+ 0xbe62c881 0xf9c051d8 0xcaa48f97 0x9e8dcb1b
+ 0x69cafc21 0x411f1bff 0x4f4d71dd 0x102cf709
+ 0x974ebe53 0x7373aea6 0xef2a7ec1 0xedabaccc
+ 0xdac969c4 0xe010b562 0xb6880570 0xa7a7f5d4
+ 0x3c6464f2 0x96dea774 0x1614a588 0x06074080
+ 0xb37304f0 0x99da7dda 0xd3e36214 0xb27b7cae
+ 0xb4cef0b3 0xa435dc77 0x9d1c1a15 0x616993f4
+ 0xb8a5ec8f 0xdce1ff5a 0xaaea14c4 0xa5d2172f
+ 0x90c8c636 0x49c0b81e 0xff9db895 0x4252b336
+ 0xd420b5ce 0x87b35be4 0xae32bda2 0x441092d9
+ 0x321e8583 0x7d863719 0x3c888147 0x3f2bb9f6
+ 0xd1daf5f1 0x682f2ffe 0xae62e280 0xcf8f928a
+ 0x4a7237f5 0x6f3a55af 0xb91dba98 0x9b83b723
+ 0x0e857ed8 0xd5ac567d 0xaf8bf791 0x23f8269a
+ 0xe369638f 0x6a88edb1 0x5ff0be07 0x5c02b513
+ 0x7d22f89e 0x2f865c08 0x9cc0d56e 0x31c87205
+ 0x420508f2 0x95a21602 0x04d838e3 0x353353e8
+ 0x7ca1feb6 0x61c6f7dc 0xf78a68eb 0x918f2ac1
+ 0x413037a4 0x09692d1c 0xc8eceb54 0xb1bf975a
+ 0x2ab63552 0x467bceeb 0x408bf024 0xeaed2b31
+ 0x3255158b 0x8d9c6617 0xe450350f 0x615cf5f3
+ 0x1a7fd744 0x27a0da59 0x43298211 0x77392298
+ 0x9511e81a 0x08a2c2dc 0x3d6f1113 0x967e6586
+ 0xd1726b35 0xb9292da6 0xaa6f8ad4 0x0f13b47f
+ 0x34b96cea 0xebd9487d 0xfe533d60 0x41bcdc60
+ 0x364c8c79 0x32be8bb8 0x1395ead9 0x9e85e474
+ 0x146b6fbc 0xc93267cf 0xcdda98d4 0xccfb2835
+ 0xe779dbd5 0xf9288237 0x2073e129 0x16fe4ab8
+ 0x34ca576d 0xac313eb7 0x5deb3b4d 0x1727510b
+ 0xc168a414 0x332cd921 0xe38e8123 0x9a2c1aef
+ 0x80f5d1d9 0x7c88c923 0x8af17577 0x59ae1408
+ 0xffa5e565 0xb418ab13 0xdd6376aa 0x45cd70d9
+ 0x3c3a06a2 0xbc555669 0x34d1fc08 0xc2aa934a
+ 0x385416e2 0x91ceeadb 0xe06c9cef 0x0394dbd4
+ 0x43e7c657 0x296d7621 0x55dafcba 0x808b836b
+ 0x61c41f0c 0xd9689bc5 0x3a531ffd 0x8417ed30
+ 0x3f3f8616 0x641eb4a9 0x24964006 0xe8d2612a
+ 0x3b916d7c 0x5603319f 0x29007523 0xc9c7dc1c
+ 0xd1f7212e 0x22ac1932 0x05c39a5a 0xd55081ce
+ 0x589ae996 0xa998fcbe 0xd8df5512 0xef7d7a01
+ >;
diff --git a/arch/x86/dts/microcode/m12306a9_0000001b.dtsi b/arch/x86/dts/microcode/m12306a9_0000001b.dtsi
new file mode 100644
index 0000000..53417c2
--- /dev/null
+++ b/arch/x86/dts/microcode/m12306a9_0000001b.dtsi
@@ -0,0 +1,814 @@
+/*
+ * Copyright (c) <1995-2014>, Intel Corporation.
+ * All rights reserved.
+ * Redistribution. Redistribution and use in binary form, without modification, are
+ * permitted provided that the following conditions are met:
+ * .Redistributions must reproduce the above copyright notice and the following
+ * disclaimer in the documentation and/or other materials provided with the
+ * distribution.
+ * .Neither the name of Intel Corporation nor the names of its suppliers may be used
+ * to endorse or promote products derived from this software without specific prior
+ * written permission.
+ * .No reverse engineering, decompilation, or disassembly of this software is
+ * permitted.
+ * ."Binary form" includes any format commonly used for electronic conveyance
+ * which is a reversible, bit-exact translation of binary representation to ASCII or
+ * ISO text, for example, "uuencode."
+ * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <1>;
+intel,update-revision = <0x1b>;
+intel,date-code = <0x5292014>;
+intel,processor-signature = <0x306a9>;
+intel,checksum = <0x579ae07a>;
+intel,loader-revision = <1>;
+intel,processor-flags = <0x12>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <
+ 0x01000000 0x1b000000 0x14202905 0xa9060300
+ 0x7ae09a57 0x01000000 0x12000000 0xd02f0000
+ 0x00300000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xa1000000 0x01000200 0x1b000000
+ 0x00000000 0x00000000 0x16051420 0x610b0000
+ 0x01000000 0xa9060300 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0xc2b13ad8 0x6ce74fea 0xd364ad12 0xf6404a69
+ 0xc89041e4 0x217fa2f6 0x6ff6e43f 0x79cde4eb
+ 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6
+ 0x5fb36178 0xbc17d76b 0x31b7b923 0xc81aec82
+ 0x647b3320 0xf1db9653 0xff3b9759 0xe9c74b72
+ 0x3b193752 0xc147860b 0x160e0d6a 0x5bdb9dbf
+ 0x1ccce2ac 0x387670ad 0x2f106f05 0xf8607ea3
+ 0x42562576 0x30e086fb 0x409a06b8 0xf1957736
+ 0x5eb03f65 0xad147fab 0xe1a8e8b6 0x208d59d2
+ 0x683fba2e 0xf172b378 0xf8138dba 0x61e81d1f
+ 0xd551f997 0x28c79780 0x04f9db27 0xa80679b9
+ 0xaca4e7ff 0x6876944b 0x26d7dbc1 0x77f7dc2a
+ 0xf0bcb163 0x1b2a8e81 0x7b90aa49 0x8d5eaf2f
+ 0x522384ae 0xae7f7082 0x412ba10a 0x1ce1baa0
+ 0x478c29b4 0x9c09b4d2 0xf225f64f 0xd43026cd
+ 0x81098579 0x7df5db05 0xa5815bb0 0xc73ee756
+ 0x9738cb95 0xa5bd62e2 0x88e2c6b2 0x778e7fcb
+ 0xd3bdb872 0x9404403f 0x5be6ad63 0x71dc4abc
+ 0x11000000 0xd350099c 0x242d0996 0x1a4ddff8
+ 0xd7f1f03b 0x77590eb8 0x45c3ad79 0x3b714d23
+ 0xa85ba322 0x31851c5a 0x540fe0ce 0x38692bd6
+ 0xe3d9927b 0xb33428b5 0xcf0ac8d2 0xd3646604
+ 0xca88adc7 0x8afc41c8 0x721432b3 0x8fd19454
+ 0x26344e0d 0x3acf6c28 0xbda18c21 0x526d52ac
+ 0xf8d37e15 0x09305e37 0xf6907871 0xdb56cc21
+ 0x6802cccc 0x6693c8a3 0x0f4dbe32 0x0d924103
+ 0xee9242a7 0x5f867a13 0x2f65a246 0x6b35ad05
+ 0x39fb7da1 0xd69cb7d8 0x45869424 0x4768b466
+ 0xe3ace365 0xa85eea7c 0xa59939d9 0x2ae32fb9
+ 0xa20b1559 0x8865f3d3 0xbe02e023 0x4199575b
+ 0x0c43089a 0x0d57b287 0xd37544ad 0xcd4573b4
+ 0xa96b7485 0x05b67259 0x117414ca 0x2ba24577
+ 0x439db14d 0xf82c5833 0x54ec9806 0xf8282306
+ 0x1de7d3cf 0xf7a76dc2 0xcd897f60 0x0bb1decd
+ 0xae58efb0 0x743c07af 0x48adffb5 0x262260e7
+ 0xaa9fa071 0x9a9ef7c0 0x98e861eb 0x14a48871
+ 0x0b4c3292 0xad851820 0xe0f7f45c 0xd71366c5
+ 0xc63a2f01 0xd02f23c6 0x49645eb3 0x2365fe48
+ 0x44817f1f 0x576ee68e 0x396b6134 0xd9fc4857
+ 0x9a771368 0xda5f2693 0x6ad30ec2 0xc8d08171
+ 0xe40bcd42 0xf82291a8 0x3094a8b1 0xd3edffa3
+ 0x5d5fb5e6 0x93802a7e 0xdf0ff376 0x09ebeae6
+ 0x35091690 0xe938ec68 0xd203065b 0xcf2e8172
+ 0x85282b27 0xe59fb64d 0x4b2ad981 0xeb5dde75
+ 0xc07eac26 0xa78c969e 0x74165d84 0x61c4cfc8
+ 0x740452f3 0xe5f6435e 0xb712e157 0xac49215d
+ 0x5be5e61b 0x09f46a94 0xde5cd48d 0xe3ed6b11
+ 0x2e8173de 0xabb6759b 0x46ffc47e 0x0cd84607
+ 0x6046c26d 0x19356116 0xe1da098e 0x8e1bbe9f
+ 0x5c8d6c20 0xa17cfe55 0x101a1f91 0xd64aef70
+ 0xef2e7b34 0xbb428dc4 0xf2252a3d 0x8ab3f6c0
+ 0x161db4ef 0xfdbf4f9c 0xb5bf9f19 0x414ea8b5
+ 0xc3db5422 0xfc3934f2 0x635a8253 0x86260b8c
+ 0xa4c0e59a 0xa45d24cd 0x4a25da59 0x7a568be1
+ 0x4ae3587e 0xbc77a3e8 0x70723657 0x9abcabaf
+ 0xe0a95d4e 0x25519f22 0x3ee1d340 0x2ddc2ca8
+ 0x04ae20c3 0xc143f7c1 0x4a79e4d6 0x19377b64
+ 0x2ab0d3f5 0xd3f19f6d 0xc8dc880e 0xf577dab6
+ 0x69b6ac46 0x37d4af3b 0x0999bc85 0x3d9fbbf5
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+ 0xe979f99d 0xff8617b4 0x376e5abb 0xb095a03e
+ 0xa36b1107 0x2dacf004 0xe4c565e1 0xc96463cd
+ 0x3b495e2d 0x4a2c2cd7 0xa0053fc2 0x6c82a085
+ 0x6b801c45 0xc1481d77 0x6d95dc15 0x44dc8bf6
+ 0x3eed7d25 0x901a6b49 0x2797e953 0x502ad2c3
+ 0x8491c3f2 0x3ce059eb 0x992c1a76 0x6c56d2a2
+ 0xcf1878a7 0x10574487 0x5a2f85e6 0xf94e418e
+ 0x4c149aed 0x9381b5a3 0x79c90da4 0x635e696e
+ 0x243073ba 0x67504105 0xe82ac957 0xaccda7b3
+ 0x29bdd624 0xd0c1533c 0xbc080065 0x8d617329
+ 0x27e6f74a 0x31e87692 0x50a3857d 0xc5b1ec3f
+ 0x4f03be5f 0xa35fde17 0x537a59bb 0x793d1eb5
+ 0xc11a0588 0x067e5593 0x102532c3 0x4024b312
+ 0x32504cf4 0x4ddc0e9a 0xad5b1d24 0x41081874
+ 0xf94fced4 0x16f39da6 0x9bdfbe58 0xc5615db4
+ 0x1fdd769d 0x4278b52e 0x4525b8b6 0x7feed258
+ 0xe0b4348b 0xb4925ccc 0x5547cc88 0x3f7f5443
+ 0x5b8cc6d3 0xbe6a15cf 0x7308c088 0xde4219df
+ 0x4685593c 0xc4ae83a3 0xaea72ff0 0x403b0c08
+ 0xe533a9aa 0xed46be76 0x4390bcd0 0x683a9f3f
+ 0x338b5cd3 0x7cd59689 0x2eb11aec 0x74e91cfd
+ 0x7ae588aa 0x0eadf94e 0x30a6b42f 0x1965f165
+ 0xd96de54b 0x06c85abf 0x1bbc0ab8 0x79f3ddd0
+ 0x871fd58d 0x498dd69d 0x9197dd0e 0x6cbb3a4f
+ 0x8a1f2a01 0x0d9cf747 0x80e66655 0x770d2b25
+ 0x567bd3eb 0x59583c5a 0x58afeddd 0x9296d0e3
+ 0xcf5af62c 0xf48b4c78 0x746f657e 0xe543b903
+ 0x24603809 0xd1bceeea 0x16d04950 0x2a7c754b
+ 0x4ea8bb99 0x9daecb97 0x3045b9a9 0x4a3e84d9
+ 0x5487e79f 0xd6145e57 0xc3b17f6f 0x14448bb6
+ 0x8e8529f5 0xf895acb9 0x6605c0f0 0x52d00ca9
+ 0xabf6e3e9 0x8f36e307 0xa7a15442 0x55144801
+ 0x69b028b2 0x8ab3b912 0xb493f80e 0x2dc9fdfa
+ 0x1b091fbf 0x1bce6b31 0x79eb414e 0xe5f86ea0
+ 0x39ef7dbd 0x2f86faf0 0xec366923 0xe770c7be
+ 0x74e4aa61 0xef3b9da0 0xd77bd8be 0xfd13d3cb
+ 0x4e8023c6 0x3d993904 0xfcb2f700 0xa14b753b
+ 0xde16c1c3 0x983c5a86 0x52ba5e61 0x1d67b044
+ 0x0f9a302d 0x2f13b653 0x769cbb97 0xea3e1cbd
+ 0x5791778c 0x540fcff1 0x5e6c53f2 0xc9cbac0f
+ 0x40ceadf0 0x648713d3 0xb5347ada 0xfe280079
+ 0xb8389f3f 0x5a6be26a 0x8e683d28 0x6a3e8e3a
+ 0x97ecac7a 0x70b648f1 0xe4eca20e 0x088cd0b4
+ 0xbad30405 0x0f77e382 0x673cdf65 0x438af1f0
+ 0x0b4f4eea 0xf0cc34e9 0x374a3c04 0x4370d27d
+ 0xc3e1e84d 0x141205c2 0xfa831e8d 0x32f2f10a
+ 0x77899366 0xc9d07590 0x9b6f2286 0xcac96a03
+ 0xf822808b 0x265606cd 0xbeef275d 0x73415b15
+ 0x4c87250e 0xf95a8c8a 0xdc8d6166 0x68522e63
+ 0xb9becc14 0x7b5f20be 0x3d158dab 0xa73b1716
+ 0x3b2cac15 0xf0498939 0xb60653bf 0x33fafc0e
+ 0x3b416955 0x3addca50 0x16ab21cf 0xd18cbdb6
+ 0x3b29b87b 0xa6fb7e4b 0x6634147f 0x44283b1e
+ 0x430ae726 0xa907ab82 0x2baa6706 0x621d2390
+ 0x15944559 0x2516c807 0x7d1eeb61 0xe2714121
+ 0x288d3998 0x47713cbb 0xa1ce3c1e 0x0c29b6dd
+ 0x9923131c 0x2dd19cfa 0x83d0ece5 0x78474c7b
+ 0x92dee4f0 0xba5cb0f7 0x780c1d41 0x50da5a89
+ 0xe303cebb 0xe8d5a2bd 0x7d6269a9 0xb75484f1
+ 0x33ee8186 0x085b7657 0x7b1c7863 0xdb1a43ce
+ 0x3d0c4bf0 0x302c1292 0x81e42216 0xee1f2c9d
+ 0x822451ab 0xcefd8067 0x8330dc41 0x14492542
+ 0xf038f54d 0x90a1abf9 0xc3067a77 0x40d9a42c
+ 0x127285c1 0x80ad15ff 0xaf4854e2 0xa47874f4
+ 0x2ed59760 0x67252c6a 0xe2830f38 0x8150c00c
+ 0x16f61cca 0x1331f815 0x2d832d17 0x163c6010
+ 0x69464e2f 0x99940411 0xbce5e85f 0x43d39ef2
+ 0x9b7224dc 0x28652b6d 0x331a7632 0x127f669e
+ 0x44a034ad 0xe95d2cec 0x3d83fefb 0xfa6d40a2
+ 0x9b535bf4 0xc83411ce 0xd661655b 0x64bcd8d2
+ 0xd99e1570 0x7dc4d877 0x9756b210 0x7623dc0d
+ 0x484dd33f 0xe7bca204 0xa06efbc5 0xa358c03f
+ 0x362cb282 0xe40e6d04 0x17ab9f5e 0x79a71a09
+ 0x804bf1a9 0x6bca7d73 0x5504a4ff 0xd3946f75
+ 0x18b0b9d4 0xd85993cc 0x94d000a5 0x8dda1609
+ 0x30afb8f6 0xb3c99c3c 0x7686d59d 0x68b719db
+ 0xdc7b3edb 0xedb76012 0xbfa0ba3b 0x280b829d
+ 0x72fcf1aa 0xe3d8f83c 0x088a57cf 0x95156217
+ 0x3306eb47 0x1d09cf54 0x1391876f 0x5b15ecde
+ 0xb46104e1 0x8d8f2593 0x90ee50cc 0x78dad4b2
+ 0xfd96daee 0xdbf15e95 0xfc859faa 0xdb4422a5
+ 0xa00eeab6 0x525232c6 0x9b665668 0x8a70518b
+ 0xbb27f7ac 0xb066b096 0x25754db6 0xe8c7d748
+ 0xd4e8d361 0x380dd246 0x9bdf15e6 0x6823c660
+ 0x5d408fe7 0xe59a5a89 0x1eb7523b 0x4997158e
+ 0xfa6214d2 0x03b35025 0x9aeff33c 0x20a38aad
+ 0x522f79cd 0x4141f19c 0xc58cd2bd 0xc816da37
+ 0x62c6f8d9 0xc15ea9f4 0x138d1f45 0xd36cef03
+ 0x88183bd6 0xe0de9036 0xefcbe8fc 0x5ebdce26
+ 0x9e83b01b 0xd35f6747 0x552951f1 0x4e20dd66
+ 0x419702b1 0x45446e7c 0x7ce5616b 0x6152e3a8
+ 0xffd572e1 0x4fab25b0 0x07563b80 0x98720ee7
+ 0x176d29bf 0x21cbd730 0xbde74431 0x09a8cce2
+ 0xc15e548e 0xe6a92b4b 0x14f17e74 0x75f7817b
+ 0x592143e8 0x113dbd25 0x5f7d7160 0xbdd8b1e0
+ 0x6ce045e5 0x53b27b2d 0x371c8aa8 0xa4da8be0
+ 0xf1f6df4e 0x9519bac4 0x6d6169cf 0x7846253f
+ 0xccb95d95 0x6ad11a98 0x4a3bd21d 0x5389f44c
+ 0x7c07ef3a 0xb983ca57 0xcf7f290d 0x4ec516f1
+ 0xa7711e70 0x818d45a9 0x49db6441 0xd032fc2a
+ 0x657df4d3 0xe37e6809 0x459a22da 0x41df8aa5
+ 0x462108a6 0x65177d27 0x1ddffa9f 0x7fa6631b
+ 0xdd7a414c 0x6351f0d1 0x1b38a419 0x6b529c8e
+ 0x167745e4 0xcac35897 0x3d7bf419 0xd59ed67a
+ 0x6486b2c9 0x9ae4fc90 0x8f608920 0xd35335c0
+ 0x8f113cba 0x0fcc11a1 0xdc180fbf 0x57a99319
+ 0x2c54185f 0x764c18d0 0x4f84b111 0x30a11040
+ 0xd15620af 0x496af145 0x263b2de2 0x3ff103dd
+ 0x38484dac 0xf143a3bc 0xb62c0de6 0xb122c545
+ 0x72f10466 0x63728442 0xee0117c9 0x2309f14b
+ 0x4ccdd5de 0x37ae022d 0x2ee7f050 0xf2aa9af6
+ 0xcd314a20 0x86954941 0x97215303 0xcd7e1687
+ 0x1dab6672 0x1c920209 0x41102dae 0x8b21c8ab
+ 0x6f70b04b 0x2988b209 0x86e6f033 0x5eb91718
+ 0x925b3c40 0xdcad0288 0x0ee98331 0xc3096ceb
+ 0x9fa04740 0x3ce3fb23 0x90d75cbd 0xeab21768
+ 0xaca5db0a 0x1c440578 0x762cb728 0x315a699f
+ 0xcd2b6490 0x11e3e267 0xa10d1bbc 0x23ac26d3
+ 0xc0c7c268 0x37ecf7ac 0x28de6fe5 0x6fb8e3e8
+ 0x583d1131 0x8370812a 0x3afd5d58 0x4569a06e
+ 0xf27ad86f 0x0db6a631 0x9add5128 0x1748c9fd
+ 0xc46e3c57 0x4c0df93e 0xc595c544 0x397f7e7e
+ 0x241f4086 0x7d7ed51b 0x56027473 0x656a6110
+ 0x970a8011 0xf9c7beb5 0xc6cb9957 0xb7426461
+ 0x62d3d89d 0xf99d48ca 0x3e4d4a88 0x9f751b71
+ 0xfa020205 0xa3124337 0x59935869 0x98c58314
+ 0xff7c4385 0x69191265 0xaf85ebb9 0xe434cda2
+ 0xb1ad3e0e 0x221d32e1 0x022d73a0 0xd676ce06
+ 0xab7f0c21 0x915c2444 0xf5bdaba2 0x74e4e789
+ 0x11ff0d95 0x58c53feb 0xa54eb847 0x9af982ae
+ 0x8d721596 0x73510fe4 0x95e3bd19 0xd82f8359
+ 0xc09cdd5b 0xc07f57a4 0xbece605b 0xa8a43c5b
+ 0x0acbeb6d 0x3c5cd8ce 0xb631050d 0xd558c921
+ 0xcb5054c2 0xefb06252 0x40d2e2cc 0x14ffe6ff
+ 0x761001a9 0xad64e7a5 0xb55618b4 0x2a40a1fc
+ 0x2cbe6d40 0x2bc18fc1 0x196e7092 0x3c137791
+ 0xa799eb23 0x1156feb9 0xd55d7ed1 0x0149c315
+ 0xae77081f 0xfe724690 0x55ed2fd7 0x04b18cd7
+ 0x691583f4 0xb1be4fde 0x19ae1cf7 0x3250140b
+ 0x35daeeb2 0xc9459a84 0xea2c19e1 0x57f8c9cb
+ 0xe05e07a4 0xcc77a363 0x43afd702 0x48305862
+ 0x6c4b459f 0x66ed6178 0x26be9f81 0xeac41ee5
+ 0xbe5e2e6b 0x177f9068 0xede56c48 0x438b3811
+ 0xd5bd7ee4 0xc027d1a8 0xc1c0f725 0x48d4d4eb
+ 0x6ffa28d5 0xbd6ac9eb 0xd497781d 0x24d3a154
+ 0x409bb5c0 0x8079bf76 0x90a522dc 0x19bf7033
+ 0x1a529b6e 0xe5207e4d 0x3d49b7bc 0x3eca6d54
+ 0xa37681a6 0xaa9a62e4 0xe54aa1e1 0xb91e7157
+ 0x8cce8f65 0xbcbbd62c 0x7fa477b5 0x44f46b50
+ 0x54263fcf 0x529cbb5d 0x8923e390 0x0778d6d7
+ 0x0cc0503f 0x02c374ce 0xb89c3e5c 0x25b1b353
+ 0xb227cb2d 0x44108698 0x5e5968c2 0x82c48632
+ 0x0b8f4209 0x1a241879 0x9edca6f1 0xa1fa51ab
+ 0x206db0c6 0xbfbbbe98 0xa71c91f6 0xa1b28056
+ 0xb8bfaaa9 0xa5914f75 0x77d26574 0xacfd459d
+ 0x77f7cab2 0x249ebf26 0xef902bdd 0x77f6e48d
+ 0x82497035 0x93333a9d 0x34ea9953 0x8f08d41c
+ >;
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h
index 25b938f..a9d7156 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h
@@ -14,9 +14,7 @@
*/
typedef void (*fsp_continuation_f)(u32 status, void *hob_list);
-#pragma pack(1)
-
-struct fsp_init_params_t {
+struct fsp_init_params {
/* Non-volatile storage buffer pointer */
void *nvs_buf;
/* Runtime buffer pointer */
@@ -25,7 +23,7 @@ struct fsp_init_params_t {
fsp_continuation_f continuation;
};
-struct common_buf_t {
+struct common_buf {
/*
* Stack top pointer used by the bootloader. The new stack frame will be
* set up at this location after FspInit API call.
@@ -36,24 +34,22 @@ struct common_buf_t {
u32 reserved[7]; /* Reserved */
};
-enum fsp_phase_t {
+enum fsp_phase {
/* Notification code for post PCI enuermation */
INIT_PHASE_PCI = 0x20,
/* Notification code before transfering control to the payload */
INIT_PHASE_BOOT = 0x40
};
-struct fsp_notify_params_t {
+struct fsp_notify_params {
/* Notification phase used for NotifyPhase API */
- enum fsp_phase_t phase;
+ enum fsp_phase phase;
};
-#pragma pack()
-
/* FspInit API function prototype */
-typedef u32 (*fsp_init_f)(struct fsp_init_params_t *param);
+typedef u32 (*fsp_init_f)(struct fsp_init_params *params);
/* FspNotify API function prototype */
-typedef u32 (*fsp_notify_f)(struct fsp_notify_params_t *param);
+typedef u32 (*fsp_notify_f)(struct fsp_notify_params *params);
#endif
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h
index 1f73680..eaec2b4 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h
@@ -8,10 +8,8 @@
#ifndef __FSP_FFS_H__
#define __FSP_FFS_H__
-#pragma pack(1)
-
/* Used to verify the integrity of the file */
-union ffs_integrity_t {
+union __packed ffs_integrity {
struct {
/*
* The IntegrityCheck.checksum.header field is an 8-bit
@@ -43,14 +41,14 @@ union ffs_integrity_t {
* Each file begins with the header that describe the
* contents and state of the files.
*/
-struct ffs_file_header_t {
+struct __packed ffs_file_header {
/*
* This GUID is the file name.
* It is used to uniquely identify the file.
*/
- struct efi_guid_t name;
+ struct efi_guid name;
/* Used to verify the integrity of the file */
- union ffs_integrity_t integrity;
+ union ffs_integrity integrity;
/* Identifies the type of file */
u8 type;
/* Declares various file attribute bits */
@@ -64,16 +62,16 @@ struct ffs_file_header_t {
u8 state;
};
-struct ffs_file_header2_t {
+struct __packed ffs_file_header2 {
/*
* This GUID is the file name. It is used to uniquely identify the file.
* There may be only one instance of a file with the file name GUID of
* Name in any given firmware volume, except if the file type is
* EFI_FV_FILE_TYPE_FFS_PAD.
*/
- struct efi_guid_t name;
+ struct efi_guid name;
/* Used to verify the integrity of the file */
- union ffs_integrity_t integrity;
+ union ffs_integrity integrity;
/* Identifies the type of file */
u8 type;
/* Declares various file attribute bits */
@@ -81,9 +79,9 @@ struct ffs_file_header2_t {
/*
* The length of the file in bytes, including the FFS header.
* The length of the file data is either
- * (size - sizeof(struct ffs_file_header_t)). This calculation means a
+ * (size - sizeof(struct ffs_file_header)). This calculation means a
* zero-length file has a size of 24 bytes, which is
- * sizeof(struct ffs_file_header_t). Size is not required to be a
+ * sizeof(struct ffs_file_header). Size is not required to be a
* multiple of 8 bytes. Given a file F, the next file header is located
* at the next 8-byte aligned firmware volume offset following the last
* byte of the file F.
@@ -98,7 +96,7 @@ struct ffs_file_header2_t {
* If FFS_ATTRIB_LARGE_FILE is set in attr, then ext_size exists
* and size must be set to zero.
* If FFS_ATTRIB_LARGE_FILE is not set then
- * struct ffs_file_header_t is used.
+ * struct ffs_file_header is used.
*/
u32 ext_size;
};
@@ -129,7 +127,7 @@ struct ffs_file_header2_t {
#define EFI_SECTION_SMM_DEPEX 0x1C
/* Common section header */
-struct raw_section_t {
+struct __packed raw_section {
/*
* A 24-bit unsigned integer that contains the total size of
* the section in bytes, including the EFI_COMMON_SECTION_HEADER.
@@ -138,7 +136,7 @@ struct raw_section_t {
u8 type;
};
-struct raw_section2_t {
+struct __packed raw_section2 {
/*
* A 24-bit unsigned integer that contains the total size of
* the section in bytes, including the EFI_COMMON_SECTION_HEADER.
@@ -153,6 +151,4 @@ struct raw_section2_t {
u32 ext_size;
};
-#pragma pack()
-
#endif
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h
index 01300db..a024451 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h
@@ -63,7 +63,7 @@
#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
-struct fv_blkmap_entry_t {
+struct fv_blkmap_entry {
/* The number of sequential blocks which are of the same size */
u32 num_blocks;
/* The size of the blocks */
@@ -71,7 +71,7 @@ struct fv_blkmap_entry_t {
};
/* Describes the features and layout of the firmware volume */
-struct fv_header_t {
+struct fv_header {
/*
* The first 16 bytes are reserved to allow for the reset vector of
* processors whose reset vector is at address 0.
@@ -81,7 +81,7 @@ struct fv_header_t {
* Declares the file system with which the firmware volume
* is formatted.
*/
- struct efi_guid_t fs_guid;
+ struct efi_guid fs_guid;
/*
* Length in bytes of the complete firmware volume, including
* the header.
@@ -118,18 +118,18 @@ struct fv_header_t {
* An array of run-length encoded FvBlockMapEntry structures.
* The array is terminated with an entry of {0,0}.
*/
- struct fv_blkmap_entry_t block_map[1];
+ struct fv_blkmap_entry block_map[1];
};
-#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H')
+#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H')
/* Firmware Volume Header Revision definition */
#define EFI_FVH_REVISION 0x02
/* Extension header pointed by ExtHeaderOffset of volume header */
-struct fv_ext_header_t {
+struct fv_ext_header {
/* firmware volume name */
- struct efi_guid_t fv_name;
+ struct efi_guid fv_name;
/* Size of the rest of the extension header including this structure */
u32 ext_hdr_size;
};
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h
index 44c0f90..380b64e 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h
@@ -19,14 +19,14 @@
* Describes the format and size of the data inside the HOB.
* All HOBs must contain this generic HOB header.
*/
-struct hob_header_t {
+struct hob_header {
u16 type; /* HOB type */
u16 len; /* HOB length */
u32 reserved; /* always zero */
};
/* Enumeration of memory types introduced in UEFI */
-enum efi_mem_type_t {
+enum efi_mem_type {
EFI_RESERVED_MEMORY_TYPE,
/*
* The code portions of a loaded application.
@@ -87,16 +87,16 @@ enum efi_mem_type_t {
* exist outside the HOB list. This HOB type describes how memory is used,
* not the physical attributes of memory.
*/
-struct hob_mem_alloc_t {
- struct hob_header_t hdr;
+struct hob_mem_alloc {
+ struct hob_header hdr;
/*
* A GUID that defines the memory allocation region's type and purpose,
* as well as other fields within the memory allocation HOB. This GUID
* is used to define the additional data within the HOB that may be
- * present for the memory allocation HOB. Type efi_guid_t is defined in
+ * present for the memory allocation HOB. Type efi_guid is defined in
* InstallProtocolInterface() in the UEFI 2.0 specification.
*/
- struct efi_guid_t name;
+ struct efi_guid name;
/*
* The base address of memory allocated by this HOB.
* Type phys_addr_t is defined in AllocatePages() in the UEFI 2.0
@@ -111,7 +111,7 @@ struct hob_mem_alloc_t {
* Type EFI_MEMORY_TYPE is defined in AllocatePages() in the UEFI 2.0
* specification.
*/
- enum efi_mem_type_t mem_type;
+ enum efi_mem_type mem_type;
/* padding */
u8 reserved[4];
};
@@ -155,14 +155,14 @@ struct hob_mem_alloc_t {
* Describes the resource properties of all fixed, nonrelocatable resource
* ranges found on the processor host bus during the HOB producer phase.
*/
-struct hob_res_desc_t {
- struct hob_header_t hdr;
+struct hob_res_desc {
+ struct hob_header hdr;
/*
* A GUID representing the owner of the resource. This GUID is
* used by HOB consumer phase components to correlate device
* ownership of a resource.
*/
- struct efi_guid_t owner;
+ struct efi_guid owner;
u32 type;
u32 attr;
/* The physical start address of the resource region */
@@ -175,24 +175,24 @@ struct hob_res_desc_t {
* Allows writers of executable content in the HOB producer phase to
* maintain and manage HOBs with specific GUID.
*/
-struct hob_guid_t {
- struct hob_header_t hdr;
+struct hob_guid {
+ struct hob_header hdr;
/* A GUID that defines the contents of this HOB */
- struct efi_guid_t name;
+ struct efi_guid name;
/* GUID specific data goes here */
};
/* Union of all the possible HOB Types */
-union hob_pointers_t {
- struct hob_header_t *hdr;
- struct hob_mem_alloc_t *mem_alloc;
- struct hob_res_desc_t *res_desc;
- struct hob_guid_t *guid;
+union hob_pointers {
+ struct hob_header *hdr;
+ struct hob_mem_alloc *mem_alloc;
+ struct hob_res_desc *res_desc;
+ struct hob_guid *guid;
u8 *raw;
};
/**
- * Returns the type of a HOB.
+ * get_hob_type() - return the type of a HOB
*
* This macro returns the type field from the HOB header for the
* HOB specified by hob.
@@ -201,11 +201,13 @@ union hob_pointers_t {
*
* @return: HOB type.
*/
-#define GET_HOB_TYPE(hob) \
- ((*(struct hob_header_t **)&(hob))->type)
+static inline u16 get_hob_type(union hob_pointers hob)
+{
+ return hob.hdr->type;
+}
/**
- * Returns the length, in bytes, of a HOB.
+ * get_hob_length() - return the length, in bytes, of a HOB
*
* This macro returns the len field from the HOB header for the
* HOB specified by hob.
@@ -214,11 +216,13 @@ union hob_pointers_t {
*
* @return: HOB length.
*/
-#define GET_HOB_LENGTH(hob) \
- ((*(struct hob_header_t **)&(hob))->len)
+static inline u16 get_hob_length(union hob_pointers hob)
+{
+ return hob.hdr->len;
+}
/**
- * Returns a pointer to the next HOB in the HOB list.
+ * get_next_hob() - return a pointer to the next HOB in the HOB list
*
* This macro returns a pointer to HOB that follows the HOB specified by hob
* in the HOB List.
@@ -227,25 +231,31 @@ union hob_pointers_t {
*
* @return: A pointer to the next HOB in the HOB list.
*/
-#define GET_NEXT_HOB(hob) \
- (void *)(*(u8 **)&(hob) + GET_HOB_LENGTH(hob))
+static inline void *get_next_hob(union hob_pointers hob)
+{
+ return (void *)(*(u8 **)&(hob) + get_hob_length(hob));
+}
/**
- * Determines if a HOB is the last HOB in the HOB list.
+ * end_of_hob() - determine if a HOB is the last HOB in the HOB list
*
* This macro determine if the HOB specified by hob is the last HOB in the
- * HOB list. If hob is last HOB in the HOB list, then TRUE is returned.
- * Otherwise, FALSE is returned.
+ * HOB list. If hob is last HOB in the HOB list, then true is returned.
+ * Otherwise, false is returned.
*
* @hob: A pointer to a HOB.
*
- * @retval TRUE: The HOB specified by hob is the last HOB in the HOB list.
- * @retval FALSE: The HOB specified by hob is not the last HOB in the HOB list.
+ * @retval true: The HOB specified by hob is the last HOB in the HOB list.
+ * @retval false: The HOB specified by hob is not the last HOB in the HOB list.
*/
-#define END_OF_HOB(hob) (GET_HOB_TYPE(hob) == (u16)HOB_TYPE_EOH)
+static inline bool end_of_hob(union hob_pointers hob)
+{
+ return get_hob_type(hob) == HOB_TYPE_EOH;
+}
/**
- * Returns a pointer to data buffer from a HOB of type HOB_TYPE_GUID_EXT.
+ * get_guid_hob_data() - return a pointer to data buffer from a HOB of
+ * type HOB_TYPE_GUID_EXT
*
* This macro returns a pointer to the data buffer in a HOB specified by hob.
* hob is assumed to be a HOB of type HOB_TYPE_GUID_EXT.
@@ -254,11 +264,14 @@ union hob_pointers_t {
*
* @return: A pointer to the data buffer in a HOB.
*/
-#define GET_GUID_HOB_DATA(hob) \
- (void *)(*(u8 **)&(hob) + sizeof(struct hob_guid_t))
+static inline void *get_guid_hob_data(u8 *hob)
+{
+ return (void *)(hob + sizeof(struct hob_guid));
+}
/**
- * Returns the size of the data buffer from a HOB of type HOB_TYPE_GUID_EXT.
+ * get_guid_hob_data_size() - return the size of the data buffer from a HOB
+ * of type HOB_TYPE_GUID_EXT
*
* This macro returns the size, in bytes, of the data buffer in a HOB
* specified by hob. hob is assumed to be a HOB of type HOB_TYPE_GUID_EXT.
@@ -267,14 +280,31 @@ union hob_pointers_t {
*
* @return: The size of the data buffer.
*/
-#define GET_GUID_HOB_DATA_SIZE(hob) \
- (u16)(GET_HOB_LENGTH(hob) - sizeof(struct hob_guid_t))
+static inline u16 get_guid_hob_data_size(u8 *hob)
+{
+ union hob_pointers hob_p = *(union hob_pointers *)hob;
+ return get_hob_length(hob_p) - sizeof(struct hob_guid);
+}
/* FSP specific GUID HOB definitions */
+#define FSP_GUID_DATA1 0x912740be
+#define FSP_GUID_DATA2 0x2284
+#define FSP_GUID_DATA3 0x4734
+#define FSP_GUID_DATA4_0 0xb9
+#define FSP_GUID_DATA4_1 0x71
+#define FSP_GUID_DATA4_2 0x84
+#define FSP_GUID_DATA4_3 0xb0
+#define FSP_GUID_DATA4_4 0x27
+#define FSP_GUID_DATA4_5 0x35
+#define FSP_GUID_DATA4_6 0x3f
+#define FSP_GUID_DATA4_7 0x0c
+
#define FSP_HEADER_GUID \
{ \
- 0x912740be, 0x2284, 0x4734, \
- {0xb9, 0x71, 0x84, 0xb0, 0x27, 0x35, 0x3f, 0x0c} \
+ FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \
+ { FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \
+ FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \
+ FSP_GUID_DATA4_6, FSP_GUID_DATA4_7 } \
}
#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h
index ad78bcd..4a4d627 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h
@@ -10,9 +10,7 @@
#define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */
-#pragma pack(1)
-
-struct fsp_header_t {
+struct __packed fsp_header {
u32 sign; /* 'FSPH' */
u32 hdr_len; /* header length */
u8 reserved1[3];
@@ -31,6 +29,4 @@ struct fsp_header_t {
u32 reserved2;
};
-#pragma pack()
-
#endif
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h
index a7b6e6b..61286ce 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h
@@ -8,12 +8,8 @@
#ifndef __FSP_PLATFORM_H__
#define __FSP_PLATFORM_H__
-#pragma pack(1)
-
-struct fspinit_rtbuf_t {
- struct common_buf_t common; /* FSP common runtime data structure */
+struct fspinit_rtbuf {
+ struct common_buf common; /* FSP common runtime data structure */
};
-#pragma pack()
-
#endif
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h
index 3296a2b..3ae1b66 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h
@@ -18,14 +18,30 @@
#include "fsp_bootmode.h"
#include "fsp_vpd.h"
-struct shared_data_t {
- struct fsp_header_t *fsp_hdr;
+struct shared_data {
+ struct fsp_header *fsp_hdr;
u32 *stack_top;
- struct upd_region_t fsp_upd;
+ struct upd_region fsp_upd;
};
+#define FSP_LOWMEM_BASE 0x100000UL
+#define FSP_HIGHMEM_BASE 0x100000000ULL
+
+/**
+ * FSP Continuation assembly helper routine
+ *
+ * This routine jumps to the C version of FSP continuation function
+ */
void asm_continuation(void);
+/**
+ * FSP initialization complete
+ *
+ * This is the function that indicates FSP initialization is complete and jumps
+ * back to the bootloader with HOB list pointer as the parameter.
+ *
+ * @hob_list: HOB list pointer
+ */
void fsp_init_done(void *hob_list);
/**
@@ -37,19 +53,12 @@ void fsp_init_done(void *hob_list);
*
* @retval: Never returns
*/
-void fsp_continue(struct shared_data_t *shared_data, u32 status,
+void fsp_continue(struct shared_data *shared_data, u32 status,
void *hob_list);
/**
* Find FSP header offset in FSP image
*
- * If this function is called before the a stack is established, special care
- * must be taken. First, it cannot declare any local variable using stack.
- * Only register variable can be used here. Secondly, some compiler version
- * will add prolog or epilog code for the C function. If so the function call
- * may not work before stack is ready. GCC 4.8.1 has been verified to be
- * working for the following code.
- *
* @retval: the offset of FSP header. If signature is invalid, returns 0.
*/
u32 find_fsp_header(void);
@@ -67,11 +76,11 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf);
* FSP notification wrapper function
*
* @fsp_hdr: Pointer to FSP information header
- * @phase: FSP initialization phase defined in enum fsp_phase_t
+ * @phase: FSP initialization phase defined in enum fsp_phase
*
* @retval: compatible status code with EFI_STATUS defined in PI spec
*/
-u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase);
+u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase);
/**
* This function retrieves the top of usable low memory.
@@ -80,7 +89,7 @@ u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase);
*
* @retval: Usable low memory top.
*/
-u32 get_usable_lowmem_top(const void *hob_list);
+u32 fsp_get_usable_lowmem_top(const void *hob_list);
/**
* This function retrieves the top of usable high memory.
@@ -89,7 +98,7 @@ u32 get_usable_lowmem_top(const void *hob_list);
*
* @retval: Usable high memory top.
*/
-u64 get_usable_highmem_top(const void *hob_list);
+u64 fsp_get_usable_highmem_top(const void *hob_list);
/**
* This function retrieves a special reserved memory region.
@@ -102,8 +111,8 @@ u64 get_usable_highmem_top(const void *hob_list);
* @retval: Reserved region start address.
* 0 if this region does not exist.
*/
-u64 get_fsp_reserved_mem_from_guid(const void *hob_list,
- u64 *len, struct efi_guid_t *guid);
+u64 fsp_get_reserved_mem_from_guid(const void *hob_list,
+ u64 *len, struct efi_guid *guid);
/**
* This function retrieves the FSP reserved normal memory.
@@ -114,7 +123,7 @@ u64 get_fsp_reserved_mem_from_guid(const void *hob_list,
* @retval: FSP reserved memory base
* 0 if this region does not exist.
*/
-u32 get_fsp_reserved_mem(const void *hob_list, u32 *len);
+u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len);
/**
* This function retrieves the TSEG reserved normal memory.
@@ -126,7 +135,7 @@ u32 get_fsp_reserved_mem(const void *hob_list, u32 *len);
* @retval NULL: Failed to find the TSEG reserved memory.
* @retval others: TSEG reserved memory base.
*/
-u32 get_tseg_reserved_mem(const void *hob_list, u32 *len);
+u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len);
/**
* Returns the next instance of a HOB type from the starting HOB.
@@ -136,7 +145,7 @@ u32 get_tseg_reserved_mem(const void *hob_list, u32 *len);
*
* @retval: A HOB object with matching type; Otherwise NULL.
*/
-void *get_next_hob(u16 type, const void *hob_list);
+void *fsp_get_next_hob(u16 type, const void *hob_list);
/**
* Returns the next instance of the matched GUID HOB from the starting HOB.
@@ -146,7 +155,7 @@ void *get_next_hob(u16 type, const void *hob_list);
*
* @retval: A HOB object with matching GUID; Otherwise NULL.
*/
-void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list);
+void *fsp_get_next_guid_hob(const struct efi_guid *guid, const void *hob_list);
/**
* This function retrieves a GUID HOB data buffer and size.
@@ -159,8 +168,8 @@ void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list);
* @retval NULL: Failed to find the GUID HOB.
* @retval others: GUID HOB data buffer pointer.
*/
-void *get_guid_hob_data(const void *hob_list, u32 *len,
- struct efi_guid_t *guid);
+void *fsp_get_guid_hob_data(const void *hob_list, u32 *len,
+ struct efi_guid *guid);
/**
* This function retrieves FSP Non-volatile Storage HOB buffer and size.
@@ -172,7 +181,7 @@ void *get_guid_hob_data(const void *hob_list, u32 *len,
* @retval NULL: Failed to find the NVS HOB.
* @retval others: FSP NVS data buffer pointer.
*/
-void *get_fsp_nvs_data(const void *hob_list, u32 *len);
+void *fsp_get_nvs_data(const void *hob_list, u32 *len);
/**
* This function retrieves Bootloader temporary stack buffer and size.
@@ -184,15 +193,15 @@ void *get_fsp_nvs_data(const void *hob_list, u32 *len);
* @retval NULL: Failed to find the bootloader temporary stack HOB.
* @retval others: Bootloader temporary stackbuffer pointer.
*/
-void *get_bootloader_tmp_mem(const void *hob_list, u32 *len);
+void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len);
/**
* This function overrides the default configurations in the UPD data region.
*
- * @fsp_upd: A pointer to the upd_region_t data strcture
+ * @fsp_upd: A pointer to the upd_region data strcture
*
* @return: None
*/
-void update_fsp_upd(struct upd_region_t *fsp_upd);
+void update_fsp_upd(struct upd_region *fsp_upd);
#endif
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h
index 12ebbfd..f32d827 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h
@@ -8,20 +8,8 @@
#ifndef __FSP_TYPES_H__
#define __FSP_TYPES_H__
-/*
- * Boolean true value. UEFI Specification defines this value to be 1,
- * but this form is more portable.
- */
-#define TRUE ((unsigned char)(1 == 1))
-
-/*
- * Boolean false value. UEFI Specification defines this value to be 0,
- * but this form is more portable.
- */
-#define FALSE ((unsigned char)(0 == 1))
-
/* 128 bit buffer containing a unique identifier value */
-struct efi_guid_t {
+struct efi_guid {
u32 data1;
u16 data2;
u16 data3;
@@ -80,9 +68,6 @@ struct efi_guid_t {
#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
(SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32))
-/* Assertion for debug */
-#define ASSERT(exp) do { if (!(exp)) for (;;); } while (FALSE)
-
/*
* Define FSP API return status code.
* Compatiable with EFI_STATUS defined in PI Spec.
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h
index 11cc32f..bce58b1 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h
@@ -10,9 +10,9 @@
#ifndef __VPDHEADER_H__
#define __VPDHEADER_H__
-#pragma pack(1)
+#define UPD_TERMINATOR 0x55AA
-struct upd_region_t {
+struct __packed upd_region {
u64 sign; /* Offset 0x0000 */
u64 reserved; /* Offset 0x0008 */
u8 dummy[240]; /* Offset 0x0010 */
@@ -39,7 +39,7 @@ struct upd_region_t {
#define VPD_IMAGE_ID 0x445056574F4E4E4D /* 'MNNOWVPD' */
#define VPD_IMAGE_REV 0x00000301
-struct vpd_region_t {
+struct __packed vpd_region {
u64 sign; /* Offset 0x0000 */
u32 img_rev; /* Offset 0x0008 */
u32 upd_offset; /* Offset 0x000C */
@@ -53,6 +53,4 @@ struct vpd_region_t {
u8 pcie_port_ioh; /* Offset 0x0029 */
};
-#pragma pack()
-
#endif
diff --git a/arch/x86/include/asm/arch-queensbay/gpio.h b/arch/x86/include/asm/arch-queensbay/gpio.h
new file mode 100644
index 0000000..ab4e059
--- /dev/null
+++ b/arch/x86/include/asm/arch-queensbay/gpio.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _X86_ARCH_GPIO_H_
+#define _X86_ARCH_GPIO_H_
+
+/* Where in config space is the register that points to the GPIO registers? */
+#define PCI_CFG_GPIOBASE 0x44
+
+#endif /* _X86_ARCH_GPIO_H_ */
diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
new file mode 100644
index 0000000..67c5e05
--- /dev/null
+++ b/arch/x86/include/asm/arch-queensbay/tnc.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _X86_ARCH_TNC_H_
+#define _X86_ARCH_TNC_H_
+
+#include <pci.h>
+
+/* PCI Configuration Space (D31:F0): LPC */
+#define PCH_LPC_DEV PCI_BDF(0, 0x1f, 0)
+
+#endif /* _X86_ARCH_TNC_H_ */
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 1787e52..1099427 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -11,7 +11,7 @@
#include <asm-generic/gpio.h>
struct ich6_bank_platdata {
- uint32_t base_addr;
+ uint16_t base_addr;
const char *bank_name;
};
@@ -147,7 +147,7 @@ struct pch_gpio_map {
} set3;
};
-void setup_pch_gpios(u32 gpiobase, const struct pch_gpio_map *gpio);
+void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
#endif /* _X86_GPIO_H_ */
diff --git a/arch/x86/include/asm/ibmpc.h b/arch/x86/include/asm/ibmpc.h
index e6d183b..c3b5187 100644
--- a/arch/x86/include/asm/ibmpc.h
+++ b/arch/x86/include/asm/ibmpc.h
@@ -18,4 +18,7 @@
#define SYSCTLA 0x92
#define SLAVE_PIC 0xa0
+#define UART0_BASE 0x3f8
+#define UART1_BASE 0x2f8
+
#endif
diff --git a/arch/x86/lib/cmd_hob.c b/arch/x86/lib/cmd_hob.c
index 2fdff2b..b552fe6 100644
--- a/arch/x86/lib/cmd_hob.c
+++ b/arch/x86/lib/cmd_hob.c
@@ -17,18 +17,18 @@ static char *hob_type[] = {
"Memory Allocation",
"Resource Descriptor",
"GUID Extension",
- "Firmware Volumn",
+ "Firmware Volume",
"CPU",
"Memory Pool",
"reserved",
- "Firmware Volumn 2",
+ "Firmware Volume 2",
"Load PEIM Unused",
"UEFI Capsule",
};
int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- union hob_pointers_t hob;
+ union hob_pointers hob;
u16 type;
char *desc;
int i = 0;
@@ -39,29 +39,27 @@ int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
printf("No. | Address | Type | Length in Bytes\n");
printf("----|----------|---------------------|----------------\n");
- while (!END_OF_HOB(hob)) {
+ while (!end_of_hob(hob)) {
printf("%-3d | %08x | ", i, (unsigned int)hob.raw);
- type = hob.hdr->type;
+ type = get_hob_type(hob);
if (type == HOB_TYPE_UNUSED)
desc = "*Unused*";
else if (type == HOB_TYPE_EOH)
- desc = "**END OF HOB**";
+ desc = "*END OF HOB*";
else if (type >= 0 && type <= ARRAY_SIZE(hob_type))
desc = hob_type[type];
else
- desc = "!!!Invalid Type!!!";
- printf("%-19s | %-15d\n", desc, hob.hdr->len);
- hob.raw = GET_NEXT_HOB(hob);
+ desc = "*Invalid Type*";
+ printf("%-19s | %-15d\n", desc, get_hob_length(hob));
+ hob.raw = get_next_hob(hob);
i++;
}
return 0;
}
-/* -------------------------------------------------------------------- */
-
U_BOOT_CMD(
hob, 1, 1, do_hob,
- "print FSP Hand-Off Block information",
+ "print Firmware Support Package (FSP) Hand-Off Block information",
""
);
diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c
index b260f9a..154faf6 100644
--- a/board/coreboot/coreboot/coreboot.c
+++ b/board/coreboot/coreboot/coreboot.c
@@ -16,7 +16,7 @@ int arch_early_init_r(void)
return 0;
}
-void setup_pch_gpios(u32 gpiobase, const struct pch_gpio_map *gpio)
+void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
{
return;
}
diff --git a/board/google/chromebook_link/link.c b/board/google/chromebook_link/link.c
index 4d95c1c..9978e92 100644
--- a/board/google/chromebook_link/link.c
+++ b/board/google/chromebook_link/link.c
@@ -125,7 +125,7 @@ int board_early_init_f(void)
return 0;
}
-void setup_pch_gpios(u32 gpiobase, const struct pch_gpio_map *gpio)
+void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
{
/* GPIO Set 1 */
if (gpio->set1.level)
diff --git a/board/intel/crownbay/Kconfig b/board/intel/crownbay/Kconfig
new file mode 100644
index 0000000..4709f9b
--- /dev/null
+++ b/board/intel/crownbay/Kconfig
@@ -0,0 +1,20 @@
+if TARGET_CROWNBAY
+
+config SYS_BOARD
+ default "crownbay"
+
+config SYS_VENDOR
+ default "intel"
+
+config SYS_SOC
+ default "queensbay"
+
+config SYS_CONFIG_NAME
+ default "crownbay"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select INTEL_QUEENSBAY
+ select BOARD_ROMSIZE_KB_1024
+
+endif
diff --git a/board/intel/crownbay/MAINTAINERS b/board/intel/crownbay/MAINTAINERS
new file mode 100644
index 0000000..1eb6869
--- /dev/null
+++ b/board/intel/crownbay/MAINTAINERS
@@ -0,0 +1,6 @@
+INTEL CROWNBAY BOARD
+M: Bin Meng <bmeng.cn@gmail.com>
+S: Maintained
+F: board/intel/crownbay/
+F: include/configs/crownbay.h
+F: configs/crownbay_defconfig
diff --git a/board/intel/crownbay/Makefile b/board/intel/crownbay/Makefile
new file mode 100644
index 0000000..aeb219b
--- /dev/null
+++ b/board/intel/crownbay/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += crownbay.o start.o
diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c
new file mode 100644
index 0000000..2a254ef
--- /dev/null
+++ b/board/intel/crownbay/crownbay.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/ibmpc.h>
+#include <asm/pnp_def.h>
+#include <netdev.h>
+#include <smsc_lpc47m.h>
+
+#define SERIAL_DEV PNP_DEV(0x2e, 4)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+ lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
+
+ return 0;
+}
+
+void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
+{
+ return;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
diff --git a/board/intel/crownbay/start.S b/board/intel/crownbay/start.S
new file mode 100644
index 0000000..cf92b4c
--- /dev/null
+++ b/board/intel/crownbay/start.S
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+.globl early_board_init
+early_board_init:
+ jmp early_board_init_ret
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
new file mode 100644
index 0000000..ce90553
--- /dev/null
+++ b/configs/crownbay_defconfig
@@ -0,0 +1,6 @@
+CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000"
+CONFIG_X86=y
+CONFIG_TARGET_CROWNBAY=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_SEPARATE=y
+CONFIG_DEFAULT_DEVICE_TREE="crownbay"
diff --git a/doc/README.x86 b/doc/README.x86
new file mode 100644
index 0000000..5fab044
--- /dev/null
+++ b/doc/README.x86
@@ -0,0 +1,126 @@
+#
+# Copyright (C) 2014, Simon Glass <sjg@chromium.org>
+# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+U-Boot on x86
+=============
+
+This document describes the information about U-Boot running on x86 targets,
+including supported boards, build instructions, todo list, etc.
+
+Status
+------
+U-Boot supports running as a coreboot [1] payload on x86. So far only Link
+(Chromebook Pixel) has been tested, but it should work with minimal adjustments
+on other x86 boards since coreboot deals with most of the low-level details.
+
+U-Boot also supports booting directly from x86 reset vector without coreboot,
+aka raw support or bare support. Currently Link and Intel Crown Bay board
+support running U-Boot 'bare metal'.
+
+As for loading OS, U-Boot supports directly booting a 32-bit or 64-bit Linux
+kernel as part of a FIT image. It also supports a compressed zImage.
+
+Build Instructions
+------------------
+Building U-Boot as a coreboot payload is just like building U-Boot for targets
+on other architectures, like below:
+
+$ make coreboot-x86_defconfig
+$ make all
+
+Building ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
+little bit tricky, as generally it requires several binary blobs which are not
+shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is
+not turned on by default in the U-Boot source tree. Firstly, you need turn it
+on by uncommenting the following line in the main U-Boot Makefile:
+
+# ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom
+
+Link-specific instructions:
+
+First, you need the following binary blobs:
+
+* descriptor.bin - Intel flash descriptor
+* me.bin - Intel Management Engine
+* mrc.bin - Memory Reference Code, which sets up SDRAM
+* video ROM - sets up the display
+
+You can get these binary blobs by:
+
+$ git clone http://review.coreboot.org/p/blobs.git
+$ cd blobs
+
+Find the following files:
+
+* ./mainboard/google/link/descriptor.bin
+* ./mainboard/google/link/me.bin
+* ./northbridge/intel/sandybridge/systemagent-ivybridge.bin
+
+The 3rd one should be renamed to mrc.bin.
+As for the video ROM, you can get it here [2].
+Make sure all these binary blobs are put in the board directory.
+
+Now you can build U-Boot and obtain u-boot.rom:
+
+$ make chromebook_link_defconfig
+$ make all
+
+Intel Crown Bay specific instructions:
+
+U-Boot support of Intel Crown Bay board [3] relies on a binary blob called
+Firmware Support Package [4] to perform all the necessary initialization steps
+as documented in the BIOS Writer Guide, including initialization of the CPU,
+memory controller, chipset and certain bus interfaces.
+
+Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T,
+install it on your host and locate the FSP binary blob. Note this platform
+also requires a Chipset Micro Code (CMC) state machine binary to be present in
+the SPI flash where u-boot.rom resides, and this CMC binary blob can be found
+in this FSP package too.
+
+* ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd
+* ./Microcode/C0_22211.BIN
+
+Rename the first one to fsp.bin and second one to cmc.bin and put them in the
+board directory.
+
+Now you can build U-Boot and obtaim u-boot.rom
+
+$ make crownbay_defconfig
+$ make all
+
+CPU Microcode
+-------------
+Modern CPU usually requires a special bit stream called microcode [5] to be
+loaded on the processor after power up in order to function properly. U-Boot
+has already integrated these as hex dumps in the source tree.
+
+Driver Model
+------------
+x86 has been converted to use driver model for serial and GPIO.
+
+Device Tree
+-----------
+x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to
+be turned on. Not every device on the board is configured via devie tree, but
+more and more devices will be added as time goes by. Check out the directory
+arch/x86/dts/ for these device tree source files.
+
+TODO List
+---------
+- MTRR support (for performance)
+- Audio
+- Chrome OS verified boot
+- SMI and ACPI support, to provide platform info and facilities to Linux
+
+References
+----------
+[1] http://www.coreboot.org
+[2] http://www.coreboot.org/~stepan/pci8086,0166.rom
+[3] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
+[4] http://www.intel.com/fsp
+[5] http://en.wikipedia.org/wiki/Microcode
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 3433216..7720cc3 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -39,9 +39,9 @@
struct ich6_bank_priv {
/* These are I/O addresses */
- uint32_t use_sel;
- uint32_t io_sel;
- uint32_t lvl;
+ uint16_t use_sel;
+ uint16_t io_sel;
+ uint16_t lvl;
};
/* TODO: Move this to device tree, or platform data */
@@ -57,7 +57,7 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
u8 tmpbyte;
u16 tmpword;
u32 tmplong;
- u32 gpiobase;
+ u16 gpiobase;
int offset;
/* Where should it be? */
@@ -116,11 +116,15 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
/*
* GPIOBASE moved to its current offset with ICH6, but prior to
* that it was unused (or undocumented). Check that it looks
- * okay: not all ones or zeros, and mapped to I/O space (bit 0).
+ * okay: not all ones or zeros.
+ *
+ * Note we don't need check bit0 here, because the Tunnel Creek
+ * GPIO base address register bit0 is reserved (read returns 0),
+ * while on the Ivybridge the bit0 is used to indicate it is an
+ * I/O space.
*/
tmplong = pci_read_config32(pci_dev, PCI_CFG_GPIOBASE);
- if (tmplong == 0x00000000 || tmplong == 0xffffffff ||
- !(tmplong & 0x00000001)) {
+ if (tmplong == 0x00000000 || tmplong == 0xffffffff) {
debug("%s: unexpected GPIOBASE value\n", __func__);
return -ENODEV;
}
@@ -131,7 +135,7 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
* at the offset that we just read. Bit 0 indicates that it's
* an I/O address, not a memory address, so mask that off.
*/
- gpiobase = tmplong & 0xfffffffe;
+ gpiobase = tmplong & 0xfffe;
offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", -1);
if (offset == -1) {
debug("%s: Invalid register offset %d\n", __func__, offset);
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8c84942..4cc00cd 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -43,7 +43,7 @@ obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o
obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o
-obj-$(CONFIG_COREBOOT_SERIAL) += serial_coreboot.o
+obj-$(CONFIG_X86_SERIAL) += serial_x86.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_x86.c
index 5c6a76c..e81e035 100644
--- a/drivers/serial/serial_coreboot.c
+++ b/drivers/serial/serial_x86.c
@@ -9,12 +9,12 @@
#include <ns16550.h>
#include <serial.h>
-static const struct udevice_id coreboot_serial_ids[] = {
- { .compatible = "coreboot-uart" },
+static const struct udevice_id x86_serial_ids[] = {
+ { .compatible = "x86-uart" },
{ }
};
-static int coreboot_serial_ofdata_to_platdata(struct udevice *dev)
+static int x86_serial_ofdata_to_platdata(struct udevice *dev)
{
struct ns16550_platdata *plat = dev_get_platdata(dev);
int ret;
@@ -27,10 +27,10 @@ static int coreboot_serial_ofdata_to_platdata(struct udevice *dev)
return 0;
}
U_BOOT_DRIVER(serial_ns16550) = {
- .name = "serial_coreboot",
+ .name = "serial_x86",
.id = UCLASS_SERIAL,
- .of_match = coreboot_serial_ids,
- .ofdata_to_platdata = coreboot_serial_ofdata_to_platdata,
+ .of_match = x86_serial_ids,
+ .ofdata_to_platdata = x86_serial_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
.priv_auto_alloc_size = sizeof(struct NS16550),
.probe = ns16550_serial_probe,
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 645b31c..8930210 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -25,10 +25,10 @@
#define CONFIG_X86_RESET_VECTOR
#define CONFIG_NR_DRAM_BANKS 8
-#define CONFIG_X86_MRC_START 0xfffa0000
+#define CONFIG_X86_MRC_ADDR 0xfffa0000
#define CONFIG_CACHE_MRC_SIZE_KB 512
-#define CONFIG_COREBOOT_SERIAL
+#define CONFIG_X86_SERIAL
#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
@@ -39,7 +39,7 @@
{PCI_VENDOR_ID_INTEL, \
PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
-#define CONFIG_X86_OPTION_ROM_FILENAME pci8086,0166.bin
+#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin
#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000
#define CONFIG_VIDEO_X86
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 2581380..990a2d1 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -49,7 +49,7 @@
{PCI_VENDOR_ID_INTEL, \
PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
-#define CONFIG_COREBOOT_SERIAL
+#define CONFIG_X86_SERIAL
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
"stdout=vga,serial,cbmem\0" \
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
new file mode 100644
index 0000000..eadb339
--- /dev/null
+++ b/include/configs/crownbay.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+#define CONFIG_SYS_MONITOR_LEN (1 << 20)
+#define CONFIG_SYS_X86_START16 0xfffff800
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#define CONFIG_X86_RESET_VECTOR
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_X86_SERIAL
+#define CONFIG_SMSC_LPC47M
+
+#define CONFIG_PCI_MEM_BUS 0x40000000
+#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE 0x80000000
+
+#define CONFIG_PCI_PREF_BUS 0xc0000000
+#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
+#define CONFIG_PCI_PREF_SIZE 0x20000000
+
+#define CONFIG_PCI_IO_BUS 0x2000
+#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE 0xe000
+
+#define CONFIG_SYS_EARLY_PCI_INIT
+#define CONFIG_PCI_PNP
+#define CONFIG_E1000
+
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0"
+
+#define CONFIG_SCSI_DEV_LIST \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
+
+#define CONFIG_SPI_FLASH_SST
+
+#define CONFIG_MMC
+#define CONFIG_SDHCI
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC_SDMA
+#define CONFIG_CMD_MMC
+
+/* Video is not supported */
+#undef CONFIG_VIDEO
+#undef CONFIG_CFB_CONSOLE
+
+#endif /* __CONFIG_H */
diff --git a/tools/Makefile b/tools/Makefile
index a4216a1..e549f8e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -126,6 +126,7 @@ hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl
hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl
HOSTCFLAGS_mkexynosspl.o := -pedantic
+ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o
hostprogs-$(CONFIG_X86) += ifdtool
hostprogs-$(CONFIG_MX23) += mxsboot
diff --git a/tools/ifdtool.c b/tools/ifdtool.c
index 4a27b82..fe8366b 100644
--- a/tools/ifdtool.c
+++ b/tools/ifdtool.c
@@ -18,6 +18,7 @@
#include <unistd.h>
#include <sys/types.h>
#include <sys/stat.h>
+#include <libfdt.h>
#include "ifdtool.h"
#undef DEBUG
@@ -32,6 +33,18 @@
#define FLREG_BASE(reg) ((reg & 0x00000fff) << 12);
#define FLREG_LIMIT(reg) (((reg & 0x0fff0000) >> 4) | 0xfff);
+enum input_file_type_t {
+ IF_normal,
+ IF_fdt,
+ IF_uboot,
+};
+
+struct input_file {
+ char *fname;
+ unsigned int addr;
+ enum input_file_type_t type;
+};
+
/**
* find_fd() - Find the flash description in the ROM image
*
@@ -54,7 +67,8 @@ static struct fdbar_t *find_fd(char *image, int size)
return NULL;
}
- debug("Found Flash Descriptor signature at 0x%08x\n", i);
+ debug("Found Flash Descriptor signature at 0x%08lx\n",
+ (char *)ptr - image);
return (struct fdbar_t *)ptr;
}
@@ -464,6 +478,16 @@ static int write_regions(char *image, int size)
return ret;
}
+static int perror_fname(const char *fmt, const char *fname)
+{
+ char msg[strlen(fmt) + strlen(fname) + 1];
+
+ sprintf(msg, fmt, fname);
+ perror(msg);
+
+ return -1;
+}
+
/**
* write_image() - Write the image to a file
*
@@ -480,10 +504,10 @@ static int write_image(char *filename, char *image, int size)
new_fd = open(filename, O_WRONLY | O_CREAT | O_TRUNC, S_IRUSR |
S_IWUSR | S_IRGRP | S_IROTH);
- if (write(new_fd, image, size) != size) {
- perror("Error while writing");
- return -1;
- }
+ if (new_fd < 0)
+ return perror_fname("Could not open file '%s'", filename);
+ if (write(new_fd, image, size) != size)
+ return perror_fname("Could not write file '%s'", filename);
close(new_fd);
return 0;
@@ -585,14 +609,10 @@ int open_for_read(const char *fname, int *sizep)
int fd = open(fname, O_RDONLY);
struct stat buf;
- if (fd == -1) {
- perror("Could not open file");
- return -1;
- }
- if (fstat(fd, &buf) == -1) {
- perror("Could not stat file");
- return -1;
- }
+ if (fd == -1)
+ return perror_fname("Could not open file '%s'", fname);
+ if (fstat(fd, &buf) == -1)
+ return perror_fname("Could not stat file '%s'", fname);
*sizep = buf.st_size;
debug("File %s is %d bytes\n", fname, *sizep);
@@ -686,7 +706,7 @@ int inject_region(char *image, int size, int region_type, char *region_fname)
* 0xffffffff so use an address relative to that. For an
* 8MB ROM the start address is 0xfff80000.
* @write_fname: Filename to add to the image
- * @return 0 if OK, -ve on error
+ * @return number of bytes written if OK, -ve on error
*/
static int write_data(char *image, int size, unsigned int addr,
const char *write_fname)
@@ -698,7 +718,7 @@ static int write_data(char *image, int size, unsigned int addr,
if (write_fd < 0)
return write_fd;
- offset = addr + size;
+ offset = (uint32_t)(addr + size);
debug("Writing %s to offset %#x\n", write_fname, offset);
if (offset < 0 || offset + write_size > size) {
@@ -714,6 +734,68 @@ static int write_data(char *image, int size, unsigned int addr,
close(write_fd);
+ return write_size;
+}
+
+/**
+ * write_uboot() - Write U-Boot, device tree and microcode pointer
+ *
+ * This writes U-Boot into a place in the flash, followed by its device tree.
+ * The microcode pointer is written so that U-Boot can find the microcode in
+ * the device tree very early in boot.
+ *
+ * @image: Pointer to image
+ * @size: Size of image in bytes
+ * @uboot: Input file information for u-boot.bin
+ * @fdt: Input file information for u-boot.dtb
+ * @ucode_ptr: Address in U-Boot where the microcode pointer should be placed
+ * @return 0 if OK, -ve on error
+ */
+static int write_uboot(char *image, int size, struct input_file *uboot,
+ struct input_file *fdt, unsigned int ucode_ptr)
+{
+ const void *blob;
+ const char *data;
+ int uboot_size;
+ uint32_t *ptr;
+ int data_size;
+ int offset;
+ int node;
+ int ret;
+
+ uboot_size = write_data(image, size, uboot->addr, uboot->fname);
+ if (uboot_size < 0)
+ return uboot_size;
+ fdt->addr = uboot->addr + uboot_size;
+ debug("U-Boot size %#x, FDT at %#x\n", uboot_size, fdt->addr);
+ ret = write_data(image, size, fdt->addr, fdt->fname);
+ if (ret < 0)
+ return ret;
+
+ if (ucode_ptr) {
+ blob = (void *)image + (uint32_t)(fdt->addr + size);
+ debug("DTB at %lx\n", (char *)blob - image);
+ node = fdt_node_offset_by_compatible(blob, 0,
+ "intel,microcode");
+ if (node < 0) {
+ debug("No microcode found in FDT: %s\n",
+ fdt_strerror(node));
+ return -ENOENT;
+ }
+ data = fdt_getprop(blob, node, "data", &data_size);
+ if (!data) {
+ debug("No microcode data found in FDT: %s\n",
+ fdt_strerror(data_size));
+ return -ENOENT;
+ }
+ offset = ucode_ptr - uboot->addr;
+ ptr = (void *)image + offset;
+ ptr[0] = uboot->addr + (data - image);
+ ptr[1] = data_size;
+ debug("Wrote microcode pointer at %x: addr=%x, size=%x\n",
+ ucode_ptr, ptr[0], ptr[1]);
+ }
+
return 0;
}
@@ -783,8 +865,7 @@ int main(int argc, char *argv[])
char *desc_fname = NULL, *addr_str = NULL;
int region_type = -1, inputfreq = 0;
enum spi_frequency spifreq = SPI_FREQUENCY_20MHZ;
- unsigned int addr[WRITE_MAX];
- char *wr_fname[WRITE_MAX];
+ struct input_file input_file[WRITE_MAX], *ifile, *fdt = NULL;
unsigned char wr_idx, wr_num = 0;
int rom_size = -1;
bool write_it;
@@ -792,6 +873,8 @@ int main(int argc, char *argv[])
char *outfile = NULL;
struct stat buf;
int size = 0;
+ unsigned int ucode_ptr = 0;
+ bool have_uboot = false;
int bios_fd;
char *image;
int ret;
@@ -801,18 +884,21 @@ int main(int argc, char *argv[])
{"descriptor", 1, NULL, 'D'},
{"em100", 0, NULL, 'e'},
{"extract", 0, NULL, 'x'},
+ {"fdt", 1, NULL, 'f'},
{"inject", 1, NULL, 'i'},
{"lock", 0, NULL, 'l'},
+ {"microcode", 1, NULL, 'm'},
{"romsize", 1, NULL, 'r'},
{"spifreq", 1, NULL, 's'},
{"unlock", 0, NULL, 'u'},
+ {"uboot", 1, NULL, 'U'},
{"write", 1, NULL, 'w'},
{"version", 0, NULL, 'v'},
{"help", 0, NULL, 'h'},
{0, 0, 0, 0}
};
- while ((opt = getopt_long(argc, argv, "cdD:ehi:lr:s:uvw:x?",
+ while ((opt = getopt_long(argc, argv, "cdD:ef:hi:lm:r:s:uU:vw:x?",
long_options, &option_index)) != EOF) {
switch (opt) {
case 'c':
@@ -855,6 +941,9 @@ int main(int argc, char *argv[])
case 'l':
mode_locked = 1;
break;
+ case 'm':
+ ucode_ptr = strtoul(optarg, NULL, 0);
+ break;
case 'r':
rom_size = strtol(optarg, NULL, 0);
debug("ROM size %d\n", rom_size);
@@ -888,14 +977,23 @@ int main(int argc, char *argv[])
exit(EXIT_SUCCESS);
break;
case 'w':
+ case 'U':
+ case 'f':
+ ifile = &input_file[wr_num];
mode_write = 1;
if (wr_num < WRITE_MAX) {
if (get_two_words(optarg, &addr_str,
- &wr_fname[wr_num])) {
+ &ifile->fname)) {
print_usage(argv[0]);
exit(EXIT_FAILURE);
}
- addr[wr_num] = strtol(optarg, NULL, 0);
+ ifile->addr = strtol(optarg, NULL, 0);
+ ifile->type = opt == 'f' ? IF_fdt :
+ opt == 'U' ? IF_uboot : IF_normal;
+ if (ifile->type == IF_fdt)
+ fdt = ifile;
+ else if (ifile->type == IF_uboot)
+ have_uboot = true;
wr_num++;
} else {
fprintf(stderr,
@@ -952,6 +1050,13 @@ int main(int argc, char *argv[])
exit(EXIT_FAILURE);
}
+ if (have_uboot && !fdt) {
+ fprintf(stderr,
+ "You must supply a device tree file for U-Boot\n\n");
+ print_usage(argv[0]);
+ exit(EXIT_FAILURE);
+ }
+
filename = argv[optind];
if (optind + 2 != argc)
outfile = argv[optind + 1];
@@ -1015,9 +1120,17 @@ int main(int argc, char *argv[])
if (mode_write) {
for (wr_idx = 0; wr_idx < wr_num; wr_idx++) {
- ret = write_data(image, size,
- addr[wr_idx], wr_fname[wr_idx]);
- if (ret)
+ ifile = &input_file[wr_idx];
+ if (ifile->type == IF_fdt) {
+ continue;
+ } else if (ifile->type == IF_uboot) {
+ ret = write_uboot(image, size, ifile, fdt,
+ ucode_ptr);
+ } else {
+ ret = write_data(image, size, ifile->addr,
+ ifile->fname);
+ }
+ if (ret < 0)
break;
}
}
@@ -1052,5 +1165,5 @@ int main(int argc, char *argv[])
free(image);
close(bios_fd);
- return ret ? 1 : 0;
+ return ret < 0 ? 1 : 0;
}
diff --git a/tools/microcode-tool b/tools/microcode-tool
new file mode 120000
index 0000000..8be8507
--- /dev/null
+++ b/tools/microcode-tool
@@ -0,0 +1 @@
+microcode-tool.py \ No newline at end of file
diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py
new file mode 100755
index 0000000..003716d
--- /dev/null
+++ b/tools/microcode-tool.py
@@ -0,0 +1,253 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2014 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Intel microcode update tool
+
+from optparse import OptionParser
+import os
+import re
+import struct
+import sys
+
+MICROCODE_DIR = 'arch/x86/dts/microcode'
+
+class Microcode:
+ """Holds information about the microcode for a particular model of CPU.
+
+ Attributes:
+ name: Name of the CPU this microcode is for, including any version
+ information (e.g. 'm12206a7_00000029')
+ model: Model code string (this is cpuid(1).eax, e.g. '206a7')
+ words: List of hex words containing the microcode. The first 16 words
+ are the public header.
+ """
+ def __init__(self, name, data):
+ self.name = name
+ # Convert data into a list of hex words
+ self.words = []
+ for value in ''.join(data).split(','):
+ hexval = value.strip()
+ if hexval:
+ self.words.append(int(hexval, 0))
+
+ # The model is in the 4rd hex word
+ self.model = '%x' % self.words[3]
+
+def ParseFile(fname):
+ """Parse a micrcode.dat file and return the component parts
+
+ Args:
+ fname: Filename to parse
+ Returns:
+ 3-Tuple:
+ date: String containing date from the file's header
+ license_text: List of text lines for the license file
+ microcodes: List of Microcode objects from the file
+ """
+ re_date = re.compile('/\* *(.* [0-9]{4}) *\*/$')
+ re_license = re.compile('/[^-*+] *(.*)$')
+ re_name = re.compile('/\* *(.*)\.inc *\*/', re.IGNORECASE)
+ microcodes = {}
+ license_text = []
+ date = ''
+ data = []
+ name = None
+ with open(fname) as fd:
+ for line in fd:
+ line = line.rstrip()
+ m_date = re_date.match(line)
+ m_license = re_license.match(line)
+ m_name = re_name.match(line)
+ if m_name:
+ if name:
+ microcodes[name] = Microcode(name, data)
+ name = m_name.group(1).lower()
+ data = []
+ elif m_license:
+ license_text.append(m_license.group(1))
+ elif m_date:
+ date = m_date.group(1)
+ else:
+ data.append(line)
+ if name:
+ microcodes[name] = Microcode(name, data)
+ return date, license_text, microcodes
+
+def List(date, microcodes, model):
+ """List the available microcode chunks
+
+ Args:
+ date: Date of the microcode file
+ microcodes: Dict of Microcode objects indexed by name
+ model: Model string to search for, or None
+ """
+ print 'Date: %s' % date
+ if model:
+ mcode_list, tried = FindMicrocode(microcodes, model.lower())
+ print 'Matching models %s:' % (', '.join(tried))
+ else:
+ print 'All models:'
+ mcode_list = [microcodes[m] for m in microcodes.keys()]
+ for mcode in mcode_list:
+ print '%-20s: model %s' % (mcode.name, mcode.model)
+
+def FindMicrocode(microcodes, model):
+ """Find all the microcode chunks which match the given model.
+
+ This model is something like 306a9 (the value returned in eax from
+ cpuid(1) when running on Intel CPUs). But we allow a partial match,
+ omitting the last 1 or two characters to allow many families to have the
+ same microcode.
+
+ If the model name is ambiguous we return a list of matches.
+
+ Args:
+ microcodes: Dict of Microcode objects indexed by name
+ model: String containing model name to find
+ Returns:
+ Tuple:
+ List of matching Microcode objects
+ List of abbreviations we tried
+ """
+ # Allow a full name to be used
+ mcode = microcodes.get(model)
+ if mcode:
+ return [mcode], []
+
+ tried = []
+ found = []
+ for i in range(3):
+ abbrev = model[:-i] if i else model
+ tried.append(abbrev)
+ for mcode in microcodes.values():
+ if mcode.model.startswith(abbrev):
+ found.append(mcode)
+ if found:
+ break
+ return found, tried
+
+def CreateFile(date, license_text, mcode, outfile):
+ """Create a microcode file in U-Boot's .dtsi format
+
+ Args:
+ date: String containing date of original microcode file
+ license: List of text lines for the license file
+ mcode: Microcode object to write
+ outfile: Filename to write to ('-' for stdout)
+ """
+ out = '''/*%s
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ *
+ * Date: %s
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <%d>;
+intel,update-revision = <%#x>;
+intel,date-code = <%#x>;
+intel,processor-signature = <%#x>;
+intel,checksum = <%#x>;
+intel,loader-revision = <%d>;
+intel,processor-flags = <%#x>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <%s
+\t>;'''
+ words = ''
+ for i in range(len(mcode.words)):
+ if not (i & 3):
+ words += '\n'
+ val = mcode.words[i]
+ # Change each word so it will be little-endian in the FDT
+ # This data is needed before RAM is available on some platforms so we
+ # cannot do an endianness swap on boot.
+ val = struct.unpack("<I", struct.pack(">I", val))[0]
+ words += '\t%#010x' % val
+
+ # Take care to avoid adding a space before a tab
+ text = ''
+ for line in license_text:
+ if line[0] == '\t':
+ text += '\n *' + line
+ else:
+ text += '\n * ' + line
+ args = [text, date]
+ args += [mcode.words[i] for i in range(7)]
+ args.append(words)
+ if outfile == '-':
+ print out % tuple(args)
+ else:
+ if not outfile:
+ if not os.path.exists(MICROCODE_DIR):
+ print >> sys.stderr, "Creating directory '%s'" % MICROCODE_DIR
+ os.makedirs(MICROCODE_DIR)
+ outfile = os.path.join(MICROCODE_DIR, mcode.name + '.dtsi')
+ print >> sys.stderr, "Writing microcode for '%s' to '%s'" % (
+ mcode.name, outfile)
+ with open(outfile, 'w') as fd:
+ print >> fd, out % tuple(args)
+
+def MicrocodeTool():
+ """Run the microcode tool"""
+ commands = 'create,license,list'.split(',')
+ parser = OptionParser()
+ parser.add_option('-d', '--mcfile', type='string', action='store',
+ help='Name of microcode.dat file')
+ parser.add_option('-m', '--model', type='string', action='store',
+ help='Model name to extract')
+ parser.add_option('-o', '--outfile', type='string', action='store',
+ help='Filename to use for output (- for stdout), default is'
+ ' %s/<name>.dtsi' % MICROCODE_DIR)
+ parser.usage += """ command
+
+ Process an Intel microcode file (use -h for help). Commands:
+
+ create Create microcode .dtsi file for a model
+ list List available models in microcode file
+ license Print the license
+
+ Typical usage:
+
+ ./tools/microcode-tool -d microcode.dat -m 306a create
+
+ This will find the appropriate file and write it to %s.""" % MICROCODE_DIR
+
+ (options, args) = parser.parse_args()
+ if not args:
+ parser.error('Please specify a command')
+ cmd = args[0]
+ if cmd not in commands:
+ parser.error("Unknown command '%s'" % cmd)
+
+ if not options.mcfile:
+ parser.error('You must specify a microcode file')
+ date, license_text, microcodes = ParseFile(options.mcfile)
+
+ if cmd == 'list':
+ List(date, microcodes, options.model)
+ elif cmd == 'license':
+ print '\n'.join(license_text)
+ elif cmd == 'create':
+ if not options.model:
+ parser.error('You must specify a model to create')
+ model = options.model.lower()
+ mcode_list, tried = FindMicrocode(microcodes, model)
+ if not mcode_list:
+ parser.error("Unknown model '%s' (%s) - try 'list' to list" %
+ (model, ', '.join(tried)))
+ if len(mcode_list) > 1:
+ parser.error("Ambiguous model '%s' (%s) matched %s - try 'list' "
+ "to list or specify a particular file" %
+ (model, ', '.join(tried),
+ ', '.join([m.name for m in mcode_list])))
+ CreateFile(date, license_text, mcode_list[0], options.outfile)
+ else:
+ parser.error("Unknown command '%s'" % cmd)
+
+if __name__ == "__main__":
+ MicrocodeTool()